Hi,
I've been working on something similar - the first stage of getting an AES67-compatible stream is getting a working PTPv2 daemon on the STM32F chips. The STM32F4 and F7 chips seem to support hardware timestamping, and ST claim that they have an example PTP implementation on their website, but as far as I can see, other than some old application notes, it is no longer there.
It might be worth looking at
https://github.com/mpthompson/stm32_f4_ptpd, an STM32F4 port of the open-source PTPd project. I am currently in the process of porting this project to the STM32F7 chips, but work at the moment has meant I haven't got very far with this.
For receiving one or two audio streams, it may be possible to have a fully working AES67 receiver just with an STM32F series chip, but I think for higher channel counts some sort of FPGA/MCU combination may be necessary.
As for decent documentation, most of the key documents are behind paywalls, but there are a lot of very good white papers and drafts of the standard online. I have begun compiling all the useful ones - I don't think I'm allowed to put them all in one place on GitHub, but here's a Drive link to all the useful documents I have found so far:
https://drive.google.com/drive/folders/1nKHXXIoAASN6CpqaBhnMYFsbsyIoAENC?usp=sharing. They are all freely available online, so hopefully putting the link here is alright.
In particular, the AES67_STANDARD_DRAFT.pdf is the most comprehensive, and at the bottom of the PDF there is a PICs checklist for all the features in the standard. RAVENNA have also published lots of helpful resources, also in the drive folder above.
I also intend to check out the PAM project mentioned in another topic on this group. The readme says it can record incoming audio, and if it does this reliably we might be able to reuse some of that code for a MCU-based receiver.
Do keep us updated with your progress!
James