[cse520] Paper critic: " Bypass aware instruction scheduling for Register file power reduction" 10/30

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Sushma Myneni

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Nov 1, 2007, 5:48:00 PM11/1/07
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Hi all,

Check the attached document for Critic on the paper " Bypass aware instruction scheduling for Register file power reduction" presented on 10/30

Thankyou,
Sushma

Paper_Critic_CSE520_10-30.doc

Tao Liu

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Nov 1, 2007, 6:05:21 PM11/1/07
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Hi all,

Attached pls find out my comments  on the paper " Bypass aware instruction scheduling for Register file power reduction" presented on 10/30.


Regards,
Tao Liu


CA_Paper_Comments_TAO_LIU.doc

Ayan Banerjee

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Nov 4, 2007, 2:57:12 PM11/4/07
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Hi Tao ,

I was going through your critique can you explain to me the weakness
3.3 that you found out in the paper.

Regards,

Ayan

Tao (Tony) Liu

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Nov 4, 2007, 5:52:10 PM11/4/07
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Hi, Ayan,
In paper" Bypass Aware Instruction Scheduling for Register File Power
Reduction"
the power reduction in this paper is achieved by scheduling instructions so
that they transfer operand values via bypasses, instead of reading them from
the register file.
By doing this, compiler needs to know something like
When does an instruction bypass result?
Which operands can read the result?
When result is written into register file?
This information is related to the hardware architecture. For example, what
kind
of pipeline is used, what the stage of this pipeline,etc.
This paper just implemented some scheduling algorithms on a specific
hardware platform, i.e. Intel XScale processor. Compilers need to support
different architectures and doing optimization on different platforms to
ensure that the proposed scheduling algorithms are generic and can be used
widely. At this point, the develop cost for compiler and software support
may be very high

Hope this answered your question
Regards,
Tao

Saleel Kudchadker

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Nov 5, 2007, 2:31:04 AM11/5/07
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Hi,
 
Yes, you are right abt that Tao. The paper only suggest abt the scheduling the instructions. To make things easier they use Op tables for getting information abt the bypasses. The utilization of the concept is in its infancy.


regards
 
saleel
 
 
Graduate Student, School of Computing and Informatics
TA, Del E. Webb School of Construction
Arizona State University
Tempe, AZ, 85281
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