minimum required files for a new Architecture

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MengXuan Cai

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Mar 20, 2019, 1:57:06 PM3/20/19
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Hi,

I work on aa research project about an new architecture.

I want to write the new architecuture into the ArchC language and Run some simple C program. (To clearify, I just need to have the similator work not the other parts)

I want to know if there are some tutorials or related resouce about teaching me how the write different componenets and what are the minimun required files needed for generate simulator?

Thanks

Maxiwell Garcia

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Mar 22, 2019, 9:58:44 AM3/22/19
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Hi,

The ArchC Wiki (https://github.com/ArchC/ArchC/wiki) has some information to write a new architecture. 
But in case of a new ISA, you need to generate a compiler to emit these instructions from a C code.
The ArchC project has an LLVM Backend Generator but it's not maintained and I don't know if it works. 


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Maxiwell Salvador Garcia
Kernel/KVM Software Engineer 
Linux Technology Center | IBM

MengXuan Cai

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Apr 2, 2019, 11:29:00 AM4/2/19
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Hi, 

I looked the wiki you posted and successfully installed the ArchC library and was able the generate a working simulator.

However, when I look into the following wiki (https://github.com/ArchC/ArchC/wiki/Generating-the-Binutils-tools) and find some errors at step  # Build and Install the Binutils patched. (most of errors are unused veriable)  and I am wondering if you have a way to solve those errors.

Also, I want to know if there are further documentation which explain the .csv file in powersc and arch_power_stats.H file.

And for the issue (https://github.com/ArchC/ArchC/issues/42), I want to know if it has been resolved or not. 

Last but not least, I find the ArchC support the decription of cycle-accrate-simulator model but have not seen any model using that feature. Is this feature still avaliable?

Thanks

Best
Billy Cai


On Friday, 22 March 2019 09:58:44 UTC-4, Maxiwell wrote:
Hi,

The ArchC Wiki (https://github.com/ArchC/ArchC/wiki) has some information to write a new architecture. 
But in case of a new ISA, you need to generate a compiler to emit these instructions from a C code.
The ArchC project has an LLVM Backend Generator but it's not maintained and I don't know if it works. 


On Wed, Mar 20, 2019 at 2:57 PM MengXuan Cai <mrcaim...@gmail.com> wrote:
Hi,

I work on aa research project about an new architecture.

I want to write the new architecuture into the ArchC language and Run some simple C program. (To clearify, I just need to have the similator work not the other parts)

I want to know if there are some tutorials or related resouce about teaching me how the write different componenets and what are the minimun required files needed for generate simulator?

Thanks

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Rafael Auler

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Apr 2, 2019, 1:51:59 PM4/2/19
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On Tue, Apr 2, 2019 at 8:29 AM MengXuan Cai <mrcaim...@gmail.com> wrote:
>
> Hi,
>
> I looked the wiki you posted and successfully installed the ArchC library and was able the generate a working simulator.
>
> However, when I look into the following wiki (https://github.com/ArchC/ArchC/wiki/Generating-the-Binutils-tools) and find some errors at step # Build and Install the Binutils patched. (most of errors are unused veriable) and I am wondering if you have a way to solve those errors.

Unused variable as an error? Is this being built with -Wall -Werror? I
would try to hack binutils to not build with -Werror or look for an
option in configure to disable this.

>
> Also, I want to know if there are further documentation which explain the .csv file in powersc and arch_power_stats.H file.

I believe the CSV description you are talking about has an estimated
power per instruction, as described in
https://ieeexplore.ieee.org/document/6380691

PowerSC: https://www.academia.edu/21462523/PowerSC_A_SystemC-based_framework_for_power_estimation

>
> And for the issue (https://github.com/ArchC/ArchC/issues/42), I want to know if it has been resolved or not.

I don't think so. I would estimate this to be about 1-3 weeks of work
for someone that wants to learn about the ELF format.

>
> Last but not least, I find the ArchC support the decription of cycle-accrate-simulator model but have not seen any model using that feature. Is this feature still avaliable?

I think cycle accurate models were a feature used in ArchC 1.6 but not
supported anymore. But I could be wrong. I don't think anyone
maintained the timed simulator after 1.6, so it may be bitrotten
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MengXuan Cai

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Apr 6, 2019, 6:52:58 PM4/6/19
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Hi, 

Thanks for your reply, which help me a lot in terms of understanding the project.

However, I am still trapped into some errors while implementing my own model. I hope you guys can help me out.

First, I down the mips model from http://www.archc.org/downloads.html, and try to play with it.
In order to generate an simulator, I have to pass the -abi flag(acsim mips.ac -abi), 
Otherwise, I came across the error: ‘class mips_parms::mips_isa’ has no member named ‘syscall’.
I guess this would be an error, am I correct?


Second, I write a simple model for my research architecture.(I did not have an working compiler for it, so I wrote assembly instructions and using the binutils-as for generating the object file.)

I was not given enough information about my processor's -abi information, so in my first attempt, I just fill the the arch.ac, arch_isa.ac, arch_isa.cpp files and made the arch_syscall.cpp has all functions with empty body. The simulator was successfully generated and can ran on the ELF-32 object file, but there is an segmentation fault triggered at runtime. 

The error is triggered by: 
ArchC-2.4.1/src/aclib/ac_syscall/ac_syscall.H:577:

 AC_SYSCALL::ac_forbidden()
   {
     AC_ERROR("segmentation fault - PC at invalid address.");
     exit(EXIT_FAILURE);
   }

The above function is called by
ArchC-2.4.1/src/aclib/ac_syscall/ac_syscall.def:1:AC_SYSC(ac_forbidden, 0x3c);


I saw the simulator can read the assembly correctly for few instructions and suddent trigger this error.
I would like to know why it falls into this error?


Third, I guessed the problem is I did not implement the syscall function but passing the -abi flag.
And I found there is a lot of similarity of syscall.cpp amoung other models. 
So I fill my syscall model based on the mips_syscall.cpp file. However, it makes the error worse. 
The simulator did not ouput any assembly instructions it read, and only output

ArchC Error: Unidentified instrucion.


I am very confused about this Error, since I only modified the syscall.cpp file, it should not affect the decoder part, and the unidentified instruction error seems very strange for me.

I would like to know 
if there are any documentation explain how the syscall.cpp file affect the generated simulator 
and what are the required functions and how to write it.

Rafael Auler

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Apr 8, 2019, 2:13:00 PM4/8/19
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I have only worked with -abi, so I'm not sure about the status of the
simulator when not using -abi. This flag is used to generate a process
simulator, in which the operating system is abstracted away and
assumed to be working as the one in the host machine (all syscalls are
redirected to your own OS).

These errors you are seeing are common when developing a simulator for
the first time. So my advice would be to create your model with a
debug mode (see the mips model), in a way that when you compile with
-DDEBUG or something like that, it generates a very verbose simulator
that prints what every instruction is doing. This is essential for
development. In that way you can read a trace of what happened when it
attempted to execute your program and perfectly understand where is
the problem and which instruction executed incorrectly.

If you just try to guess what is wrong by the last error
(unidentified instruction or memory access violations), it is going to
be challenging. You need to print the trace of executed instructions
and look back and pin point the root cause.

If you are interested in debugging the syscall functions per se (those
are translation functions that translate how your model machine does
linux syscalls to how your host machine executes them), I would start
by either using gdb or adding printfs to these functions to understand
when they are called and why (the why can be answered by the trace).
Remember a good trace can be generated by the DEBUG statements in, for
example, the mips model.
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MengXuan Cai

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Apr 12, 2019, 5:28:49 PM4/12/19
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Hi 

Thanks for your advice.
I feel I understand what casue my seg fault error. Now I am looking into the accgen part of the project.

It seems that the "genllvmbe" utility consumes the compiler_info.ac (declaring register class and instruction pattern) and arch_isa.ac (declaring encoding and assembly string). I saw the parser read each token and create classes (such as RegisterClass, Register). 

However I would like to see exactly how the auto-generated llvm files (*.td, *.cpp and so on) are created.

I guess all the auto-generated files are "printed" using some output stream.

I have the following question:

Where is the output stream utility of the archc project? (I assume there is one module which is used for all files' auto creation.)

And how the accgen utlity modify and extend the template files. 
if you can info me some information about the control flow of the files in the accgen part folder, that would be better.
(or anything that come to your mind which you think that will help me to understand the source code better.)

Any help is appreciated.

Best regards

Rafael Auler

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Apr 12, 2019, 10:42:14 PM4/12/19
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The idea of accgen is to retarget the compiler (llvm) by using a
pre-defined (template) backend with modifications generated by the
engine. accgen focus on instruction selection. For this, there are
pre-defined patterns of the LLVM IR
(https://github.com/rafaelauler/accgen/blob/master/Parser/rules.txt#L169)
for which accgen needs to guess which instructions from your
architecture to use to cover each pattern.

To solve this, it will use a search algorithm whose search space is
defined by which transformations
(https://github.com/rafaelauler/accgen/blob/master/Parser/rules.txt#L80)
it is allowed to do in the LLVM pattern until it matches one or many
instructions from your architecture
(https://github.com/ArchC/mips/blob/master/compiler_info.ac#L43).

However, the implementation is now quite old and was written to
retarget LLVM 2.5. This is LLVM from ~2011.

About LLVM files generation:
https://github.com/rafaelauler/accgen/blob/master/TemplateManager.cpp
called from https://github.com/rafaelauler/accgen/blob/master/genllvmbe.cpp#L785

I would suggest you to, if possible, run the project with a debugger
and start investigating which functions are called to accomplish a
specific task you are interested on. This is a great way to quickly
understand how the project works.

Best,
Rafael
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MengXuan Cai

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Apr 15, 2019, 4:47:04 PM4/15/19
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Hi

Thank for your advice.
I have run the gdb on the generated genllvmbe file
I have followed the debugger and went through different files such as TemplateManager.cpp.
And I have seen that the m4 language is used for adding stuff into the template and the function TemplateManager.CreateBackendFiles() calls the m4 utility for auto generation files.

I think I have went through most of the important function. However, there are some class I am still confused about.
Ex. extern backendgen::InstrManager InstructionManager;
      extern backendgen::expression::OperandTableManager OperandTable;
......

It seems those objects are decleared as extern variables but I do not know where those varible are defined.
Can you also comment on what is the role of those Managers, what are they supposeed to do?

Thanks
Best
Billy Cai
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