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TOPS-20 hardware trivia

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Mark Crispin

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Jan 8, 2006, 2:53:21 PM1/8/06
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What was a MEIS?

-- Mark --

http://staff.washington.edu/mrc
Science does not emerge from voting, party politics, or public debate.
Si vis pacem, para bellum.

Eric Smith

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Jan 9, 2006, 7:46:59 PM1/9/06
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Mark Crispin <M...@CAC.Washington.EDU> writes:
> What was a MEIS?

Massbus Ethernet Interface Subsystem, designed by the Stanford CS department.

The original MEIS supported the 3 Mbps (actually 2.997 Mps or so) Xerox
Ethernet spec, which predated the DEC/Intel/Xerox (DIX) 10 Mbps Ethernet
specification. A later version of MEIS supported the latter.

MEIS predated DEC's NI20 (aka NIA20), which plugged into an RH20 slot in
a KL10 backplane (but precluded the use of two of the possible eight
RH20s).

I've heard that the programming interface of the Ethernet ports of the
XKL are compatible with MEIS rather than the NI20.

Was MEIS ever used with a Massbus controller other than the RH20?

Eric


Ethernet trivia:

One of the people involved in the Xerox side of the DIX development told
me that it would have been 20 Mbps but the available CRC chips such as
the Signetics 8X01 and Fairchild 9401 were not fast enough, so the "new"
Ethernet interface for one of the Xerox machines would have needed a lot
more chips and would not have fit in the avaialble board space.

Mark Crispin

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Jan 9, 2006, 8:10:17 PM1/9/06
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On Mon, 9 Jan 2006, Eric Smith wrote:
>> What was a MEIS?
> Massbus Ethernet Interface Subsystem, designed by the Stanford CS department.

BINGO!

> I've heard that the programming interface of the Ethernet ports of the
> XKL are compatible with MEIS rather than the NI20.

That would make sense. The MEIS had a much simpler programming interface
than the NI20. The XKL-1 is a very different processor than the KL10;
it's 30-bit (the KL was 23-bit virtual, 22-bit physical) so the paging
system is very different (it's relatively simple to extend the KL paging
system to 27 bits, but those last 3 bits are a different matter), and the
I/O system is completely different.

I don't think that XKL ever tried to make DECnet work. So they'd really
have no reason to do an NI20 rather than a MEIS.

> Was MEIS ever used with a Massbus controller other than the RH20?

I doubt it. MEIS never was put in a 2020; the only KS10 that was ever on
Stanford's Ethernet used a Unibus 3MB Ethernet board. The KS10 may have
been too slow to support a MEIS.

Some VAXen used Massbus, but later that world switched to other stuff.

IIRC, the MEIS went into an RH20 slot in place of an RH20; it did not talk
to an RH20. So it was its own channel. If that's correct, then a MEIS
would electrically be an RH20 to the hardware, and thus would be limited
to processors that used RH20s.

-- Mark --

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Democracy is two wolves and a sheep deciding what to eat for lunch.
Liberty is a well-armed sheep contesting the vote.

Rich Alderson

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Jan 9, 2006, 8:53:38 PM1/9/06
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Mark Crispin <m...@CAC.Washington.EDU> writes:

> On Mon, 9 Jan 2006, Eric Smith wrote:

>>> What was a MEIS?

>> Massbus Ethernet Interface Subsystem, designed by the Stanford CS
>> department.

Specifically by Len Bosack (high level) and George Schnurle (detail).

> BINGO!

>> I've heard that the programming interface of the Ethernet ports of the
>> XKL are compatible with MEIS rather than the NI20.

> That would make sense. The MEIS had a much simpler programming interface
> than the NI20. The XKL-1 is a very different processor than the KL10;
> it's 30-bit (the KL was 23-bit virtual, 22-bit physical) so the paging
> system is very different (it's relatively simple to extend the KL paging
> system to 27 bits, but those last 3 bits are a different matter), and the
> I/O system is completely different.

> I don't think that XKL ever tried to make DECnet work. So they'd really
> have no reason to do an NI20 rather than a MEIS.

That's correct.

>> Was MEIS ever used with a Massbus controller other than the RH20?

> I doubt it. MEIS never was put in a 2020; the only KS10 that was ever on
> Stanford's Ethernet used a Unibus 3MB Ethernet board. The KS10 may have
> been too slow to support a MEIS.

> Some VAXen used Massbus, but later that world switched to other stuff.

> IIRC, the MEIS went into an RH20 slot in place of an RH20; it did not talk
> to an RH20. So it was its own channel. If that's correct, then a MEIS
> would electrically be an RH20 to the hardware, and thus would be limited
> to processors that used RH20s.

Nope, the MEIS is physically located in the extension cabinet of the 11/40,
and connects to an RH20--*any* RH20, unlike CI/NI--with a standard Massbus
cable. This made the power hookup much simpler (or so Len once told me, long
long ago).

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Mark Crispin

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Jan 10, 2006, 12:50:54 AM1/10/06
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On Mon, 9 Jan 2006, Rich Alderson wrote:
>> IIRC, the MEIS went into an RH20 slot in place of an RH20; it did not talk
>> to an RH20. So it was its own channel. If that's correct, then a MEIS
>> would electrically be an RH20 to the hardware, and thus would be limited
>> to processors that used RH20s.
> Nope, the MEIS is physically located in the extension cabinet of the 11/40,
> and connects to an RH20--*any* RH20, unlike CI/NI--with a standard Massbus
> cable. This made the power hookup much simpler (or so Len once told me, long
> long ago).

I'm glad that I qualified that statement with an IIRC. I really had
forgotten. Wow. Doesn't happen often.

I last did *any* kernel programming on a system with a MEIS in spring
1984, and that's probably also the last time I ever looked at PHYMEI.MAC.
Any TOPS-20 Ethernet after that time was NI20.

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