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ARMed Slack and the upcoming Raspberry Pi
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Douglas Mayne
Feb 3, 2012, 5:23:17 PM2/3/12
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The capabilities of the credit card size boards seem exciting. The price
point for this computer could be another step to put computers into even
more devices and and applications. I am looking forward to testing with
the device. I am wondering if it will be possible to try slackware, al-a
armed slack. Or if the devices' CPU is slightly different than the ARMv4
that is targeted by the slackware port. Is the CPU specified for use in
the raspberry pi device similar enough to intel chips that fewer tweaks
to the slackbuilds could be sufficient to be able to build slackware?
Just curious.
The wikipedia article says that raspberry pi will use an ARM11 class
device, ARM1136EJ(F)-S which includes an MMU, etc.
http://en.wikipedia.org/wiki/List_of_ARM_microprocessor_cores
--
Douglas Mayne
point for this computer could be another step to put computers into even
more devices and and applications. I am looking forward to testing with
the device. I am wondering if it will be possible to try slackware, al-a
armed slack. Or if the devices' CPU is slightly different than the ARMv4
that is targeted by the slackware port. Is the CPU specified for use in
the raspberry pi device similar enough to intel chips that fewer tweaks
to the slackbuilds could be sufficient to be able to build slackware?
Just curious.
The wikipedia article says that raspberry pi will use an ARM11 class
device, ARM1136EJ(F)-S which includes an MMU, etc.
http://en.wikipedia.org/wiki/List_of_ARM_microprocessor_cores
--
Douglas Mayne
Aragorn
Feb 3, 2012, 6:12:50 PM2/3/12
to
On Friday 03 February 2012 23:23, Douglas Mayne conveyed the following
to alt.os.linux.slackware...
Disclaimer: I am not an engineer.
That out of the way, the ARM architecture is /very/ different from the
x86 platform. It's a RISC [1] architecture. x86 on the other hand is
CISC, and thus accepts CISC instructions only, even though - as of the
i686 [2] on - the x86 breaks down the CISC instructions into RISC-like
micro-ops _internally_ for code optimization during execution.
The bottom line is that just because a particular ARM processor includes
an MMU et al does not make it into an x86-compatible. Sharks and
dolphins are both very efficient aquatic predators with a very similar
appearance and a rather complex social structure and communication, and
some sharks - e.g. the great white shark - are viviparous and
(relatively) warmblooded. But sharks are (a very advanced species of)
fish, while dolphins are mammals. ;-)
[1] The RISC/CISC distinction only really pertains to the instructions
that the CPU accepts, not to the CPU's internal processing of the
instructions, although pre-i686 CPU architectures did internally
use CISC instructions. Some i686 and later CPU designs also store
the CISC instructions in their cache, while others break down the
CISC instructions into micro-ops first and store the micro-ops -
and thus: RISC instructions - in their L1 cache.
[2] For Intel processors, the i686 classification starts with the Intel
Pentium Pro and Pentium II, and includes Pentium III, Pentium 4,
Pentium D, Pentium EE and all Celerons. Pentium D was /technically/
an EM64T processor, but Intel's original EM64T was barely usable,
which is why they've taken a license on AMD's AMD64 patents for all
subsequent Intel x86-64 processor. For AMD, the i686 classification
starts with the AMD K7 "Thunderbird" and includes the Athlon, Athlon
XP/MP and all Durons.
--
= Aragorn =
(registered GNU/Linux user #223157)
to alt.os.linux.slackware...
That out of the way, the ARM architecture is /very/ different from the
x86 platform. It's a RISC [1] architecture. x86 on the other hand is
CISC, and thus accepts CISC instructions only, even though - as of the
i686 [2] on - the x86 breaks down the CISC instructions into RISC-like
micro-ops _internally_ for code optimization during execution.
The bottom line is that just because a particular ARM processor includes
an MMU et al does not make it into an x86-compatible. Sharks and
dolphins are both very efficient aquatic predators with a very similar
appearance and a rather complex social structure and communication, and
some sharks - e.g. the great white shark - are viviparous and
(relatively) warmblooded. But sharks are (a very advanced species of)
fish, while dolphins are mammals. ;-)
[1] The RISC/CISC distinction only really pertains to the instructions
that the CPU accepts, not to the CPU's internal processing of the
instructions, although pre-i686 CPU architectures did internally
use CISC instructions. Some i686 and later CPU designs also store
the CISC instructions in their cache, while others break down the
CISC instructions into micro-ops first and store the micro-ops -
and thus: RISC instructions - in their L1 cache.
[2] For Intel processors, the i686 classification starts with the Intel
Pentium Pro and Pentium II, and includes Pentium III, Pentium 4,
Pentium D, Pentium EE and all Celerons. Pentium D was /technically/
an EM64T processor, but Intel's original EM64T was barely usable,
which is why they've taken a license on AMD's AMD64 patents for all
subsequent Intel x86-64 processor. For AMD, the i686 classification
starts with the AMD K7 "Thunderbird" and includes the Athlon, Athlon
XP/MP and all Durons.
--
= Aragorn =
(registered GNU/Linux user #223157)
VWWall
Feb 3, 2012, 8:00:44 PM2/3/12
to
Rob Windgassen
Feb 3, 2012, 8:14:12 PM2/3/12
to
On Fri, 03 Feb 2012 22:23:17 +0000, Douglas Mayne wrote:
> The capabilities of the credit card size boards seem exciting. The price
> point for this computer could be another step to put computers into even
> more devices and and applications. I am looking forward to testing with
> the device. I am wondering if it will be possible to try slackware, al-a
> armed slack. Or if the devices' CPU is slightly different than the ARMv4
> that is targeted by the slackware port. Is the CPU specified for use in
> the raspberry pi device similar enough to intel chips that fewer tweaks
> to the slackbuilds could be sufficient to be able to build slackware?
> Just curious.
It seems that you are not the only being curious
> The capabilities of the credit card size boards seem exciting. The price
> point for this computer could be another step to put computers into even
> more devices and and applications. I am looking forward to testing with
> the device. I am wondering if it will be possible to try slackware, al-a
> armed slack. Or if the devices' CPU is slightly different than the ARMv4
> that is targeted by the slackware port. Is the CPU specified for use in
> the raspberry pi device similar enough to intel chips that fewer tweaks
> to the slackbuilds could be sufficient to be able to build slackware?
> Just curious.
http://alien.slackbook.org/blog/raspberry-pi-deserves-slackware/
and a little more recent
http://alien.slackbook.org/blog/happy-new-year-2012/
and yes, I am curious too ;-)
Rob
Douglas Mayne
Feb 3, 2012, 9:45:11 PM2/3/12
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--
Douglas Mayne
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