how to handle exception 0x7

[Peter Cheung]

Hi All
when i run these code:

#ifdef FLOATING_POINT
char *decimal_point = _localeconv_r (data)->decimal_point;
size_t decp_len = strlen (decimal_point);
char softsign; /* temporary negative sign for floats */
union { int i; _PRINTF_FLOAT_TYPE fp; } _double_ = {0};
160dfee: dd 5c 24 40 fstpl 0x40(%esp)
160dff2: 29 c8 sub %ecx,%eax


When executing instruction "fstpl", i got an exception 0x7 (#NM) device not available occurred. But i am sure i have cpu in bochs. May I know why please? How the people handle this thing in exception 0x7 handler?

thanks
from Peter (cmk...@hotmail.com)

[Johann Klammer]

Is the TS or the EM bit set?
I suspect the TS. In that case you may have to complete the context switch (if possible).
otherwise, emulate the insn.

look it up up in:

IA-32 Intel ® Architecture
Software Developer’s
Manual
Volume 3:
System Programming Guide

[Peter Cheung]

Johann Klammer於 2015年8月18日星期二 UTC+8上午3時38分01秒寫道：

hi all, in my interrupt 7 handler, i just execute clts instruction, this error gone. thanks

[Johann Klammer]

Is that sufficient?
I had the impression a set ts indicated loss of FPU/XMM state
and you had to restore them somehow, or get data corruption in your xmm/fpu registers.
...data leaking in from other processes/threads.. whatever it's called..
..not that I actually knew what I'm talking about... just sayin...

[Peter Cheung]

my way to handle exception 0x7 is too simple and naive, but it just works for me, basically i dont know much about the fpu

[Alexei A. Frounze]

On Tuesday, August 18, 2015 at 9:45:39 AM UTC-7, Peter Cheung wrote:
...> hi all, in my interrupt 7 handler, i just execute clts instruction, this error gone. thanks

TSS-based hardware task switching only takes care of the general purpose
registers and not of FPU/MMX/SSE/etc ones. So, if you use an FPU
instruction and then switch to a different TSS the FPU context remains
unchanged. The new task runs with the FPU context of the old. And so
whenever this new task (or any other) attempts to execute an FPU instruction
you get an exception telling you to switch the FPU context. If you just
do CLTS, you handle this exception, but you don't switch the FPU context
and so if there are more than one task using the FPU, you have a problem,
you trash their FPU states.

Switching tasks doesn't take care of FPU/etc for performance reasons.
Not every task uses the FPU all the time. So, the FPU context can be
switched lazily.

Alex

[Rod Pemberton]

On Wed, 19 Aug 2015 01:22:03 -0400, Peter Cheung <mche...@gmail.com> wrote:

> my way to handle exception 0x7 is too simple and naive, but it just
> works for me, basically i dont know much about the fpu

You probably need to look at setting or clearing bits
CR0.NE and CR0.EM in CR0, perhaps calling a few FPU
instructions, and writing to a couple of ports.

CR0.EM (bit 2) - selects external (0) math coprocessor
(for 386 or earlier) to trap Int 0x07, or internal (1)
math coprocessor for 486 or newer

CR0.NE (bit 5) - selects hardware (0) IRQ 13h (Int 0x75)
or software (1) Int 0x10 (1) for numerical exceptions

At a minimum, you may want to clear FPU exceptions with
FNCLEX instruction (DB E2) during exceptions. You might
want to also initialize the FPU with the FNINIT instruction
(DB E3) when your OS starts.

You can use an out port instruction to port 0xF0 with value
0x00 to clear the coprocessor busy latch, and out port
instruction to 0xF1 with value 0x00 to reset the coprocessor.

286 or 386 generate Int 09h for coprocessor exceptions.
486 or newer generates Int 0Dh for coprocessor exceptions.


Rod Pemberton

--
Scientists now say we'll experience a mini-ice in 2030.
So, I guess we need more global warming today ...

[Peter Cheung]

Rod Pemberton於 2015年8月19日星期三 UTC+8下午3時35分51秒寫道：

thanks for the information

[James Harris]

"Alexei A. Frounze" <alexf...@gmail.com> wrote in message
news:cc6e4b3b-d3d8-4202...@googlegroups.com...

A good reply. Peter, just clearing the flag is not the answer. As Alex
says, you could end up corrupting tasks that use floating point. That
flag is there for a reason.

Something I hadn't thought of before is that if we use software task
switching we presumably should set the TS bit as part of a task switch.

James

[Peter Cheung]

James Harris於 2015年8月23日星期日 UTC+8下午6時31分04秒寫道：

Thanks James, let me think about it.