A20 desperation mode

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muta...@gmail.com

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Jul 12, 2021, 9:45:34 AMJul 12
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There was once a situation, using Rufus I think,
where the A20 line wasn't being enabled by any
of the techniques.

It occurs to me that in that situation I can have
a "desperation mode" where I instead set up
1 MiB regions of free memory, which should
satisfy quite a lot of applications.

So 1-2 MiB would be skipped. 3-4 MiB would
be skipped. etc.

BFN. Paul.

muta...@gmail.com

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Jul 12, 2021, 5:51:41 PMJul 12
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On Monday, July 12, 2021 at 11:45:34 PM UTC+10, muta...@gmail.com wrote:

> It occurs to me that in that situation I can have
> a "desperation mode" where I instead set up
> 1 MiB regions of free memory, which should
> satisfy quite a lot of applications.

Actually I can do all that while in protected mode.

I start with memory below 1 MiB being made available
to PDOS/386, and then attempt to enable A20 via the
official BIOS interrupt.

Then if I detect that A20 is not enabled, I can present
the user with options:

1. Manipulate hardware to try to enable A20 (your funeral).

2. Enable "desperation mode" (technically sound).

3. Enable desperation mode and then email Jens to carpet
bomb Taiwan for making you lose half your memory and
fragmenting what remains into 1 MiB chunks so that you
can no longer run a 3 MB executable like gccwin (recommended).

BFN. Paul.

muta...@gmail.com

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Jul 12, 2021, 9:05:25 PMJul 12
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On Tuesday, July 13, 2021 at 7:51:41 AM UTC+10, muta...@gmail.com wrote:

> 3. Enable desperation mode and then email Jens to carpet
> bomb Taiwan for making you lose half your memory and
> fragmenting what remains into 1 MiB chunks so that you
> can no longer run a 3 MB executable like gccwin (recommended).

Actually, does A20 constrain physical or virtual addresses?

If the former, I could enable VM, have a return to flat memory,
at the expense of just losing half the memory. ie I can still
run 3 MB executables.

BFN. Paul.

Alexei A. Frounze

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Jul 12, 2021, 10:11:41 PMJul 12
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Physical. If you use page translation, you can hide the discontiguity/holes.

Alex

James Harris

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Jul 18, 2021, 6:13:51 PMJul 18
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On 12/07/2021 22:51, muta...@gmail.com wrote:
> On Monday, July 12, 2021 at 11:45:34 PM UTC+10, muta...@gmail.com wrote:
>
>> It occurs to me that in that situation I can have
>> a "desperation mode" where I instead set up
>> 1 MiB regions of free memory, which should
>> satisfy quite a lot of applications.
>
> Actually I can do all that while in protected mode.
>
> I start with memory below 1 MiB being made available
> to PDOS/386, and then attempt to enable A20 via the
> official BIOS interrupt.

A20 has to be enabled before entering PMode. Processor operation is
undefined otherwise.

Rod checked up and found that to be true for both Intel and AMD. See his
various comments in

https://groups.google.com/g/alt.os.development/c/uRhADf8_nS8/m/aYn-cJ7klicJ

>
> Then if I detect that A20 is not enabled, I can present
> the user with options:
>
> 1. Manipulate hardware to try to enable A20 (your funeral).
>
> 2. Enable "desperation mode" (technically sound).
>
> 3. Enable desperation mode and then email Jens to carpet
> bomb Taiwan for making you lose half your memory and
> fragmenting what remains into 1 MiB chunks so that you
> can no longer run a 3 MB executable like gccwin (recommended).

If you want processors to perform to spec you have to ensure A20 is
enabled before entering PMode.

As for how, I think Rod already pointed you to this table

http://aodfaq.wikidot.com/mc-a20-controls

Contrast the "KBC Method" column with that for "BIOS Control".


--
James Harris

Joe Monk

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Jul 19, 2021, 1:01:15 PMJul 19
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> A20 has to be enabled before entering PMode. Processor operation is
> undefined otherwise.

> If you want processors to perform to spec you have to ensure A20 is
> enabled before entering PMode.

All modern PC's start with A20 enabled.

As you can see from the provided example: http://www.scs.stanford.edu/05au-cs240c/lab/i386/s10_05.htm there is no check to see if A20 is enabled before going to protected mode.

Joe

James Harris

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Jul 20, 2021, 7:42:07 AMJul 20
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On 19/07/2021 18:01, Joe Monk wrote:
>
>> A20 has to be enabled before entering PMode. Processor operation is
>> undefined otherwise.
>
>> If you want processors to perform to spec you have to ensure A20 is
>> enabled before entering PMode.
>
> All modern PC's start with A20 enabled.

Er, how are you defining "modern"?

If the code is started in 32-bit or 64-bit mode I would agree that
there's no need to run any A20-enable routine.

But if one is writing 16-bit code there are two choices:

1) Assume a 'modern' PC.

2) Check that it's modern enough.

The assumption is unnecessary as checking is easy. And the check is
probably best as a check for A20 state anyway.

Furthermore, - as you may have noticed - Paul is targetting PCs so old
they would not fit your idea of modern.

>
> As you can see from the provided example: http://www.scs.stanford.edu/05au-cs240c/lab/i386/s10_05.htm there is no check to see if A20 is enabled before going to protected mode.

I wouldn't expect code in the 80386 manual to do such a check as the A20
Gate was part of the PC architecture, not part of the Intel CPU spec.


--
James Harris

wolfgang kern

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Jul 20, 2021, 10:04:11 AMJul 20
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On 20.07.2021 13:42, James Harris wrote:
...
>> All modern PC's start with A20 enabled.

> Er, how are you defining "modern"?

all my machines don't even have an A20 gate anymore, since 2010.
but I kept the few bytes to check ffff:0010 isn't equal to 0:0.
__
wolfgang

James Harris

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Jul 20, 2021, 1:56:03 PMJul 20
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On 20/07/2021 15:04, wolfgang kern wrote:
> On 20.07.2021 13:42, James Harris wrote:
> ...
>>> All modern PC's start with A20 enabled.
>
>> Er, how are you defining "modern"?
>
> all my machines don't even have an A20 gate anymore, since 2010.

All your machines are chosen to be of the same kind, aren't they? IIRC
you were buying and selling machines which were specifically intended to
be the same as each other so you could rely on their hardware being
compatible.


> but I kept the few bytes to check ffff:0010 isn't equal to 0:0.

Very sensible. It's virtually cost-free assurance.


--
James Harris

Joe Monk

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Jul 20, 2021, 7:32:50 PMJul 20
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The Intel programming guide since 2013 has said that the A20M# pin may not be present.

Joe

wolfgang kern

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Jul 21, 2021, 2:02:37 AMJul 21
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On 20.07.2021 19:56, James Harris wrote:
...
>>>> All modern PC's start with A20 enabled.

>>> Er, how are you defining "modern"?

>> all my machines don't even have an A20 gate anymore, since 2010.

> All your machines are chosen to be of the same kind, aren't they? IIRC
> you were buying and selling machines which were specifically intended to
> be the same as each other so you could rely on their hardware being
> compatible.

yes all from one vendor but different generations 2010/2014/2018.
there were a few software things to modify for a hardware change.

>> but I kept the few bytes to check ffff:0010 isn't equal to 0:0.
> Very sensible. It's virtually cost-free assurance.

it was cheaper to keep it :)
; push -1
; pop es I need this four anyway
; push 0 done during boot once
; pop ds
66 A1 00 00 mov eax,[0000]
36 66 3B 06 10 00 cmp eax,[es:0010]
74 xx JZ ... ;A20 failed
__
wolfgang

James Harris

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Jul 25, 2021, 11:59:07 AMJul 25
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On 21/07/2021 07:02, wolfgang kern wrote:
> On 20.07.2021 19:56, James Harris wrote:

...

>>> all my machines don't even have an A20 gate anymore, since 2010.

...

>>> but I kept the few bytes to check ffff:0010 isn't equal to 0:0.
>> Very sensible. It's virtually cost-free assurance.
>
> it was cheaper to keep it :)
> ; push -1
> ; pop es          I need this four anyway
> ; push 0          done during boot once
> ; pop ds
> 66 A1 00 00       mov eax,[0000]
> 36 66 3B 06 10 00 cmp eax,[es:0010]
> 74 xx             JZ ... ;A20 failed

Presumably you know those locations cannot be equal. I have code which
does something similar to yours

mov ax, [A20_TEST_WORD]
cmp ax, [es: A20_TEST_WORD + 16]
jne .enabled

but in case the values just happen to be the same I follow it with

not ax ;Set a different value
mov [A20_TEST_WORD], ax
cmp ax, [es: A20_TEST_WORD + 16]
not ax ;Get back old value (without changing flags)
mov [A20_TEST_WORD], ax ;Restore memory (without changing flags)
jne .enabled ;Branch on result of the compare instruction


which I expect you regard as bloat! :-)


--
James Harris

wolfgang kern

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Jul 25, 2021, 8:36:57 PMJul 25
to
On 25.07.2021 17:59, James Harris wrote:

>>>> all my machines don't even have an A20 gate anymore, since 2010.

>>>> but I kept the few bytes to check ffff:0010 isn't equal to 0:0.
>>> Very sensible. It's virtually cost-free assurance.
>> it was cheaper to keep it :)
>> ; push -1
>> ; pop es          I need this four anyway
>> ; push 0          done during boot once
>> ; pop ds
>> 66 A1 00 00       mov eax,[0000]
>> 36 66 3B 06 10 00 cmp eax,[es:0010]
>> 74 xx             JZ ... ;A20 failed

> Presumably you know those locations cannot be equal. I have code which
> does something similar to yours
>
>   mov ax, [A20_TEST_WORD]
>   cmp ax, [es: A20_TEST_WORD + 16]
>   jne .enabled

> but in case the values just happen to be the same I follow it with

>   not ax                   ;Set a different value
>   mov [A20_TEST_WORD], ax
>   cmp ax, [es: A20_TEST_WORD + 16]
>   not ax                   ;Get back old value (without changing flags)
>   mov [A20_TEST_WORD], ax  ;Restore memory (without changing flags)
>   jne .enabled             ;Branch on result of the compare instruction

> which I expect you regard as bloat! :-)

I may not see it as bloat because 16 bits could really be equal
so I call it James-styled aka double featured as usual :)
__
wolfgang
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