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32-bit z/Arch

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muta...@gmail.com

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Sep 2, 2021, 4:23:01 AM9/2/21
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Not quite there yet - current status is here:

https://gcc.gnu.org/pipermail/gcc/2021-September/237215.html

Joe Monk

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Sep 4, 2021, 9:21:33 PM9/4/21
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On Thursday, September 2, 2021 at 3:23:01 AM UTC-5, muta...@gmail.com wrote:
> Not quite there yet - current status is here:
>
> https://gcc.gnu.org/pipermail/gcc/2021-September/237215.html

"I think z/OS is pretty much still 31-bit only,
as far as apps are concerned, right? I’d like to
bump that up to 32-bit."

No, thats not correct. CICS, DB/2, IMS DB/DC, and most LE compilers (PL/I, COBOL, FORTRAN, C) are all 64-bit.

Joe

Joe Monk

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Sep 4, 2021, 9:51:26 PM9/4/21
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"I wish to demonstrate the minor changes
that would have been required to the S/360 so that
we would never have arrived at a 31-bit black hole,
and we could have in fact had the perfect 32-bit
machine."

They were not "minor" changes. For example, the S/360 used core memory. How much more memory (and hardware changes) would have been required to implement 32-bit memory as opposed to the 24-bit memory?

Joe

Joe Monk

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Sep 5, 2021, 12:40:47 PM9/5/21
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> They were not "minor" changes. For example, the S/360 used core memory. How much more memory (and hardware changes) would have been required to implement 32-bit memory as opposed to the 24-bit memory?

For instance, from the 360-91 functional characteristics, the processor storage capabilities, the system could only have 2MB of main storage, and 4MB of extended storage.

In 1960's memory was approximately $2.6 million per megabyte. So, a fully loaded 360-91 with 6 megabytes of storage was north of $12 million in 1960 dollars.

According to the inflation calculator, $1 in 1960 buys the same as $10 today. So, the same computer in todays dollars was $120 million! And IBM spent $5 billion in 1960 dollars to develop the 360...

Joe


Joe Monk

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Sep 6, 2021, 7:07:31 PM9/6/21
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Finally, I would point out that the IBM 360 instruction set is incompatible with 32-bit addresses.

For instance, LA clears the top 8 bits... (p.56)

"The address specified by the X2, B2, and D2 fields is inserted in bits 8-31 of the general register specified by R1. Bits 0-7 are set to zero. The address is not inspected for availability, protection, or resolution."

BXH and BXLE use signed arithmetic... (p.66)

"All 32 bits of the general registers participate in the operations, and negative quantities are expressed in two's-complement notation."

http://www.bitsavers.org/pdf/ibm/360/princOps/A22-6821-7_360PrincOpsDec67.pdf

Joe

muta...@gmail.com

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Sep 29, 2021, 8:12:10 PM9/29/21
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Jesus Antonio now has this working on standard z/Arch:

https://gcc.gnu.org/pipermail/gcc/2021-September/237457.html

BFN. Paul.
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