Soft-UART, a different approach

[Josef Moellers]

Hi,

I need a soft-UART in an ATmega168PA which has to perform a few other
duties (eg reading DS1820s) in parallel.

I know of the two approaches:
* wait for the falling edge at the start bit, then start a timer and at
each OCRA interrupt, sample the RxD pin
* let the timer run freely (with a higher frequency), then sample the
RxD pin and eg use a state machine to determine what to do with the
state of RxD.

I have been thinking about using different approach, using a
Pin-Change-interrupt and then calculate the received bits from the
deltaT between the last PCI and this one.
I need 9600 bps, system clock is 16MHz and I think that running TIMER0
with clk[I/=]/64 should work:
when I get the falling edge of the start bit, I start the timer.
when I get the next rising edge, I determine the number of clock ticks
and eg
when they are less that 39, then only a single bit has arrived
when they are less then 65, then two identical bits have arrived ...

If I use eg TIMER0 (8-bit), then the timer reaches TOP (255) somewhere
inside the STOP bit, which sounds perfect to me.

Has this been tried before?

Josef