486sx to dx with drill.
Mikael J E Himanka
somekindof restrictor. And by drilling a small hole in the right place
your sx turned into an dx. Jargon's 'crippleware' gives a description of
something similar. Does anyone have facts?
"Thou shalt not make a machine in the likeness of a human mind" F. Herbert
Mikael "kika" Himanka ki...@iki.fi +358-(0)40-5248344 www.iki.fi/kika
Eivind
> I remember hearing back in 92 that Intel 486sx was actually 486dx
>with somekindof restrictor. And by drilling a small hole in the right
>place your sx turned into an dx. Jargon's 'crippleware' gives a
>description of something similar. Does anyone have facts?
It's cheaper to make one sort of chip than two different ones. So it'd
make sense to make the SX the same way they made the DX, only with the
FPU masked off somehow. I think I've read that that was indeed what
Intel did, but I can't find the reference just now to where I read it.
In any case it's probably a bit trickier to re-enable the FPU then to
drill a hole.
mvh,
Eivind
Iain Bennett
> It's cheaper to make one sort of chip than two different ones. So it'd
> make sense to make the SX the same way they made the DX, only with the
> FPU masked off somehow. I think I've read that that was indeed what
> Intel did, but I can't find the reference just now to where I read it.
The 487SX co-processor chip was actually 486SX chip with a working FPU
(would that make it a DX?) that disabled the original SX chip. :o)
Terry Murphy
Eivind <e...@vestdata.no> wrote:
>It's cheaper to make one sort of chip than two different ones. So it'd
>make sense to make the SX the same way they made the DX, only with the
>FPU masked off somehow.
Somehow I doubt this is true. For high volume parts the main cost is
manufacturing. The smaller the die is, the more parts you are going to
get per wafer, and the cheaper your cost is going to be (c.f. the
Celeron where a smaller cache makes the chip significantly smaller and
cheaper). I think that the FPU was big relative to the whole chip in
those days (wasn't the 387 the same size as the 386?), so this would be
a significant waste of silicon. If they did indeed do it, I suspect it
was by means of some switch in the packaging, which would
enable/disable the FPU circuity (which is something like how the MP
support in the Celeron is accessed).
-- Terry
Odell, Pat, Bill, and Adam
Iain Bennett wrote:
~~ snipped ~~
> The 487SX co-processor chip was actually 486SX chip with a working FPU
> (would that make it a DX?) that disabled the original SX chip. :o)
~~ snipped ~~
Don't ya just love Intel. Instead of putting in a CO-processor they just
shut down the original cpu and shunt everything to the "co"-processor. "Why
give the customer what they want when we can make them want to upgrade in
two years because they think their souped up system can't handle squat."
The computing power of a 486sx coupled with, not subverted by, a 487sx
(486dx) would be wondrous. I mean it may not compare with a P!!! generation
chip as far as speed and multimedia and 3D; but that would give you 64 bit
processing (32 bit parallel), wouldn't it? That's the datapath of a
Pentium. If I could figure a way to disable that disabling function of that
setup, whether on the board or on the chip, I would be buying 486 chips and
boards by the hundreds. Think of the data crunching ability of a base T100
network made up of about ten of these dual-processor units. Anything that
required gobs of data analysis, with or without 3D data, would be cake.
SETI, for example, or any kind of radio/optical/IR/ telescope data/image
analysis. The only expensive piece you would need would be the server.
Gad, I do not like the way Intel treats customers!
Some of this stuff may be incorrect. But that would still be a powerful
system, no matter how you look at it.
Tincyr
--
"Intel Inside"(r), the world's most misunderstood warning label. Buy AMD!
Tincyr
TheCentralSc...@pobox.com
<TheCentralSc...@pobox.com> wrote:
>
>The SX was probably DX's that failed the FPU test. A fusible link
>probably disabled the FPU to turn the chip into an SX.
>
>Kinda like how different speed chips designed differently. The lots are
whoops: bad editing: ^are not
>tested and if they can pass the higher speed test then that is what
>they're rated at.
--
David Rifkind
wrote:
>In article <Pine.LNX.4.10.99060...@solo.hib.no>,
>Eivind <e...@vestdata.no> wrote:
>
>>It's cheaper to make one sort of chip than two different ones. So it'd
>>make sense to make the SX the same way they made the DX, only with the
>>FPU masked off somehow.
>
>Somehow I doubt this is true. For high volume parts the main cost is
>manufacturing. The smaller the die is, the more parts you are going to
>get per wafer, and the cheaper your cost is going to be (c.f. the
>Celeron where a smaller cache makes the chip significantly smaller and
>cheaper). I think that the FPU was big relative to the whole chip in
>those days
That's the reason for one of the other rumors--that SXs were made from
486 chips that failed the FPU tests.
>(wasn't the 387 the same size as the 386?), so this would be
>a significant waste of silicon. If they did indeed do it, I suspect it
>was by means of some switch in the packaging, which would
>enable/disable the FPU circuity (which is something like how the MP
>support in the Celeron is accessed).
--
"Generally speaking, things have gone about as far as they can possibly
go when things have got about as bad as they reasonably get."
Mike Swaim
: The SX was probably DX's that failed the FPU test. A fusible link
: probably disabled the FPU to turn the chip into an SX.
because yields of DX chips were good enough that they didn't have enough
with bad FPUs to satisfy the demand for the SX.
--
Mike Swaim, Avatar of Chaos: Disclaimer:I sometimes lie.
Home: sw...@c-com.net
Alum: sw...@alumni.rice.edu Quote: "Boingie"^4 Y,W&D
Mark P.
> On Thu, 3 Jun 1999, Mikael J E Himanka wrote:
>
> It's cheaper to make one sort of chip than two different ones. So it'd
>
> make sense to make the SX the same way they made the DX, only with the
>
> FPU masked off somehow. I think I've read that that was indeed what
> Intel did, but I can't find the reference just now to where I read it.
>
> mvh,
> Eivind
It's my understanding that there was "one" die shared between the
486sx and dx series. During manufacture, you can expect a certain
percentage of failures. Many will make the chip useless for anything but
jewelry( I still carry one on a key chain ). A certain number will have
errors in the FPU section only. These will get packaged as the -SX.
The ones that pass all levels of testing get the -DX label. To disable
the defective FPU, a jumper is either laser burned out, fuse blown, or
wired over to something else in the package before the cpu is sealed
in. I don't remember which was used by Intel. If you were lucky, you
could possibly drill into the case just far enough to nick a jumper wire
and re-activate the FPU if that is how it was actually manufactured.
But I would be real suspicious of one that was shut down.
It makes good economic sense to do it this way, because you will end
up with more salable chips. Remember how expensiv even a SX was back
then? In fact, I understand that it is standard to make memory chips
with extra banks and use them to replace a section that fails. Probably
done in the chip foundry's automation.
note: I don't use X's in my E-Mail address.
bill_h
> DX-100 which is less powerful than a Pentium 75.
Sorry to disagree but there is a DX4-100 that will
beat any 60/66/75 Pentium in almost every software
comparison, other things being equal (particularly
the hard drive access & speed).
Bill
Tucson
bme...@bruce.cs.monash.edu.au
>> It's cheaper to make one sort of chip than two different ones. So it'd
>> make sense to make the SX the same way they made the DX, only with the
>> FPU masked off somehow. I think I've read that that was indeed what
>> Intel did, but I can't find the reference just now to where I read it.
>The 487SX co-processor chip was actually 486SX chip with a working FPU
>(would that make it a DX?) that disabled the original SX chip. :o)
And the original confusion about "drilling a hole" probably comes from a
bad translation from German. In German, the practice of getting something
from an item that the item was never meant to give (like getting FPU
functionality from an SX chip) is called "Aufbohren", or roughly "to
drill up". I suspect it comes from the practice of boring(?) out the cylinders
of car engines to achieve more power, for which the same term is used.
Bernie
--
============================================================================
"It's a magical world, Hobbes ol' buddy...
...let's go exploring"
Calvin's final words, on December 31st, 1995
Foobar T. Clown
I'll confirm that. Back when the DX4-100 was the hottest new chip, my
boss gave me $4K to buy a PC. He said, "get a good one because it's
going to be on your desk for a long time."
I got a good one. Huge L2 cache, lots of memory, high performance disk
and controller. Two years later, he bought a bunch of
bottom-of-the-line pentium systems. My "old" 486 ran rings around them.
TheCentralSc...@pobox.com
>sam@greenaumARSE!ARSE!ARSE!.demon.co.uk wrote:
>
>> DX-100 which is less powerful than a Pentium 75.
>
>Sorry to disagree but there is a DX4-100 that will
>beat any 60/66/75 Pentium in almost every software
>comparison, other things being equal (particularly
>the hard drive access & speed).
Cites?
When I had a cyrix 586 @ 120mhz it typically benched as a 90mhz pentium.
Heinz W. Wiggeshoff
John Savard
>>It's cheaper to make one sort of chip than two different ones. So it'd
>>make sense to make the SX the same way they made the DX, only with the
>>FPU masked off somehow.
>Somehow I doubt this is true. For high volume parts the main cost is
>manufacturing. The smaller the die is, the more parts you are going to
>get per wafer, and the cheaper your cost is going to be (c.f. the
>Celeron where a smaller cache makes the chip significantly smaller and
>cheaper). I think that the FPU was big relative to the whole chip in
>those days (wasn't the 387 the same size as the 386?), so this would be
>a significant waste of silicon. If they did indeed do it, I suspect it
>was by means of some switch in the packaging, which would
>enable/disable the FPU circuity (which is something like how the MP
>support in the Celeron is accessed).
It was true - although they may have made "true" 486 SX chips later in
the production run.
John Savard ( teneerf<- )
http://members.xoom.com/quadibloc/index.html
euph...@freenet.co.uk
On 1999-06-03 him...@cc.helsinki.fi said:
:I remember hearing back in 92 that Intel 486sx was actually 486dx
:with somekindof restrictor. And by drilling a small hole in the
:right place your sx turned into an dx. Jargon's 'crippleware' gives
:a description of something similar. Does anyone have facts?
The first few 486sx chips were 486dx chips with the FPU disabled,
certainly. It was easier and cheaper for Intel to do it that way, since
fab costs nothing, they needed a cheaper version of the 'dx, and they'd
already invested a great deal of R&D. Basically flicking a switch is a
lot cheaper than chopping the thing out altogether.
Eventually, though I think they switched over to making 'sxes that were
simply the integer bit - probably after everyone made such a fuss about
it. Surely everybody must have realised that the actual silicon only
cost Intel as much to make as a 286? The $500 tag is simply to recoup
development costs. That's standard practice.
--
Communa -- you know soft spoken changes nothing
TheCentralSc...@pobox.com
<euph...@freenet.co.uk> wrote:
>
>Eventually, though I think they switched over to making 'sxes that were
>simply the integer bit - probably after everyone made such a fuss about
>it. Surely everybody must have realised that the actual silicon only
>cost Intel as much to make as a 286? The $500 tag is simply to recoup
>development costs. That's standard practice.
Dammit, I wan't my money back! There's $0.000001 less sand in an SX!
Actually the reengineered SX was probably a lot more cheaper to make as
more could fit on a die and there's way more cost to making a chip than
the cost of the raw materials.
bill_h
> On Thu, 03 Jun 1999 17:54:45 -0700, bill_h <bil...@sunsouthwest.com> wrote:
> >sam@greenaumARSE!ARSE!ARSE!.demon.co.uk wrote:
> >> DX-100 which is less powerful than a Pentium 75.
> >Sorry to disagree but there is a DX4-100 that will
> >beat any 60/66/75 Pentium in almost every software
> >comparison, other things being equal (particularly
> >the hard drive access & speed).
> Cites?
Gee, I give up. What's ''cites'' got to do with anything?
I'm saying Intel came up with a chip so hot they almost
immediately dropped it and have tried to bury any mention
of it ever since. This chip is living proof their Pentium
ads were a fraud and lies, at least until they got past
maybe 90/100mhz.
The hard part is finding a motherboard that is solid at
50mhz, without hobbling back down with wait states.
Very very few were. As it happened, I got a couple Spire
Technology boards, after talking to Mike Meissner about which
ones he'd done some work on and knew about. I wanted the four
floppy drive support he usually wrote into his BIOSes.
Not only solid 50mhz, but the bus-mastering actually works,
too. AND the write-back cache. ''Dirty bit'' and all.
You can tell the DX4-100 by two things: &EW (instead of &E) and
the mask set revision number: SK-096. This chip has 16k write-back
cache, and will run fine in /2 clock mode at 50mhz. Compared to
the early generation Pentiums, 50mhz memory bus was blazingly fast.
So anything heavy on register <--> memory transfers, such as image
processing, beat the slow Pentiums hands down.
Cite me.
Bill
Tucson, AZ
Luc Van der Veken
04 Jun 1999 16:33:55 -0700);
> TheCentralSc...@pobox.com wrote:
> > On Thu, 03 Jun 1999 17:54:45 -0700, bill_h <bil...@sunsouthwest.com> wrote:
> > >sam@greenaumARSE!ARSE!ARSE!.demon.co.uk wrote:
> > >> DX-100 which is less powerful than a Pentium 75.
> > >Sorry to disagree but there is a DX4-100 that will
> > >beat any 60/66/75 Pentium in almost every software
> > >comparison, other things being equal (particularly
> > >the hard drive access & speed).
> > Cites?
>
> Gee, I give up. What's ''cites'' got to do with anything?
>
> I'm saying Intel came up with a chip so hot they almost
> immediately dropped it and have tried to bury any mention
> of it ever since. This chip is living proof their Pentium
> ads were a fraud and lies, at least until they got past
> maybe 90/100mhz.
Did you mean "so hot" literally?
I've been using a DX4-100 for a year or two: to the naked eye, it
reached about the same speed as a P90 I was using at the same
time.
A few times, I couldn't resist the temptation to touch the cooler
after it had been running with the computer case open for a few
hours: it wasn't hot at all. Warm, yes, but not hot: about the
same as a P133 under the same circumstances (which means less hot
than a pentium in most Compaq machines, because those don't use
CPU fans).
Chip temperature is something you can't measure this way, sadly
;-)
The PII/300's I'm using now OTOH, can best be described as "cold"
in comparison (my office machine: maybe 30-40 centigrade, with a
big cooler but *no* CPU fan, my home machine: < 30 degrees, with
super-de-luxe high quality fan). All "measured" with the naked
skin, mind you - don't take these figures as very accurate.
Jeffrey Keith Boulier
bill_h <bil...@sunsouthwest.com> wrote:
>Cite me.
From John Di Marco's collection of SPEC results, posted on a regular basis
to comp.arch.
System CPU ClkMHz Cache SPECint SPECfp Info Source
Name (NUMx)Type ext/in Ext+I/D 92 92 Date Obtained
================= ========== ======= ========== ======= ======= ===== =========
Compaq Deskpro 80486DX2 33/66 256+8 32.2 16.0 Mar93 SPEC news
Micronics M4P 80486DX4 33/100 256+16 51.4 26.6 Mar94 c.arch
Mobius P5-60 Pentium 60 ? 50.0 46.7 Jan94 c.sun.hw
Compaq DeskproXL Pentium 66 256+8/8 65.1 63.6 Sep93 SPEC news
Intel Xpress Pentium 60 256+8/8 70.4 55.1 Mar95 www.intel
Intel Xpress Pentium 66 256+8/8 78.0 63.6 Mar95 www.intel
The large discrepancy between the Mobius P5-60 and the Intel Xpress might
be due to the compilers used -- by '95 compilers abounded which adequately
optimized for the Pentium.
If you have other benchmarks, it would be nice to post them. SPECint/fp
are generally good, but are certainly not the be all and end all of
benchmarking.
--Jeffrey Boulier
Hunter Sedai
<SNIP>
>It's cheaper to make one sort of chip than two different ones. So it'd
>make sense to make the SX the same way they made the DX, only with the
>Intel did, but I can't find the reference just now to where I read it.
>mvh,
> Eivind
>
Actually, on the first 486SXs actually had FPUs on them. They were
originally a batch of DX chips where the FPU was somehow flawed, so
Intel decided to make more money, and instead of melting them down,
disabled the FPU and remarked them as SX chips. They sold very well, and
Intel decided to make a new CPU, the 486SX. These chips actually have no
FPU, along with having a weaker logic unit than the DX. Therefore, you
can't actually re-enable the FPU, since it doesn't exist. Also, the
co-processor would not be a DX, but simply a 487SX since it would have
the weaker logic unit of an SX.
--Hunter"wondering, can I could stick a 80186 on an 8086 mobo?"S.
Matthew Gates
you're running. I'm pretty sure my AMD 486 DX4-120
compates pretty well to a P60 for a lot of
software, but if the software is compiled with
lots of Pentium optimisations (Quake being a
notable example), the 486 looks more like a 286.
On this topic, how much difference does it make
turning on optimisations for "average" code?
Stuff like W95 must be capable of running from
what, a 386 up, so what processor is it optimised
for? I'd guess it's tweaked for average
performance on all processors, or is there code
for each which linked in at runtime depending on
the machine (I doubt this)?
Didn't Win 3.1 have a cmdline switch (/3) to
enable 386 enanced code, or was that something
else?
Those of us running open source OS's can
re-compile performance critical stuff with all
those optimisations if we like. No such luxury
for the Microsoft user (I'd like to see the
warnings any half decent compiler would _throw up_
when fed MS OS code ;)
----------------------------------
Matt v0.24 Alpha (unstable)
Purgamentum init, exit purgamentum
David Wragg
Sitting in front of me I have a 486SX, a DX, and a DX2.
The metal cover on the undersides of the DX and DX2 are about an inch
square. On the SX it is about 3/4 of an inch by an inch.
So has anyone seen an SX with a square cover?
David Wragg.
BKoons2489
with there warp sense of marketing ideas decided to install an extra "upgrade"
socket. All they planned on doing was to sell you back what you paid for in
the first place: a 486DX!
ACME
euph...@freenet.co.uk
On 1999-06-05 Oly...@prodigy.net said:
:--Hunter"wondering, can I could stick a 80186 on an 8086 mobo?"S.
Nearly. The V30 executes the 186 instruction set, adds about 10% to the
speed of an XT (more if you have a lot of programs using the more
complex instructions and addressing modes - LEA becomes useful with a
V30) and doesn't dither for quite so long over jumps...
euph...@freenet.co.uk
On 1999-06-05 ma...@noggin.the.nog.net(MatthewGates) said:
:I would imagine it depends a lot of what software
:you're running. I'm pretty sure my AMD 486 DX4-120
:compates pretty well to a P60 for a lot of
:software, but if the software is compiled with
:lots of Pentium optimisations (Quake being a
:notable example), the 486 looks more like a 286.
Actually, I'd be surprised if the 486 performed *that* badly. The 486
pipeline is pretty much the same as the Pentium's U pipeline, I believe,
and does pretty well on simple instructions; the only advantage the
Pentium gives is that you can pair up those simple instructions. For
complex runs, the two would probably average out at about the same.
(Except for pops and pushes, which are 4 cycle instructions on the 486,
and 1 cycle on the Pentium. Dunno why that happens... *shrug*)
Pete Fenelon
> Cites?
> When I had a cyrix 586 @ 120mhz it typically benched as a 90mhz pentium.
I had an AMD 133MHz 486... generally kicked the stuffing out of P75s on
integer stuff and easily rivalled P90s on anything that stuck in cache.
Once things started hitting RAM it got a little more pedestrian...
pete
--
pe...@fenelon.com `there's no room for enigmas in built-up areas' HMHB
Ben Hutchings
: On Thu, 03 Jun 1999 17:54:45 -0700, bill_h <bil...@sunsouthwest.com>
: >Sorry to disagree but there is a DX4-100 that will
: >beat any 60/66/75 Pentium in almost every software
: >comparison,
: Really cos I'm using one as I type this very message? I heard it was
: just below the 66 but above the 60.
<snip>
75 MHz Pentiums use a 50 MHz memory bus, so in many cases they run
more slowly than a 66 or even 60 MHz Pentium.
--
Any opinions expressed are my own and not necessarily those of Laser-Scan.
gla...@glass2.lexington.ibm.com
>
>
>On 1999-06-05 Oly...@prodigy.net said:
> :--Hunter"wondering, can I could stick a 80186 on an 8086 mobo?"S.
>
>Nearly. The V30 executes the 186 instruction set, adds about 10% to the
>speed of an XT (more if you have a lot of programs using the more
>complex instructions and addressing modes - LEA becomes useful with a
>V30) and doesn't dither for quite so long over jumps...
>Communa -- you know soft spoken changes nothing
>
have the manual at home on the V20/V30. Maybe.
Dave
P.S. Standard Disclaimer: I work for them, but I don't speak form them.
Simon
>
> In <7jcqb8$61b$2...@news1.cableinet.co.uk>, euph...@freenet.co.uk writes:
> >
> >On 1999-06-05 Oly...@prodigy.net said:
> > :--Hunter"wondering, can I could stick a 80186 on an 8086 mobo?"S.
> >
> >Nearly. The V30 executes the 186 instruction set, adds about 10% to the
> >speed of an XT (more if you have a lot of programs using the more
> >complex instructions and addressing modes - LEA becomes useful with a
> >V30) and doesn't dither for quite so long over jumps...
> >
> have the manual at home on the V20/V30. Maybe.
>
V30 = 8086 replacement
Both had the 80186/80188 instruction set and shorter instruction timings
on some opcodes. IIRC they used less power too.
Simon.
--
--------------------------------------------------------------------------
Simon J. Harris email: s.j.h...@ic.ac.uk
Mechatronics in Medicine Laboratory, tel: 0171 589-5111 x 57068
Department of Mechanical Engineering, http://www.me.ic.ac.uk/case/mim
Imperial College of Science, Technology and Medicine,
Exhibition Road, London SW7 2BX
--------------------------------------------------------------------------
Carlton Dramatic Society web site: http://come.to/carltondrama
--------------------------------------------------------------------------
Luc Van der Veken
1999 15:52:19 +0100);
> V20 = 8088 replacement
> V30 = 8086 replacement
> Both had the 80186/80188 instruction set and shorter instruction timings
> on some opcodes. IIRC they used less power too.
And they also had a Z80 emulation mode, especially for us
folklore lovers.
I must still have a Z80 CP/M emulator somewhere that ran under
MS-DOS, but required a V20/V30. Sadly, I never had a V-anything
processor (here in Belgium they seemed very hard to get at), and
the only one software emulator I ever found really sucked in
speed.
Darren Tucker
Jeffrey Keith Boulier <jeff...@gwis2.circ.gwu.edu> wrote:
[comparison of 486 & Pentium class machines snipped]
>If you have other benchmarks, it would be nice to post them. SPECint/fp
Since I have access to one each of the aforementioned machines,
I got curious. I ran distributed.net's rc5des cracker in benchmark
mode, speed[ufc|fcrypt|xform] from Crack 4.1, Dhrystone 2.1 and
Whetstone double precision benchmarks.
Everything except rc5des built with egcs -O6 -fomit-frame-pointer -m486.
Benchmark Pentium 90 i486DX4/100 Am586/133
RC5 kkeys/sec 127,359 102,672 129,775
DES kkeys/sec 456,180 235,512 301,110
fcrypt/sec 2414.3 2145.4 2347.8
xform/sec 2963.3 2847.2 3138.8
ufc/sec 1615.0 1787.5 728.3
dhrystones/sec 154511 89637 66067
whetstone(dp) MFLOPS 47.473 17.786 25.911
Disclaimer: they're *benchmarks*. They may not reflect anyone's else's
view of reality. Or even mine.
--
Darren Tucker. (dtucker at the domain zip dot com dot au)
A programmer is a device for converting caffeine into source code.
euph...@freenet.co.uk
On 1999-06-07 luc...@null.net(LucVanderVeken) said:
[V20/30]
:And they also had a Z80 emulation mode, especially for us
:folklore lovers.
No, they didn't; they had an 8080 mode. Still pretty handy for CP/M, as
it was written for an 8080, but a lot of programs weren't. otoh, I
believe the V25/V35 did emulate a Z80 (but they weren't drop-in
replacements for the 8088/86).
euph...@freenet.co.uk
On 1999-06-08 tu...@dingo.dodgy.net.au(DarrenTucker) said:
:Jeffrey Keith Boulier <jeff...@gwis2.circ.gwu.edu> wrote:
:[comparison of 486 & Pentium class machines snipped]
:>If you have other benchmarks, it would be nice to post them.
:>SPECint/fp
:Since I have access to one each of the aforementioned machines,
:I got curious. I ran distributed.net's rc5des cracker in benchmark
:mode, speed[ufc|fcrypt|xform] from Crack 4.1, Dhrystone 2.1 and
:Whetstone double precision benchmarks.
Erm, one thing to bear in mind is that the Pentium's FPU was heavily
optimised, and consequently wipes the floor with the 486's. That's going
to have an impact on FPU-intensive benchmarks, but a much lesser one on
everyday use of the machine.
Bear in mind that Bill was also talking about using a 486DX4/100 with an
external bus speed of 50MHz. I don't know if he meant it can be switched
to clock doubled mode, or just that it can stand 50% overclocking.
Tobias Goeller
There were a couple of DX4/100s that had a doubler from 50 to
100. The AMD 486DX4/120 had a tripler with external 40MHz. My
Server still runs on this kind of CPU...
CU
Tobias
--
COM.BOX WINET \|/
Tobias Goeller ({o.o})
\./
t.go...@combox.de U
Luc Van der Veken
21:00:12 GMT);
> On 1999-06-07 luc...@null.net(LucVanderVeken) said:
> [V20/30]
> :And they also had a Z80 emulation mode, especially for us
> :folklore lovers.
>
> No, they didn't; they had an 8080 mode. Still pretty handy for CP/M, as
> it was written for an 8080, but a lot of programs weren't. otoh, I
> believe the V25/V35 did emulate a Z80 (but they weren't drop-in
> replacements for the 8088/86).
Possible, but then the description for v2080.com (the emulator I
was talking about) is wrong: it says "Z-80 CP/M emulator" and
"requires V20", or else they added support for the Z80 by
emulating the additional instructions in code (which I would
expect to be rather slow).
CP/M may have been written for the 8080 initially, but I created
several Z-80 apps on it myself, in days back when.
And there were versions (Montezuma, IIRC) of fully Z-80 optimized
CP/M's.
Radio Shack's own CP/M Plus for the TRS-80, OTOH, was pure 8080
code IIRC. So Microsoft didn't do anything new when they used a
386 and 486 to run 8086/88 code :-)
Now this makes me think of Digital (seems I'm jumping from one
topic on the next today): PDP-11's came in different models, with
(again IIRC) different instruction sets. Did Digital deliver
custom-tailored OSes and compilers, or did they use just the
common instruction base?
Wolfram Schmied
Sounds like an advanced version of my TX486DLC/E-40G/A. (Yes, this
message was written using it.) Can anybody enlighten me about the
significance of the LC/E and G/A parts?
Wolfram "it may be slow,but it gives me lots of time to think" Schmied
Alexander Bochmann
> Sounds like an advanced version of my TX486DLC/E-40G/A. (Yes, this
No, the 486DLC stuff was designed for 386 mainboards, just supports the
486 instruction set... A bit faster than a 386DX, and low power (was used
a lot in notebooks for some time).
Alex.
Wolfram Schmied
wrote:
Am I missing something here?
Isn't the 486 just a 386 integrated with a 387 coprocessor?
Wolfram "The House of User" Schmied
Juergen Nickelsen
> Am I missing something here?
> Isn't the 486 just a 386 integrated with a 387 coprocessor?
You are. The 486 has an extended instruction set and executes
instructions in less cycles than a 386. It has indeed the FPU
built-in.
--
Juergen Nickelsen
euph...@freenet.co.uk
On 1999-06-11 wsch...@mail.blinx.de(WolframSchmied) said:
:>No, the 486DLC stuff was designed for 386 mainboards, just
:>supports the 486 instruction set... A bit faster than a 386DX, and
:>low power (was used a lot in notebooks for some time).
:Am I missing something here?
:Isn't the 486 just a 386 integrated with a 387 coprocessor?
I think you are, yes. The 486 had a completely redesigned processor
kernel, which was pipelined and could start a lot of the simpler
instructions in one cycle; it also had an FPU and 8k cache on-chip.
The 486DLC was pin-compatible with a 386dx. The 486SLC was drop-in for a
386sx. They're both 486-compatible kernels, but have lesser amounts of
cache (1k each?) and I don't think either has an FPU. Cyrix designed and
made them; IBM also made them. Evidently so did Toshiba.
Alexander Bochmann
> The 486DLC was pin-compatible with a 386dx. The 486SLC was drop-in for a
> 386sx. They're both 486-compatible kernels, but have lesser amounts of
> cache (1k each?) and I don't think either has an FPU. Cyrix designed and
> made them; IBM also made them. Evidently so did Toshiba.
Texas Instruments, too, and someone else (don't currently remember
which chip manufacturer has the "ST" symbol...).
Alex.
William Hamblen
>The 486DLC was pin-compatible with a 386dx. The 486SLC was drop-in for a
>386sx. They're both 486-compatible kernels, but have lesser amounts of
>cache (1k each?) and I don't think either has an FPU. Cyrix designed and
>made them; IBM also made them. Evidently so did Toshiba.
Texas Instruments also made the 486SLC. The 486SLC was not a speed
demon but at least it didn't need it's own fan and heat sink.
euph...@freenet.co.uk
On 1999-06-12 a...@t.infra.de(AlexanderBochmann) said:
:<euph...@freenet.co.uk> wrote:
:> The 486DLC was pin-compatible with a 386dx. The 486SLC was [8<]
:>has an FPU. Cyrix designed and made them; IBM also made them.
:>Evidently so did Toshiba.
:Texas Instruments, too, and someone else (don't currently remember
:which chip manufacturer has the "ST" symbol...).
SGS-Thomson, the French chip manufacturer who bought Inmos a while back.
Which reminds me. Atari Transputer Workstation - who saw one of those?
Alexander Bochmann
On 12 Jun 1999 23:57:58 GMT, euph...@freenet.co.uk <euph...@freenet.co.uk> wrote:
> Which reminds me. Atari Transputer Workstation - who saw one of those?
I know someone who has such a beast, but he refuses to even talk
about it, because he was so disappointed that it had no networking
support...
Alex.
Wolfram Schmied
> :>No, the 486DLC stuff was designed for 386 mainboards, just
> :>supports the 486 instruction set... A bit faster than a 386DX, and
> :>low power (was used a lot in notebooks for some time).
> :Am I missing something here?
> :Isn't the 486 just a 386 integrated with a 387 coprocessor?
>I think you are, yes. The 486 had a completely redesigned processor
>kernel, which was pipelined and could start a lot of the simpler
>instructions in one cycle;
The performance is better, but functionally speaking, there seems to
be no difference to a 386/387 combination, no?
>it also had an FPU and 8k cache on-chip.
This means there have to be FPU opcodes in the 486 instruction set,hm?
>The 486DLC was pin-compatible with a 386dx. The 486SLC was drop-in for a
>386sx. They're both 486-compatible kernels, but have lesser amounts of
>cache (1k each?) and I don't think either has an FPU.
Software designed for the 486 runs without any trouble on my machine,
and processor detecting software always reports a 486, not a 386.
>Cyrix designed and made them; IBM also made them. Evidently so did Toshiba.
Errr, the TX bit means Texas Instruments. I know, because there's a TI
logo printed on the IC.
Wolfram "now, just what means G/A? go away?" Schmied
Kalle Olavi Niemitalo
> The performance is better, but functionally speaking, there seems to
> be no difference to a 386/387 combination, no?
The 486 has more instructions; BSWAP and XADD come to mind.
See this: http://www.debian.org/Bugs/db/38/38978.html
Ben Hutchings
: On 1999-06-12 a...@t.infra.de(AlexanderBochmann) said:
: :<euph...@freenet.co.uk> wrote:
: :> The 486DLC was pin-compatible with a 386dx. The 486SLC was [8<]
: :>has an FPU. Cyrix designed and made them; IBM also made them.
: :>Evidently so did Toshiba.
: :Texas Instruments, too, and someone else (don't currently remember
: :which chip manufacturer has the "ST" symbol...).
: SGS-Thomson, the French chip manufacturer who bought Inmos a while back.
SGS-Thomson now uses the name "ST Microelectronics", because the ST
logo is so well known.
: Which reminds me. Atari Transputer Workstation - who saw one of those?
Not me. Transputers seem to have gone through a brief period of
fashionability when every microcomputer had to have the option to add
a bunch of them, but the software never appeared. If I am not mistaken,
they were prohibitively expensive.
Wolfram Schmied
I stand corrected. Thanks for the link.
BTW, did you know that the 486 has about 250 instructions, while
QBASIC only has about 220? Sheesh!
Wolfram "takes CISCs" Schmied
Bill Vermillion
>euph...@freenet.co.uk wrote:
>: SGS-Thomson, the French chip manufacturer who bought Inmos a while back.
>SGS-Thomson now uses the name "ST Microelectronics", because the ST
>logo is so well known.
>: Which reminds me. Atari Transputer Workstation - who saw one of those?
>
>Not me. Transputers seem to have gone through a brief period of
>fashionability when every microcomputer had to have the option to add
>a bunch of them, but the software never appeared. If I am not mistaken,
>they were prohibitively expensive.
Specialix used the Transputer in their RIO serial product line.
You could sustain 115K to about 70 serial ports at one time, or
run 124 serial ports with a throughput of about 70Kbs.
There was one Transputer in each 8-bit pod. You could make
a self healing network that changed on the fly if anyone
accidentally disconnected one of the devices.
--
Bill Vermillion bv @ wjv.com