Charlie Gibbs <cgi...@kltpzyxm.invalid> writes:
> Still, you have to bootstrap the supervisor... :-)
... as mentioned upthread both the Multics group (5th flr) and the IBM
science center (4th flr) and come over from the MIT CTSS/7094.
the initial CP67 I got at the univ. had all the assembler source on
OS/360 ... assembler output txt decks were punched and arranged in card
tray prefixed by BPS loader. The cards were IPL'ed, when everything was
loaded into memory, the LDT card had execution transfer to "CPINIT".
CPINIT would write initial IPL text to disk, and then a copy
of memory to disk. IPL'ing the disk would bring in CPINIT but
at an entry that reversed the write to read.
360 IPL read 24bytes into location 0, assumed to be PSW and two I/O CCWs
... and continues the I/O with transfer to first CCW. When I/O finishes,
it loads the "PSW".
Shortly later, the CP group had moved all the source to CMS ... and
assembler output was CMS txt files. Could have a CMS exec that "punched"
to a virtual punch which was transfered to a virtual reader (instead of
the real punch) and the virtual reader IPL'ed and written to disk (which
could either be a disk for a test system, or the production system disk
to update the production system for the next real IPL).
An 80x80 image of the card files (BPS loader followed by all the txt
files) could also be written to tape. I got in habit of keeping
"production system" tapes where the first file was IPL'ed (to restore
that system) ... followed by all the CMS source and other files that
went into making that specific production system.
I was able to discover ... that on transfer from the BPS loader,
that it passed the address of the ESD table and number of entries
in registers ... and did some fiddling that copied the table
to the end of the CP67 kernel ... including it in the image
written to disk.
I mentioned running into the BPS loader 255 ESD external limit and all
sorts of hacks to work around it. Later, at the science center I found
dusty file cabinet that had the source for the BPS loader ... and was
able to update the BPS loader to handle more ESD entries.
Morph from CP67->VM370 was similar ... except all module names had
"DMK" prefix and CPINIT became DMKCPI.
Inside IBM an IOS3270 version of the "green card" was done, I've done
a quick&dirty converstion to HTML ... this is "fixed storage"
http://www.garlic.com/~lynn/gcard.html#4
0: 8 byte IPL PSW
8: 8 byte IPL CCW1
16: 8 byte IPL CCW2
card note: CCW1 would normally read 80-byte image to fixed address,
could be instructions or more CCWs (10) or instructions or combination
of instructions and CCWs. If more CCWs then CCW2 could be a "tic"
command that continued the I/O channel program with the additionsl
CCWs.