86-DOS and CROMENCO Floppy Controller

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Tim Shoppa

Apr 18, 2000, 3:00:00 AM4/18/00
Henry Broekhuyse wrote:
> Barry Watzman <Wat...@neo.rr.com> wrote in message
> news:38FCE524...@neo.rr.com...
> > The Cromemco controllers were the 4FDC, the 16FDC and the 64FDC. The 4FDC
> > was single density, the 16FDC double density. All 3 supported 8" and
> 5.25"
> > drives, but the 8" on the 4FDC and 16FDC was configured for Persci and was
> > somewhat non-standard. I've never seen a 64FDC and don't know anything
> > about it.
> >
> > I am not sure of this, but I think that the Seattle disk controller was
> the
> > Tarbell double density board (I know for a FACT that they supported the
> > Tarbell DD board, I have 86-DOS configured for it).
> On a tangential topic - how did one boot up a system upgraded with the SCP
> 8086 CPU/Support Board/86-DOS combination? Specifically, did SCP provide a
> boot ROM which worked with the existing drive controller, to be specified at
> the time of purchase? Presumably most base systems, before upgrade, would
> have a boot ROM or monitor with 8080/Z80 code which would no longer work
> with the new CPU.

Some of these questions are answered in an old "Configuration
Information" sheet I dug out from my pile of 86-DOS stuff. This
indicates that the boot ROM resides on the SCP Support Card, in
particular it says:

This copy of 86-DOS includes disk drivers for the Cromemco 4FDC
disk controller with two 8" drives (a PerSci 277) and one 5"
drive. Console I/O uses the serial port of the SCP CPU support card,
and printer output goes to the Support Card parallel port.

An error in Cromemco's original design of the 4FDC must be corrected
for it to work properly with the 8086. On the disk controller, bend
pin 11 of IC 28 so that it hangs out of the socket. Add a jumper on
the back of the board between pin 3 of IC 29 and pin 1 of IC 16.
This change will note affect operation of the disk controller when
used with the Z80.

The interrupt circuitry on the Cromemco 4FDC is not initialized
by the Monitor and may prevent the system from working by generating
false interrupts. This can be corrected by bending pin 3 of IC 43
on the disk controller so it hangs out of its socket.

To use more than 48K of memory, switch 1 of the 4FDC must be set to
ON to disable the on-board ROM.

The CPU Support Card should simply be set for normal Monitor
operation, with all switches of S1 on. Monitor version 1.4C or 1.5C
is needed to boot the disk. Switch 0 of S2 may be turned on to
automatically boot without entering the Monitor.

The first two tracks of the disk are reserved for the 86-DOS
system. Track 0, sector 1 is loaded and executed at absolute
address 200 hex by the Boot command of the Monitor. This small
program at 200 hex then loads the rest of track 0 and all of track
1, starting at absolute address 400 hex. Control transfers with
an inter-segment jump to location 400 hex such that the
instruction pointer is 0 and the code segment register is 40 hex
(JMP 0,40H with our assembler).

The I/O system occupies the next 8 sectors (1K bytes) on the
disk after the boot sector, i.e., track 0 sectors 2 through 9. The
present I/O drivers occupy only about half this space.

86-DOS starts on track 0, sector 10. It occupies less than 4K
(32 sectors), which means it overlaps partly onto track 1.

There is nothing sacred about the assignments within the first two
tracks of the disk. In particular, the I/O system may be any size,
with 86-DOS starting right after it. 86-DOS is relocatable to any
16-byte (segment) boundary. See the section in the programming
manual called "Customizing the I/O System" for the I/O system
specifications and the sheet called "Using DEBUG to Modify the
I/O System" for information on changing the I/O system and linking it
to 86-DOS.

Tim Shoppa Email: sho...@trailing-edge.com
Trailing Edge Technology WWW: http://www.trailing-edge.com/
7328 Bradley Blvd Voice: 301-767-5917
Bethesda, MD, USA 20817 Fax: 301-767-5927

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