128 to 256 MB RAM- benefits?
QZ
ME. They just word process and browse the web. I was wondering with ram so
inexpensive, if it would benefit them to get another 128, giving them a
total of 256? I know the word processor won't see anything. But what about
browsing in multiple windows? And loading pictures and graphics? What is the
improvement, if any?
Thanks
HAL9000
think it doesn't. In this case you will see a performance degradation.
If you use heavz-duty programs however you can benefit anyway.
seba
"QZ" <no@mail> wrote in message news:96jsrv$v4q$1...@slb0.atl.mindspring.net...
THOR
because it was so cheap but no performance gain.
"QZ" <no@mail> wrote in message news:96jsrv$v4q$1...@slb0.atl.mindspring.net...
Tony
I have seen cases when moving from 128 to 256 actually choked the
system (particularly old m/b and BIOS). 128 RAM is plenty nof
for their purpose.
--
Remove "NOSPAM" from address for direct e-mail
#######
# #### # # # #
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# # # # # # #
# # # # ## #
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Steve B
"Tony" <NOSPAM...@home.com> wrote in message news:3A8D96FF...@home.com...
BoB
someone switches to whistler then 128 is going to much slower than 128
with any mem hog applications.
One of the msdn beta testers has been running whistler for almost a year
on a 200 mghz laptop with 192 megs of ram. The addition of compatible
ram will not slow down a system. Going above 512 will mess up vcache.
Steve B wrote:
> It seems to make my system faster with processing large graphic
> images. - Steve
>
> "Tony" <NOSPAM...@home.com> wrote in message
> news:3A8D96FF...@home.com...Will not improve
THOR
faster with 256 but on the internet and using m\s word I dont think that it
would ever happen. If you were into video editing it would make a
difference.
"BoB" <rbr...@worldnet.att.net> wrote in message
news:3A8DA3AD...@worldnet.att.net...
Timothy J. Lee
HAL9000 <se...@KILLSPAMwebspiration.net> wrote:
>Check if your cache supports more than 128 mb. With your configuration I
>think it doesn't. In this case you will see a performance degradation.
Don't Pentium II (and Pentium III and Celeron) processors have the
ability to cache 4 GB of memory with their built in caches?
Aren't cacheable memory limitations mainly a problem for socket 7
motherboards with cache in the motherboard (rather than the processor)?
--
------------------------------------------------------------------------
Timothy J. Lee
Unsolicited bulk or commercial email is not welcome.
No warranty of any kind is provided with this message.
BoB
uses a lot of eye and ear candy, my daughter cripples her 128 meg machine(500
mghz) in such a way. I boot with 70 megs empty with 98se on a 128 meg machine.
BoB
slow a machine down. Uncached ram is still used, just at a more inefficient
pace, which still
far outstrips virtual memory.
Ken Morris
Epox MVP3G5 & K6-2/400 running Win2K and the performance gain is noticeable. I
would recommend you go for it as at some point in time you will be upgrading to
Win2k or WinXP.
Today ram is chip, but what about tomorrow. I paid $99.00 minus mail-in rebate
of $30.00 (Canadian prices) for the exact size of memory I paid $199.00 for in
the summer !!!!!
THOR
him with his computer. He said it was slow. When I started it there must
of been 15 things in his taskbar. And thats not counting all the programs
running that did not have an ICON.
"BoB" <rbr...@worldnet.att.net> wrote in message
news:3A8DBE8D...@worldnet.att.net...
BoB
msconfig.
Booting at 60-%resources free, my daughter has the turtle swimming for a mouse
pointer, I couldn't even install dx8a on her machine. It locked. When I put
her back at default settings it installed fine and all she has running is 98se
crap. She boots at 95% resources free, but the eye and ear candy kills her box.
QZ
sometimes prompt each to load at the same time. So you think they will
notice the difference?
"Just Bud" <the...@san.rxyzr.com> wrote in message
news:khrr8tomqutmna97t...@4ax.com...
> "THOR" <NO...@HOME.com> opened the coffin lid and croaked...
>
> >We all know that if you ran a program that used more than 128 it would be
> >faster with 256 but on the internet and using m\s word I dont think that
it
> >would ever happen. If you were into video editing it would make a
> >difference.
>
> But of that 128 megs, up to half will be taken up by vcache, and another
> 40 megs or so by the OS. Add one program, and you'll be fine. Open 3
> or more programs (multiple instances of MSIE for example) and you'll be
> right on the edge of swapping.
QZ
systray. 92% resources free.
"BoB" <rbr...@worldnet.att.net> wrote in message
news:3A8DD8CB...@worldnet.att.net...
joe crouse
for the map you are on makes life real sweet when you can force all that
data into ram.
also you can set up a ram drive useing some new software so that it can
use much more than the old limit (32mb i think)
Giles C Hjort-Tyson
down, which ment uncached RAM was used first. It really wasn't worthwhile
at all to go over 64MB on a windows 98 machine on a socket 7 board.
"BoB" <rbr...@worldnet.att.net> wrote in message
news:3A8DBF14...@worldnet.att.net...
Giles C Hjort-Tyson
open, MS outlook express, windows media player 7 playing an mp3, several
explorer windows, task manager, AIM, MSN messenger, and my computer has
local networking services running. Memory useage is 116MB, showing 133MB
available. Obviously I have 256MB on my system, but for what I'm doing
128MB would be plenty.
"QZ" <no@mail> wrote in message news:96krdk$kcg$1...@slb0.atl.mindspring.net...
de
64 megs and 128 megs to 256 megs.
The difference is not typically in perceivable speed, but in what the extra
RAM lets you do.
If you have only MS Office and as many other apps from other vendors
installed, your PC is relatively lightly loaded. In such cases upgrading
from 128 megs to 256 megs will not show much perceived gain.
But if your run memory hogging apps at boot, such as Norton Antivirus,
Norton Utilities, a firewall etc. more memory can really make up for the RAM
these utilities devour, especially under Windows 2000.
If you ever try to scan photos to even moderate resolutions, and create
picture (jpg, gif, tiff) files much above 10 megabytes each, you will notice
a big difference with lots of RAM. 256 megs is not enough to edit very very
large photo files effectively though, since these can run to hundreds of
megs in size.
But for editing stuff to print at 8x10s via CD and a photo lab at the mall,
a 256 meg PC is a great start.
For example, under Windows 2000 and to a lesser degree under Windows 98,
PhotoDraw 2000 v2 virtually grinds to a halt when a 30+ megabyte image files
is loaded at 128 megs, but remains acceptably fast when 256 megs are
installed.
Windows 2000 seems to need 256 megabytes more than Windows 98, likely
because it hogs more memory to begin with.
Under Windows 2000, a 256 megabyte PC with say 6-7 applets loaded at boot
(Norton antivirus, sound, card, video, firewall utilities, WinFax Pro 10
driver, in system tray), can have 90 megs or so of RAM free to load and run
apps.
Without the extra 128 megs a Windows 2000 system uses up free RAM rather
quickly, and may 19 megs will be free after you load just MS Word!
Do more at once. Edit photos a lot faster. But don't look for a perceivable
speed increase across the board. You can do more things at once with more
memory, and that is the main advantage.
Keith E. Risler
Keith...@alumni.uwo.ca.nospam
Remove .nospam to reply directly
"QZ" <no@mail> wrote in message news:96jsrv$v4q$1...@slb0.atl.mindspring.net...
BoB
megs.
BoB
who is conversant with the programmer who designed the memory mapping function
for w98 at microsoft. I use all socket 7 boards(5-9) at our house and all have
at least
128 megs of ram and all improved with that amount. Now the old mobo chipsets
which only cached 64 megs(p133-200) , only measured a 20% performance
degradation with uncached ram. The extra ram didn't hurt, it just wasn't as
fast.
BoB
128-
a simple setting. Do that comparison.
joe crouse
my origianl 64 megs in my ss7 board and still more difference when i added another
128. to that making 256 megs
BoB
our chipsets for ss7 cache at least a gig or two of ram, more than our mobo's will
support(hold). Mine only support 256 x 3 sticks.
tony
"joe crouse" <joecr...@home.com> wrote in message
news:3A8DF6EF...@home.com...
> also you can set up a ram drive useing some new software so that it can
> use much more than the old limit (32mb i think)
What new software to set up a ram drive more than 32mb? Please tell me...
Giles C Hjort-Tyson
advanced AMD K6 gets around this limitation, but on the system I used- some
epox P5TV2? motherboard, with a pentium 200 I saw a noticable reduction in
speed from going from 64MB to 128MB. Maybe if for some odd reason your
system always needed 128+MB of memory, yeah i guess even uncached RAM is
faster than swap, but as it was- relativly bare just used for web browsing
mostly, it did not benefit from the 64MB aditional RAM. It was noticable
faster when I switched it back to 64MB.
"BoB" <rbr...@worldnet.att.net> wrote in message
news:3A8E0678...@worldnet.att.net...
joe crouse
i cant remember it and i didnt download it it was like ramdisk 2000 something
like that some one else would know
joe crouse
Giles C Hjort-Tyson
windows 2000)- it's a 650 Duron@833 instead of a 700 athlon- and 128MB
instead of 256MB.
The Duron/128MB shows used memory at 96MB with 3 internet explorer windows
open at my home page, outlook express open, my computer open, msn messenger
running, media player 7 open. Slightly less, can't totally reproduce the
prior "test" since I don't recall exactly which web pages were open.
Here are the numbers(rounded)
total 130520
available 50600
system cache 69900
kernal total 22000
paged 17000
nonpaged 5000
My other computer now is useing 121800K
total 261596
available 124000
system cache 140300
kernel total 36100
paged 20000
nonpaged 16000
As it is the system with 256MB of RAM is actually pageing more out. I
attribute this to microsoft programer stupidity.
"BoB" <rbr...@worldnet.att.net> wrote in message
news:3A8E0707...@worldnet.att.net...
me
>I will be giving my folks an Asus P2B w/P-II 333, 128 MB SDRAM, V3 3000, Win
>ME. They just word process and browse the web. I was wondering with ram so
>inexpensive, if it would benefit them to get another 128, giving them a
>total of 256? I know the word processor won't see anything. But what about
>browsing in multiple windows? And loading pictures and graphics? What is the
>improvement, if any?
>
>Thanks
For the price of a dinner for two, you could add another 128mb of RAM
to your computer. This would probably prepare you for any future
bloatware that MS decides to throw at us, such as Windows XP. As far
a word processing performance is concerned, I doubt you will notice a
significant difference.
BoB
Only reason I can see that happening.
Ralph Wade Phillips
QZ <no@mail> wrote in message news:96jsrv$v4q$1...@slb0.atl.mindspring.net...
> I will be giving my folks an Asus P2B w/P-II 333, 128 MB SDRAM, V3 3000,
Win
> ME. They just word process and browse the web. I was wondering with ram so
> inexpensive, if it would benefit them to get another 128, giving them a
> total of 256? I know the word processor won't see anything. But what about
> browsing in multiple windows? And loading pictures and graphics? What is
the
> improvement, if any?
The BEST bet would be to, while the system is running, start the
system monitor (if you've loaded it) from Start -> Programs -> Accesories ->
System Tools -> System Monitor, and add the "Swapfile in Use" metric (from
memory, Edit -> Add -> Memory Manager -> Swapfile in Use , but dig if that's
not it - it's there somewhere!), and see how much swapfile is actually being
used.
Up to about 16meg I wouldn't worry about (ME will have SOME swap
going on, even if you're at the practical 512meg limit for ME), but if, with
the multiple windows open, you're at, say 100meg of swapfile in use, then
I'd add the extra memory.
Don't be worried about those that claim you can't use that much -
WinME is limited by design to around 512megs, but the processor can cache
either 4 gigs or 4 terabytes, depending on WHICH P2-333 it is ...
RwP
QZ
"me" <m...@me.com> wrote in message
news:3a905749...@news.crdva1.bc.wave.home.com...
Giles C Hjort-Tyson
into memory in such a way that the uncached RAM is used first. I guess you
think this is incorrect- but do you have a link to back this up? In the
single real life example it did seem to degrade performance when going over
64MB.
For example:
http://www.ustc.edu.cn/~hxu/pcupgrade/ch05/ch05.htm#Heading19 "The 430TX
chipset can only cache data within the first 64MB of system RAM. If you have
more memory than that, you will experience a noticible slowdown in system
performance as all data outside the first 64MB will never be cached, and
would always be accessed with all the wait states the slower DRAM requires.
Depending on what software you use and where data is stored in memory, this
can be very significant. For example, 32-bit operating systems such as
Win95/98 and NT load from the top down, so if you had 96MB of RAM, the
operating system and applications would be loading directly into the upper
32M (past 64M), which is not cached. This would result in a dramatic
slowdown in overall system use. "
also:
http://www.smartcomputing.com/editorial/article.asp?article=articles%2Farchi
ve%2Fl0508%2F67l08%2F67l08%2Easp
These are just the first links I could find with google- I have heard these
things from a number of people, and I can't easily dismiss it just because
you say so :).
If there IS a page from microsoft that explains why this wouldn't happen,
please let me know where to look.
"BoB" <rbr...@worldnet.att.net> wrote in message
news:3A8E6250...@worldnet.att.net...
BoB
Giles C Hjort-Tyson wrote:
> I have seen several articles on the web that claim windows 9x loads programs
> into memory in such a way that the uncached RAM is used first. I guess you
> think this is incorrect- but do you have a link to back this up? In the
> single real life example it did seem to degrade performance when going over
> 64MB.
>
> For example:
> http://www.ustc.edu.cn/~hxu/pcupgrade/ch05/ch05.htm#Heading19 "The 430TX
> chipset can only cache data within the first 64MB of system RAM. If you have
> more memory than that, you will experience a noticible slowdown in system
> performance as all data outside the first 64MB will never be cached, and
> would always be accessed with all the wait states the slower DRAM requires.
> Depending on what software you use and where data is stored in memory, this
> can be very significant. For example, 32-bit operating systems such as
> Win95/98 and NT load from the top down, so if you had 96MB of RAM, the
> operating system and applications would be loading directly into the upper
> 32M (past 64M), which is not cached. This would result in a dramatic
> slowdown in overall system use. "
In my personal experience, going to 96 megs made my old computer much faster.
I have seen the figure stated and "proved" to my satisfaction for the chipset in
question
by "experts" that uncached ram only suffers a 20 performance reduction. The top
down is a "fallacy". I posted your assertions at ms newgroups, but like virtual
memory
they get a little tired of endless repetitive "wive's tales". Stay with 64
megs.
Mac
and VX chipsets that suffered from this from what I remember. Later Via and
ALI chipset S7 and SS7 did NOT suffer this malady and could cache more ram
up to the limit of the cache on the mobo, usually 256mb and up.
Mac
"Giles C Hjort-Tyson" <gile...@no.spam.hotmail.com> wrote in message
news:dSmj6.1111$pS4.7...@typhoon2.ba-dsg.net...
George Macdonald
>It depends on the socket seven board. It was primarily the Intel TX, HX,
>and VX chipsets that suffered from this from what I remember.
The TX and VX - yes they were limited to 64MB cacheable range. The HX
could cache up to 512MB with mbrds which allowed or had a TAG word >8-bits
through the use of a 2nd TAG SRAM..
> Later Via and
>ALI chipset S7 and SS7 did NOT suffer this malady and could cache more ram
>up to the limit of the cache on the mobo, usually 256mb and up.
The VIA MVP3 cacheable range depended on the cache size - with 1MB L2 cache
it could cache 255MB in Write Through Mode and 127MB in Write Back...
double these numbers for 2MB L2 cache. The ALI chipset was limited to
128MB until the Rev G version, which was only available some time in the
past year or so and which allowed the original spec of 512MB cacheable
range.
Rgds, George Macdonald
"Just because they're paranoid doesn't mean you're not psychotic" - Who, me??
George Macdonald
highest have been MVP3 based boards with 2MB L2 cache which can cache 510MB
in Write Through Mode and very recent (Rev G) ALI Aladdin V boards which
have a L2 cacheable range of 512MB.
As for the top-down usage of memory it is due to HIMEM.SYS which allocates
ascending page addresses from the top of memory down. I don't know, and
haven't looked recently, if HIMEM.SYS was done differently for Win98 but
certainly for Win95 it was true. BTW MS MVPs have been known to dish out
junk too.
Rgds, George Macdonald
robert denman
Well you stepped into this one: Here's what the expert said,
and I quote:
"I was tempted to limit my response to just 3 words:
Balderdash. Hogwash. Malarkey.
However, an explanation is probably in order.
First of all, the "top down" loading of memory is wrong. According to
the development programmers at Microsoft who gave us presentations
about the internal functions of Windows there is no simple way to
describe how Windows loads memory. Some items go into the lower
portions of RAM, some into the uppermost addresses, and some in the
middle. It is, according to these Microsoft insiders, too complex to
describe except in the context of an advanced college level course in
Computer Science,
As to the 430TX chipset, that was used with the first series of
Pentium CPUs and was discontinued with the advent of the MMX version
of the original Pentium. So MMX and later CPUs are not affected.
Secondly, with the 430TX chipset, the performance impact of uncached
versus cached RAM was in the order of 20% when measured with an
application based benchmark. Memory only benchmarks will of course
show a higher relative impact, but computer usage is not memory only.
There is hard drive access, video display and other input/output
operations that also occur during the course of any normal computer
usage and therefore the only relevant benchmarks are those which
measure performance under real-world circumstances.
Now a performance impact of 20% is just barely above what other tests
have determined to be the minimum change in performance that will be
apparent to a user who is not aware that anything has been changed.
There was a exhaustive series of tests done on this a few years back,
where computers would be altered so as to affect overall performance
by a measured amount and then the users would be observed to see if
they noticed that anything was different. As I recall, it took at
least a 17% change in overall performance (up or down) before users
would react to the difference.
If you have access to a system with a 430TX chipset then it is pretty
simple to measure the impact of L2 cache on performance. Just run a
application based benchmark test (PC Mag has one available free I
believe), run it on the system and record the results. Next go into
the BIOS setup and totally disable the L2 cache. Now run the
benchmark again and compare the results with the previous test. It
will almost certainly be about 20% different overall.
One other point about cached versus uncached RAM, and this is probably
the most important. If there is any significant usage of the virtual
memory swap file then a memory upgrade, even uncached RAM on a TX
chipset, will provide a very significant performance improvement.
This is because RAM, even uncached RAM, is hundreds of times faster to
access than the swap file on the hard drive.
Hope this helps clarify the situation.
Good luck.
Ron Martell Duncan B.C. Canada
--
Microsoft MVP
On-Line Help Computer Service
http://onlinehelp.bc.ca"
"The reason computer chips are so small is computers don't eat much."
jeninga
ram - ask any T2P4 owner. :-)
"Mac" <nos...@nospam.com> wrote in message
news:t8u7d4n...@corp.supernews.com...
joe crouse
joe crouse
QZ
TX97-XE, which I have just confirmed as having the 430TX chipset, running a
P-MMX 200. So this P-MMX is affected. I wonder if any P-MMXs are *not*
affected?
"robert denman" <rbr...@worldnet.att.net> wrote in message
news:3A8FB60F...@worldnet.att.net...
<snip>
> As to the 430TX chipset, that was used with the first series of
> Pentium CPUs and was discontinued with the advent of the MMX version
> of the original Pentium. So MMX and later CPUs are not affected.
<snip>
Sept1967
Windows and Games.
"joe crouse" <joecr...@home.com> wrote in message news:3A900127...@home.com...
Keith R. Williams
fammacd=!SPAM^noth...@garden.net (George Macdonald) wrote:
> There have been no ss7 mbrds which allow a L2 cacheable range of 1GB.
Really? What about K6-III boards? (Ok, it's a cheap shot
;-)
> As for the top-down usage of memory it is due to HIMEM.SYS which allocates
> ascending page addresses from the top of memory down. I don't know, and
> haven't looked recently, if HIMEM.SYS was done differently for Win98 but
> certainly for Win95 it was true. BTW MS MVPs have been known to dish out
> junk too.
This was certainly true for Win31x and held for Win95
(again, a shell on DOS). I don't believe this has been true
since, though.
----
Keith
Keith R. Williams
<rbr...@worldnet.att.net> wrote:
>
> Well you stepped into this one: Here's what the expert said,
> and I quote:
> "I was tempted to limit my response to just 3 words:
> Balderdash. Hogwash. Malarkey.
Ditto, ditto, ditto.
> However, an explanation is probably in order.
Please, do tell George something abut caches...
> First of all, the "top down" loading of memory is wrong. According to
> the development programmers at Microsoft who gave us presentations
> about the internal functions of Windows there is no simple way to
> describe how Windows loads memory. Some items go into the lower
> portions of RAM, some into the uppermost addresses, and some in the
> middle. It is, according to these Microsoft insiders, too complex to
> describe except in the context of an advanced college level course in
> Computer Science,
Wow! You've convinced me. Now, exactly *which* Windows are
*you* talking about. NT? You're certainly right. Win3x.
Nope. Sorry. You flunk. Win95 is a wart off Win3x. What
George says is true, as far as Win3x and Win95 (at least
OSR1) goes.
> As to the 430TX chipset, that was used with the first series of
> Pentium CPUs and was discontinued with the advent of the MMX version
> of the original Pentium. So MMX and later CPUs are not affected.
Again, you speak with little knowledge. The 430TX was the
*LAST* Pentium (socket-7) class chipset Intel made. It was
*specifically* designed for the P55C processors. It was also
crippled such that the P55C didn't encroach on the PII line.
The FX and VX came before the TX.
> Secondly, with the 430TX chipset, the performance impact of uncached
> versus cached RAM was in the order of 20% when measured with an
> application based benchmark.
Significant difference, I'd think. Considering the cost
difference between processors that would come close to a 20%
difference, in an application based benchmark.
> Memory only benchmarks will of course
> show a higher relative impact, but computer usage is not memory only.
> There is hard drive access, video display and other input/output
> operations that also occur during the course of any normal computer
> usage and therefore the only relevant benchmarks are those which
> measure performance under real-world circumstances.
Yawn.
> Now a performance impact of 20% is just barely above what other tests
> have determined to be the minimum change in performance that will be
> apparent to a user who is not aware that anything has been changed.
Nonsense. 20% is a huge change. Turn off your L2 any I
guarantee you'll *SEE* the difference. If you can't see the
difference you can save a ton of money on computers. You
can go to the dumpster and find some neat new toys.
> There was a exhaustive series of tests done on this a few years back,
> where computers would be altered so as to affect overall performance
> by a measured amount and then the users would be observed to see if
> they noticed that anything was different. As I recall, it took at
> least a 17% change in overall performance (up or down) before users
> would react to the difference.
Citation, please.
> If you have access to a system with a 430TX chipset then it is pretty
> simple to measure the impact of L2 cache on performance. Just run a
> application based benchmark test (PC Mag has one available free I
> believe), run it on the system and record the results. Next go into
> the BIOS setup and totally disable the L2 cache. Now run the
> benchmark again and compare the results with the previous test. It
> will almost certainly be about 20% different overall.
Possibly as low as 20%. Now ask me to use that computer all
day. I tell you you are full of hot air! 20% is a *huge*
number. It's easily perceptable.
>
> One other point about cached versus uncached RAM, and this is probably
> the most important. If there is any significant usage of the virtual
> memory swap file then a memory upgrade, even uncached RAM on a TX
> chipset, will provide a very significant performance improvement.
> This is because RAM, even uncached RAM, is hundreds of times faster to
> access than the swap file on the hard drive.
Nope. If the OS isn't cached, everythign is slow. ...not
just what has been swapped out.
> Hope this helps clarify the situation.
Clear enough that it cannot be seen by anyone who has any
idea what's going on.
Sorry, but you are wrong.
----
Keith
Keith R. Williams
> Ah...sorry, you are wrong about the 430TX. My folks are using an Asus
> TX97-XE, which I have just confirmed as having the 430TX chipset, running a
> P-MMX 200. So this P-MMX is affected. I wonder if any P-MMXs are *not*
> affected?
Likely not if you bought it as a package. This was a
feechur of the TX chipset. The HX (the TX's predecessor)
could do 512MB if a second TAG RAM was added. The VX and TX
were limited to 64MB. THere is no way around that (other
than an AMD K6-II processor - but that's cheating the
definiton of L2 in this context).
Other chipset manufacturers could do more. See George
MacD's comments in this thread. He ferreted this stuff out
long ago.
----
Keith
Keith R. Williams
<joecr...@home.com> wrote:
> hm one of mine says up to 1 gb in the manual
Ok, I'll bite. How do you stick 1GB in? (hint: George is
right).
----
Keith
BoB
"Keith R. Williams" wrote:
> On Sun, 18 Feb 2001 11:44:06, robert denman
> <rbr...@worldnet.att.net> wrote:
>
> >
> > Well you stepped into this one: Here's what the expert said,
> > and I quote:
> > "I was tempted to limit my response to just 3 words:
> > Balderdash. Hogwash. Malarkey.
>
> Ditto, ditto, ditto.
>
> snipped
>
> > First of all, the "top down" loading of memory is wrong. According to
> > the development programmers at Microsoft who gave us presentations
> > about the internal functions of Windows there is no simple way to
> > describe how Windows loads memory. Some items go into the lower
> > portions of RAM, some into the uppermost addresses, and some in the
> > middle. It is, according to these Microsoft insiders, too complex to
> > describe except in the context of an advanced college level course in
> > Computer Science,
>
> Wow! You've convinced me. Now, exactly *which* Windows are
> *you* talking about. NT? You're certainly right. Win3x.
> Nope. Sorry. You flunk. Win95 is a wart off Win3x. What
> George says is true, as far as Win3x and Win95 (at least
> OSR1) goes.
Who still uses 95o or w3.1 that would want to go beyong 64 megs?
Another quote john sheeley: most enlightening, much more so than your
replies
Subject:
Re: have fun, ram over 64 degrades performance
Date:
Sun, 18 Feb 2001 13:39:59 -0500
From:
John Sheehy <jsh...@ix.netcom.com>
Organization:
MindSpring Enterprises
Newsgroups:
microsoft.public.win98.performance
References:
1 , 2 , 3 , 4
In message <3A8FFF10...@worldnet.att.net>,
BoB <rbr...@worldnet.att.net> wrote:
>Glad you jumped in, even if I cannot yet comprehend what you are saying,
>how does L3- tri level cacheing affect this. I have been told my mvp3
>chipset will only cache 256megs of ram, but I am using L2 256(450mghz) and
>1024(100mghz)?
Let me try this in plain English.
A memory cache is an area of special, faster memory which represents a
fraction of the memory addresses available in main RAM. Whenever a
memory address is accessed, and is cacheable, the cache represents that
address to the system, so that if the address is accessed again before
the address is flushed from the cache, it will be accessed faster. The
cache does not, in any way, speed up access to any memory address that
is not in the cache already, unless the address was right after one that
*was* cached, and the cache uses "read-ahead".
When a memory address in RAM is accessed, first the system looks to the
L2 cache to see if the memory address is already represented there. If
it is not, it gets it from regular system RAM.
The L2 cache is most useful when a program keeps reading the same memory
contents over and over, and they stay in the cache. Most memory
addresses read by a computer in non-numbercrunching situations do *not*
get accessed again before they are cached. The L2 cache is *not*,
therefore, an accelerator for memory access per se; it is only an
accelerator for recently accessed memory addresses that are being
accessed again.
Let me use an analogy; say you have a reclining chair with a CD Player
next to it, and a small shelf that holds 10 CDs, and both can be reached
while sitting. On the wall, across the room, is a large shelf that
holds 500 CDs. If you want to listen to a CD that is in the large
shelf, you have to get up out of the chair and walk across the room to
get it. If you want to listen to one that is in the small shelf, you
can just reach over and grab it, and put it in the CD player. This is
equivalent to caching memory. It doesn't increase the speed at which
you can fetch a CD in the big shelf, it only increases the speed at
which you can fetch one in the small shelf. If you listen to a
particular CD very frequently, chances are, it will almost always be in
the small shelf.
--
<>>< ><<> ><<> <>>< ><<> <>>< <>>< ><<>
John P Sheehy <jsh...@ix.netcom.com>
><<> <>>< <>>< ><<> <>>< ><<> ><<> <>><
Scott Alfter
Hash: SHA1
In article <pLMYl5dhX7hK-pn2-9bZS6f0mt7dH@localhost>,
Keith R. Williams <k...@attglobal.net> wrote:
>On Sun, 18 Feb 2001 11:44:06, robert denman
><rbr...@worldnet.att.net> wrote:
>> Now a performance impact of 20% is just barely above what other tests
>> have determined to be the minimum change in performance that will be
>> apparent to a user who is not aware that anything has been changed.
>
>Nonsense. 20% is a huge change. Turn off your L2 any I
>guarantee you'll *SEE* the difference. If you can't see the
>difference you can save a ton of money on computers. You
>can go to the dumpster and find some neat new toys.
To provide a data point WRT the difference between cache and no cache,
consider some really old hardware with which I have some experience: a
Cyrix 5x86-120 on a Biostar 8433UUD (with 256K L2 cache) vs. a P5-133 on
whatever integrated motherboard Packard Bell was using at the time (probably
an Intel motherboard of some kind, but with no L2 cache). I'll allow that
there were other differences between the systems (like an S3 868 graphics
board in the homebrew Cyrix system vs. Cirrus Logic in the Packard Bell),
but even with the speed difference and even with the Cyrix sitting on a data
bus only half as wide (it ran on 486 motherboards), on a subjective basis,
it just seemed faster. Maybe it was slower on compute-bound stuff that
would fit in L1 cache, but I suspect that the cache had a part in making the
homebrew Cyrix box faster.
(The Packard Bell wasn't mine; it was a work machine. The Cyrix-based
system lives on today as my firewall, running Linux.)
_/_
/ v \
(IIGS( Scott Alfter (remove Voyager's hull number for email address)
\_^_/ http://salfter.dyndns.org
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George Macdonald
to confess to having lost interest in the Aladdin V chipset latterly and
there were stories about an Asus board based on it, which had the fixed
chipset and 1MB of L2 cache but was available only in selected markets -
Europe for one. I never got the technical details of how they stretched
the chipset to handle 1MB of L2 cache but it is the one possible exception
which *might* allow caching of 1GB main memory... but then again I don't
think the mbrd could accomodate 1GB of main memory.
Some of the VIA chipset docs boasted of 1GB cacheable range at one time but
they were wrong and the mbrd mfrs copied the erroneous info verbatim.
On Sun, 18 Feb 2001 16:57:10 GMT, joe crouse <joecr...@home.com> wrote:
>hm one of mine says up to 1 gb in the manual
>
>George Macdonald wrote:
>
>> There have been no ss7 mbrds which allow a L2 cacheable range of 1GB. The
>> highest have been MVP3 based boards with 2MB L2 cache which can cache 510MB
>> in Write Through Mode and very recent (Rev G) ALI Aladdin V boards which
>> have a L2 cacheable range of 512MB.
>>
>> As for the top-down usage of memory it is due to HIMEM.SYS which allocates
>> ascending page addresses from the top of memory down. I don't know, and
>> haven't looked recently, if HIMEM.SYS was done differently for Win98 but
>> certainly for Win95 it was true. BTW MS MVPs have been known to dish out
>> junk too.
Rgds, George Macdonald
George Macdonald
chipset and it can cache 512MB main memory.
On Sun, 18 Feb 2001 10:59:14 -0800, "Sept1967" <Sept...@MailOps.com>
wrote:
George Macdonald
>Who still uses 95o or w3.1 that would want to go beyong 64 megs?
The point is that it's not Win9x that is the factor here - it's HIMEM.SYS
and I have seen no indications that it has changed.
If you find this a satisfactory explanation of caching, how it works and
its benefits, there's no point in discussing things any further. This is
all historic information which has been hashed and rehashed umpteen times.
George Macdonald
wrote:
>On Sun, 18 Feb 2001 10:24:18,
>fammacd=!SPAM^noth...@garden.net (George Macdonald) wrote:
>
>> There have been no ss7 mbrds which allow a L2 cacheable range of 1GB.
>
>Really? What about K6-III boards? (Ok, it's a cheap shot
>;-)
You can laugh but Asus Germany had some misleading info about this on their
Web site which showed the motherboard cache as caching up to 4GB with the
last version of the P5A. Obviously they had confused L2 & L3 caching in
there blurb but I couldn't get the "experts" in the Asus NG to believe
this.
>> As for the top-down usage of memory it is due to HIMEM.SYS which allocates
>> ascending page addresses from the top of memory down. I don't know, and
>> haven't looked recently, if HIMEM.SYS was done differently for Win98 but
>> certainly for Win95 it was true. BTW MS MVPs have been known to dish out
>> junk too.
>
>This was certainly true for Win31x and held for Win95
>(again, a shell on DOS). I don't believe this has been true
>since, though.
Even Win98 still uses HIMEM.SYS but it may have been changed. I really
dont feel up to digging out my trusty old Phar Lap debugger to check the
current version.:-)
George Macdonald
wrote:
>
>Well you stepped into this one: Here's what the expert said,
>and I quote:
I didn't step in anything - you, OTOH appear to up to your eyeballs in
something.
>"I was tempted to limit my response to just 3 words:
>Balderdash. Hogwash. Malarkey.
>
>However, an explanation is probably in order.
>
>First of all, the "top down" loading of memory is wrong. According to
>the development programmers at Microsoft who gave us presentations
>about the internal functions of Windows there is no simple way to
>describe how Windows loads memory. Some items go into the lower
>portions of RAM, some into the uppermost addresses, and some in the
>middle. It is, according to these Microsoft insiders, too complex to
>describe except in the context of an advanced college level course in
>Computer Science,
I'm up for a better explanation. I've looked at page tables allocated to a
32-bit app through HIMEM.SYS with a debugger and I can assure you that the
version of HIMEM which came with Win95 assigned ascending page addresses to
top-down descending pages of physical memory.
>As to the 430TX chipset, that was used with the first series of
>Pentium CPUs and was discontinued with the advent of the MMX version
>of the original Pentium. So MMX and later CPUs are not affected.
Rubbish. The 430TX was the last S7 chipset that Intel produced and was
released around the same time as the MMX CPUs. I'd like to know which
chipset this "MVP" thought was used with Pentium MMX CPUs. The first
chipset used with Pentium CPUs (60 & 66MHz) was often referred to as
Mercury IIRC - I never found out the numeric designation.
I think my point is made about the value of information you get from some
MVPs.
BoB
bob quotes: so far there is a consensus among mvp's
""The quote 'loads from the top down' is confusing the allocation of
Virtual memory addresses with the load into Physical RAM. That is
*not* top down.
I have an e-mail from one of the team that developed Win95, saying
specifically that the load pattern in Physical RAM is 'more complex',
and observations made with the Nuts&Bolts Discover Pro program which
indicates a couple of MB loaded high, and then the major load starting
around 8MB or so and working up.
In any case the effect of secondary caching on performance is fairly
small: and the critical loops of the system will be cached at level
one in the processor, anyway.
And the '64MB' matter only arises with Intel chipsets for the Classic
Pentium anyway: PII PIII P Pro and Celeron are not affected.
--
Alex Nichol MVP (DTS)
Bournemouth, U.K. Alex....@ukgateway.net
Check out:'How to make a good newsgroup post'at
http://members.home.com/dts-l/goodpost.htm""
Keith R. Williams
fammacd=!SPAM^noth...@garden.net (George Macdonald) wrote:
> On Mon, 19 Feb 2001 03:09:06 GMT, k...@attglobal.net (Keith R. Williams)
> wrote:
>
> >On Sun, 18 Feb 2001 10:24:18,
> >fammacd=!SPAM^noth...@garden.net (George Macdonald) wrote:
> >
> >> There have been no ss7 mbrds which allow a L2 cacheable range of 1GB.
> >
> >Really? What about K6-III boards? (Ok, it's a cheap shot
> >;-)
>
> You can laugh but Asus Germany had some misleading info about this on their
> Web site which showed the motherboard cache as caching up to 4GB with the
> last version of the P5A. Obviously they had confused L2 & L3 caching in
> there blurb but I couldn't get the "experts" in the Asus NG to believe
> this.
I cannot apologize for marketing types. I "live" amongst
them and am constantly disguisted with the tripe they serve.
They're loud people too!
> >> As for the top-down usage of memory it is due to HIMEM.SYS which allocates
> >> ascending page addresses from the top of memory down. I don't know, and
> >> haven't looked recently, if HIMEM.SYS was done differently for Win98 but
> >> certainly for Win95 it was true. BTW MS MVPs have been known to dish out
> >> junk too.
> >
> >This was certainly true for Win31x and held for Win95
> >(again, a shell on DOS). I don't believe this has been true
> >since, though.
>
> Even Win98 still uses HIMEM.SYS but it may have been changed. I really
> dont feel up to digging out my trusty old Phar Lap debugger to check the
> current version.:-)
Possibly HIMEM is used to boot, but I believe a 32bit memory
manager is used afterwards. I really cannot speak for
anything in the Win9x line, because it's just crap and I
have no interest in wasting time there. I know the NT
family is rather like OS/2 and will page anywhere. From
what I'm told it's impossible to predict where things are
going to be in physical memory with thes OSs.
----
Keith
Scott Alfter
Hash: SHA1
In article <3a90cb95....@news.garden.net>,
George Macdonald <fammacd=!SPAM^noth...@garden.net> wrote:
>On Sun, 18 Feb 2001 11:44:06 GMT, robert denman <rbr...@worldnet.att.net>
>wrote:
>Rubbish. The 430TX was the last S7 chipset that Intel produced and was
>released around the same time as the MMX CPUs. I'd like to know which
>chipset this "MVP" thought was used with Pentium MMX CPUs. The first
>chipset used with Pentium CPUs (60 & 66MHz) was often referred to as
>Mercury IIRC - I never found out the numeric designation.
430LX. Here's a page that I dug up that names all the 430*X chipsets in the
order in which they were released:
http://209.35.87.111/chipsets/intelchipset.htm
_/_
/ v \
(IIGS( Scott Alfter (remove Voyager's hull number for email address)
\_^_/ http://salfter.dyndns.org
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George Macdonald
>
>bob quotes: so far there is a consensus among mvp's
>""The quote 'loads from the top down' is confusing the allocation of
>Virtual memory addresses with the load into Physical RAM. That is
>*not* top down.
Nope I know very well the difference between virtual addressing and
physical.
>I have an e-mail from one of the team that developed Win95, saying
>specifically that the load pattern in Physical RAM is 'more complex',
>and observations made with the Nuts&Bolts Discover Pro program which
>indicates a couple of MB loaded high, and then the major load starting
>around 8MB or so and working up.
Only a "couple of MB"? That's a hefty hunk of code, even by bloatware
standards, and if any of it is OS kernel related it's a significant
penalty.
>In any case the effect of secondary caching on performance is fairly
>small: and the critical loops of the system will be cached at level
>one in the processor, anyway.
They can wriggle as much as they want it won't change the facts - if you
have a ss7 and do not have a K6-III the mbrd cache is important to
performance. The evidence is clear.
BoB
George Macdonald wrote:
They can wriggle as much as they want it won't change the facts - if you
> have a ss7 and do not have a K6-III the mbrd cache is important to
> performance. The evidence is clear.
>
> Rgds, George Macdonald
Now that I will agree on, as my eyes attest to every time I defrag my c partition
with my K6-III. Having 256k running at 450 mghz leaves a
K6-2 or PI-233 in the dust. And quite a few PII's also.
David Misner
>We all know that if you ran a program that used more than 128 it would be
>faster with 256 but on the internet and using m\s word I dont think that it
>would ever happen. If you were into video editing it would make a
>difference.
Like using Premiere?????
Dean_Kent
news:98264150...@chakotay.ncc74656.org...
>
> 430LX. Here's a page that I dug up that names all the 430*X chipsets in
the
> order in which they were released:
>
> http://209.35.87.111/chipsets/intelchipset.htm
This page has some errors. The chipset numbers are correct, but some of
the other info is wrong, and it doesn't give any info on the actual
'geneaology' of the chipsets...
For example, it states that the i430LX supported 128MB of memory, but it
actually supported 192MB (all cacheable). i430NX (extention of i430LX) was
the first Dual Pentium capable chipset, and the first to support P54C (the
article says 'nothing too groundbreaking') w/ 512MB memory (all cacheable).
i430FX was the worst of the lot - only 128MB of memory (though it did
support EDO) and only 64MB cacheable, no dual processor capability. It's
claim to fame was support of processors faster than 100MHz (up to 133MHz -
yipee!). i430HX was based upon the i430NX, and included most of it's
features, and extended them (4 processor support, Parity and ECC optional,
P54C and P55C processor support up to 233MHz. i430VX was based upon the
i430FX, which explains it's limitations. i430TX based upon the i430VX, with
most of the same limitations...
Perhaps I should do a 'Farewell to Socket 7' article, as I have almost every
S7 chipset and processor that I could do some common benchmarks, and provide
some details like those above... :-). But then, who would really care???
Regards,
Dean
Clay
> Norton Utilities, a firewall etc. more memory can really make up for the
RAM
> these utilities devour, especially under Windows 2000.
>
Yes, that background stuff makes a difference. I recently upgraded my
Athlon600 system (WinME) from 128 to 256. Now I can run 3-D games such as
NOLF and Unreal in 1024x768x32 with all graphics goodies turned on, AND
leave McAfee VS, ZoneAlarm, DirectCD, FaxTalk, and MBM running in the
background. And, I must agree with earlier posts that routine stuff, like
checking email and browsing the web doesn't seem to be any different. One
small thing I noticed, though. Right-click the desktop and hit "Properties"
to bring up the Display Properties. Then switch tabs in that window. On
every machine I've seen, that sucker seems to take awhile. With the 256M it
now is almost instantaneous.
-Clay in NJ
(_\_)(_|_)(_/_)
purposes & can both also engage 4-way interweave?
"Ralph Wade Phillips" <ral...@techie.com> wrote in message
news:G8wyA...@news.boeing.com...
> Howdy!
>
> QZ <no@mail> wrote in message news:96jsrv$v4q$1...@slb0.atl.mindspring.net...
> > I will be giving my folks an Asus P2B w/P-II 333, 128 MB SDRAM, V3 3000,
> Win
> > ME. They just word process and browse the web. I was wondering with ram
so
> > inexpensive, if it would benefit them to get another 128, giving them a
> > total of 256? I know the word processor won't see anything. But what
about
> > browsing in multiple windows? And loading pictures and graphics? What is
> the
> > improvement, if any?
>
> The BEST bet would be to, while the system is running, start the
> system monitor (if you've loaded it) from Start -> Programs ->
Accesories ->
> System Tools -> System Monitor, and add the "Swapfile in Use" metric (from
> memory, Edit -> Add -> Memory Manager -> Swapfile in Use , but dig if
that's
> not it - it's there somewhere!), and see how much swapfile is actually
being
> used.
>
> Up to about 16meg I wouldn't worry about (ME will have SOME swap
> going on, even if you're at the practical 512meg limit for ME), but if,
with
> the multiple windows open, you're at, say 100meg of swapfile in use, then
> I'd add the extra memory.
>
> Don't be worried about those that claim you can't use that much -
> WinME is limited by design to around 512megs, but the processor can cache
> either 4 gigs or 4 terabytes, depending on WHICH P2-333 it is ...
>
> RwP
>
>
>
>
Mitch Crane
@violet.singnet.com.sg>:
can both also engage 4-way interweave?
Pwobabwy.
Ralph Wade Phillips
(_\_)(_|_)(_/_) <wangjia...@yahoo.com> wrote in message
news:973nnf$m82$1...@violet.singnet.com.sg...
> Okay, is dual sided chipsets sdram better or single sided? what's their
> purposes & can both also engage 4-way interweave?
Yes, and I don't know <grins!> Actually, the main problem with
single-sided SDRAMs is that some of the older boards won't talk to the newer
chips. Some will, however - I've got a Soyo 5BT sitting here with 128meg of
brand-spanking-new PC133 SDRAM in it, and it sees all 128megs. Considering
that it was using 75megs of the previous 32 while running Windows NT (that
is, about 43 megs of swap IN USE), that will make the machine quite "spurky"
(as my grandpa used to call things ... )
As to interleaving - BTW - that's interLeaving, not interWeaving -
think of the interleaved slats on a "privacy" chain link fence - I don't
know. If you're running a Pentium board, today's SDRAM run close enough to
bus speeds that the interleaving won't be very noticeable, if at all.
One thing to consider - SDRAM runs at 66MHz on most of the older
Pentium boards, 100MHz on newer Super7 boards. Even though it actually runs
at 1/2 to 1/3 of that speed, 1/3 of 66 is still 22MHz. The old EDO ran more
like 16MHz at best, with waits it worked out to a memory access more like 12
million times a second sustained. Fast page is worse. AND - most cache
sets on Super7's run at 1 or 2 waits, slowing memory access to either 33 or
22MHz equivalent.
One of the dissenters - tell me again how running SDRAM uncached by
L2 cache is slower? .... Didn't think so.
Now, on a Super7 board running at 100MHz (or overclocked higher) the
difference is more noticeable. But, it's STILL a lot faster than the hard
disk is!
RwP
Anthony Hill
<wangjia...@yahoo.com> wrote:
>Okay, is dual sided chipsets sdram better or single sided? what's their
>purposes & can both also engage 4-way interweave?
Dual sided vs. single sided doesn't make much difference except that
the odd motherboard might not like dual-sided chips, but that's not
nearly the issue now that it was 3 or 4 years ago when SDRAM first
came out. These days dual sided is just fine. As for the 4-way
interleaving, that works just fine on single or dual sided chips as
it's just on-chip interleaving.
-----------------------
Tony Hill
hi...@uoguelph.ca
George Macdonald
wrote:
>Howdy!
>
>(_\_)(_|_)(_/_) <wangjia...@yahoo.com> wrote in message
>news:973nnf$m82$1...@violet.singnet.com.sg...
>> Okay, is dual sided chipsets sdram better or single sided? what's their
>> purposes & can both also engage 4-way interweave?
Most current chipset support 6 or 8 rows (module banks) of memory organized
as pairs so you get 3 or 4 DIMM slots. The advantage to double sided is
that you can fill all (6 or 8) rows of memory - IOW for the same chip
device density you can have more total memory... or more slots free for
upgrade.
> Yes, and I don't know <grins!> Actually, the main problem with
>single-sided SDRAMs is that some of the older boards won't talk to the newer
>chips. Some will, however - I've got a Soyo 5BT sitting here with 128meg of
>brand-spanking-new PC133 SDRAM in it, and it sees all 128megs. Considering
>that it was using 75megs of the previous 32 while running Windows NT (that
>is, about 43 megs of swap IN USE), that will make the machine quite "spurky"
>(as my grandpa used to call things ... )
>
> As to interleaving - BTW - that's interLeaving, not interWeaving -
>think of the interleaved slats on a "privacy" chain link fence - I don't
>know. If you're running a Pentium board, today's SDRAM run close enough to
>bus speeds that the interleaving won't be very noticeable, if at all.
The interleaving wrt SDRAM is on the memory chips and is not related to the
rows (module banks) on the DIMMs. It basically allows some overlap on
access & precharge commands to the separate chip banks.
> One thing to consider - SDRAM runs at 66MHz on most of the older
>Pentium boards, 100MHz on newer Super7 boards. Even though it actually runs
>at 1/2 to 1/3 of that speed, 1/3 of 66 is still 22MHz. The old EDO ran more
>like 16MHz at best, with waits it worked out to a memory access more like 12
>million times a second sustained. Fast page is worse. AND - most cache
>sets on Super7's run at 1 or 2 waits, slowing memory access to either 33 or
>22MHz equivalent.
>
> One of the dissenters - tell me again how running SDRAM uncached by
>L2 cache is slower? .... Didn't think so.
Say what? Of course the L2 mbrd cache accesses are faster.
Jukka Liimatta
> contents over and over, and they stay in the cache. Most memory
> addresses read by a computer in non-numbercrunching situations do *not*
> get accessed again before they are cached. The L2 cache is *not*,
> therefore, an accelerator for memory access per se; it is only an
> accelerator for recently accessed memory addresses that are being
> accessed again.
Actually, it's a locality issue related to the cache line size, and
associativeness of the cache. If cache is "4-way" associative, this means
that the CPU has 4 hardware cache pointers, which point to so-called
cache-line.
Cache lines are 32bytes on pentium,p2,p3... 64 bytes on athlon, and 128
bytes on pentium4. When you read from memory, everything in the same cache
line is read into the L1 (!) cache. The cachelines are aligned in memory,
with granularity of the cacheline size.
Cache does, infact, accelerate linear memory access to a significant degree.
If you are reading, say, byte entries from memory, the first read is
cache-miss, the 31 subsequential accesses are "cache hit", assuming reading
linearly and 32byte cache line size, and we began reading at cache line
boundary.
Also, how data is organized in memory can be used in a great way when the
access pattern is "predictable". A good examples are software scanconversion
( reading texels from memory ), filtering, etc. There is very old, and
well-known trick, for example, to store 2D array in memory in smaller
blocks, say, 8x8 blocks for NxN array. The key here is that 8x8 block is 1
or 2 cache lines-- so, the direction we read in the array does not matter
anymore since only 1 out of eight memory accesses is a cache miss.
On retrospect, if we used *linear* 2D array, vertical movement in array
would introduce pitch*dy bytes of memory offset, resulting EVERY memory
access being cache miss for even relatively small arrays. If we can improve
cache hit ratio by factor of 8, significant speed increases are possible.
Then ofcourse, if you are pointing to more arrays or positions in memory
than the cache has associativeness for, you get penalties because the
hardware cache pointer must be "flushed", in lack of better term. ;-)
The reason why the amount of memory possibly to cache is limited on some
systems to some value, is that less memory means smaller, and less entries
resulting in a smaller lookup table.
The document quoted earlier only explains what cache is, doesn't seem to
tell much how it works and what kind of data structures would make use of
the hardware cache better. The best part here is that one does not have to
be mr.assembly expert, most "higher level" languages like Java and C/C++,
etc. are more than adequate medium to write visibly faster software with. Oh
well... ;-)
-j