In CPU-Z, under the SPD tab, for each of the DIMMs it lists as Max
Bandwidth: PC3200 (200 MHz).
Should that normally be 400?
Has it been reduced to 200 because I'm using the two channels, I have 3GB of
RAM or...please explain!
Is it going to be better to remove the 2x 512 DIMMS, and just operate on the
2x 1GB in Channel A? I'm not particularly willing to go fiddling around
manually with T1, T2, overclocking etc etc.
I'm thinking...Paul...or anyone, are you still out there!??!? Please help!
Thanks in advance...
CPU-Z .txt dump follows, I've just copied the SPD section:-
Memory SPD
------------------------------------------------------------------------------
DIMM #1
General
Memory type DDR-SDRAM
Manufacturer (ID) Kingston (7F98000000000000)
Size 1024 MBytes
Max bandwidth PC3200 (200 MHz)
Part number K
Serial number 75023380
Manufacturing date Week 00/Year 02
Attributes
Number of banks 2
Data width 64 bits
Correction None
Registered no
Buffered no
Timings table
Frequency (MHz) 133 166 200
CAS# 2.0 2.5 3.0
RAS# to CAS# delay 2 3 3
RAS# Precharge 2 3 3
TRAS# 6 7 8
DIMM #2
General
Memory type DDR-SDRAM
Manufacturer (ID) Kingston (7F98000000000000)
Size 1024 MBytes
Max bandwidth PC3200 (200 MHz)
Part number K
Serial number 74023480
Manufacturing date Week 00/Year 02
Attributes
Number of banks 2
Data width 64 bits
Correction None
Registered no
Buffered no
Timings table
Frequency (MHz) 133 166 200
CAS# 2.0 2.5 3.0
RAS# to CAS# delay 2 3 3
RAS# Precharge 2 3 3
TRAS# 6 7 8
DIMM #3
General
Memory type DDR-SDRAM
Manufacturer (ID) Kingston (7F98000000000000)
Size 512 MBytes
Max bandwidth PC3200 (200 MHz)
Part number K
Serial number 021CB351
Manufacturing date Week 28/Year 05
Attributes
Number of banks 2
Data width 64 bits
Correction None
Registered no
Buffered no
Timings table
Frequency (MHz) 133 166 200
CAS# 2.0 2.5 3.0
RAS# to CAS# delay 2 3 3
RAS# Precharge 2 3 3
TRAS# 6 7 8
DIMM #4
General
Memory type DDR-SDRAM
Manufacturer (ID) Kingston (7F98000000000000)
Size 512 MBytes
Max bandwidth PC3200 (200 MHz)
Part number K
Serial number 021CB251
Manufacturing date Week 28/Year 05
Attributes
Number of banks 2
Data width 64 bits
Correction None
Registered no
Buffered no
Timings table
Frequency (MHz) 133 166 200
CAS# 2.0 2.5 3.0
RAS# to CAS# delay 2 3 3
RAS# Precharge 2 3 3
TRAS# 6 7 8
Dump Module #1
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 80 08 07 0D 0B 02 40 00 04 50 70 00 82 08 00 01
10 0E 04 1C 01 02 20 C0 60 70 75 75 3C 28 3C 28 80
20 60 60 40 40 00 00 00 00 00 37 46 30 28 50 00 00
30 00 00 00 00 00 00 00 00 00 00 00 00 00 00 10 C0
40 7F 98 00 00 00 00 00 00 04 4B 00 00 00 00 00 00
50 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 75
60 02 33 80 00 00 00 00 00 00 00 00 00 00 00 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Dump Module #2
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 80 08 07 0D 0B 02 40 00 04 50 70 00 82 08 00 01
10 0E 04 1C 01 02 20 C0 60 70 75 75 3C 28 3C 28 80
20 60 60 40 40 00 00 00 00 00 37 46 30 28 50 00 00
30 00 00 00 00 00 00 00 00 00 00 00 00 00 00 10 C0
40 7F 98 00 00 00 00 00 00 04 4B 00 00 00 00 00 00
50 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 74
60 02 34 80 00 00 00 00 00 00 00 00 00 00 00 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Dump Module #3
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 80 08 07 0D 0A 02 40 00 04 50 65 00 82 08 00 01
10 0E 04 1C 01 02 20 00 60 70 75 75 38 28 38 28 40
20 60 60 40 40 00 00 00 00 00 37 46 20 28 50 00 00
30 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 8C
40 7F 98 00 00 00 00 00 00 01 4B 00 00 00 00 00 00
50 00 00 00 00 00 00 00 00 00 00 00 00 00 05 1C 02
60 1C B3 51 00 00 00 00 00 00 00 00 00 00 00 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Dump Module #4
0 1 2 3 4 5 6 7 8 9 A B C D E F
00 80 08 07 0D 0A 02 40 00 04 50 65 00 82 08 00 01
10 0E 04 1C 01 02 20 00 60 70 75 75 38 28 38 28 40
20 60 60 40 40 00 00 00 00 00 37 46 20 28 50 00 00
30 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 8C
40 7F 98 00 00 00 00 00 00 01 4B 00 00 00 00 00 00
50 00 00 00 00 00 00 00 00 00 00 00 00 00 05 1C 02
60 1C B2 51 00 00 00 00 00 00 00 00 00 00 00 00 00
70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Nope. That is the correct reading. DDR runs 'effectively' at 2x the
ACTUAL speed. It still is REALLY only running at 200 MHz, but since
data is transferred twice in each cycle, you get the effective rate of
400 MHz.
Phew! Lol...I think this demonstrates why it's important to *remember* to
check your settings *before* you start fiddling around, as well as checking
after...
Thanks!
It is better to operate only 1 GB in channel A and 1 GB in channel B
(dual channel).
But, of course, you will try out various combinations...
Roy