SysML: Mixing SW with analog HW

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avi-mak

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Jul 15, 2024, 1:22:03 AM (yesterday) Jul 15

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HI all,

Hypothetical scenario - hasn’t happened yet, but quite likely soon will. (This question must have been asked a 1000 times … but I can't find answers)

I am given a system sketch with mixed SW and analog HW components and asked to model it using SysML.

Simple example: A Gardening SW application runs on a PC computer and connects to (controls) a garden sprinkler device. The sprinkler device is not digital.

I am assuming that SysML (MBSE?) forbids mixing HW and SW in the same diagram.

What do I do?

Suggestion – at HW level and at SW level:

(Assuming the BDD diagram is properly set up.)

HW IBD Diagram: No problem - I can model the system as two HW devices:

• PC Computer HW, which runs the Gardening SW app

• Sprinkler device – not digital (non-intelligent)

SW IBD Diagram: Problem …

If they want a highest-level diagram to show the SW app just as a block-box bubble and connected to the sprinkler – again, the sprinkler is not intelligent – just analog. So the SW app has nobody to talk to from a SW point of view.

The only thing I can think of is to define something like this - a diagram with the following features:

Block named Gardening SW Context with a port named Output to Sprinkler port. The port appears on (straddles) the border of the diagram frame (customarily on the right)
Block named Gardening SW, with a port also named Output to Sprinkler port.
Place a connector that connects Gardening SW port to Gardening SW Context port.

Your opinions?

In practice, do some engineers simply model (draw...) a SW block connecting to an analog HW device?