Validation IP/SOC Engineer - San Jose, CA
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Jayan Chhaya
Feb 10, 2012, 10:07:30 PM2/10/12
to CAREERS AT HCL AMERICA
Position: Validation IP/SOC Engineer
Location: San Jose, CA
Qualifications:
- BSEE required, MSEE preferred
– A minimum of 2 years experience in a SOC Validation or Field Applications Engineering role.
- Familiarity with pre-silicon and post-silicon validation environment, debugging, preparation of validation test reports and chip bug reports
- Experience with typical lab equipment such as logic analyzers, oscilloscopes, in-circuit emulators, etc.
- Knowledge of system I/O protocols such as SATA, SCSI, or SAS.
- Experience with C, assembly and or low level hardware coding (setting bits and writing bytes to initialize and configure ASICs for test operations).
- Familiar with memory systems such as FLASH/ONFI
- Ability to read and use Verilog hardware models for detailed investigations of ASIC issues and test verification/debug.
Description:
- Responsible for silicon validation and generation of appropriate test reports.
- Work closely with design engineers to insure all critical test points.
Apply directly to: jay...@hcl.com
Jayan Chhaya
Associate Manager - Talent Acquisition Group
HCL America, Inc.
Ph: +1-860-967-0219
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