Backplane v. Termination ...

[Walt Perko]

Hi, 

This might be a good conversation for a ZOOM ... 

Why some backplanes don't need termination and others do need termination.  

What I've heard is if the S-100 boards are within a particular distance from the board on one end of the backplane to the last S-100 board installed in the backplane ... no termination is needed.  

When I was building my Altair 8800c computer a few years ago, I was told not to install termination because it wasn't needed on the smaller backplanes.  

But I've also heard some termination doesn't seem to fix problems that arise on 12-slot  and larger backplanes.  

.

[Joseph Corda]

Walt
That is a great suggestion.. make sure to include it in the next meeting
Now I have always heard... it was the speed of the CPU on whether to need bus termination.    
ie.  "No Termination" <= 4Mhz > "Needs Termination"   
It would be nice to know if termination is needed based on # of Slots or CPU speed or possibly a combination of both ?

Joe

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[Michael Chadwick]

It has more to do with the edge rate of the signal, rise and fall times.  Reflections from the stub ends of the lines can play havoc with the signal integrity. Each board plugged in is a discontinuity that causes an impedance change, which is a good reason to keep the lines short from the card edge bus fingers to the chip receiving or driving the signal.  You may find a board works in a particular slot, but not others, due to the reflections.

From a google search (I never remember the rules of thumb)  

A trace acts as a transmission line when its physical length is comparable to the electrical length of the signal, with a common rule of thumb being when the trace is longer than approximately 1/10th of the signal's wavelength. Another widely used criterion is when the trace's propagation delay exceeds a certain fraction of the signal's rise time, often around one-sixth of the signal's rise time, meaning you must manage impedance control and termination to prevent reflections.

 
Rules of Thumb for Identifying Transmission Line Behavior
Wavelength Rule: Treat a trace as a transmission line if its length is greater than approximately 1/10th of the signal's wavelength.
Rise Time Rule: A trace should be considered a transmission line if its length exceeds roughly 1/6th of the signal's rise time, or if the propagation delay over the trace length is significant compared to the signal rise time.

Speed on a pcb according to google is around 1 nano second for 6 inches.  So a short bus seems like it wouldn't be much of an issue, but that depends on the strength and rise / fall time of the driver.  Old TTL had relatively slow rise times..  As long as the reflections happen quickly enough (short line) they get buried in the rise time.  

The ieee696 / S100 spec says no rise or fall times less than 5 nano seconds.  (Section 3.3)  Section 3.4.2 says no rise or fall times longer than 50 nano seconds.

Modern logic can have sub nano second rise times and will cause a lot of reflections.

The point of the termination is to absorb the reflections, and should be somewhere around the impedance of the bus lines.  Which depends on the layout of the bus, and what's plugged into it in and where.

Here are a some useful references:

https://www.retrotechnology.com/herbs_stuff/s100bus.html

https://www.retrotechnology.com/herbs_stuff/s_term.html#trans

https://www.retrotechnology.com/herbs_stuff/s_term.html#theory

http://www.s100computers.com/General%20Images/ieee696spec.pdf

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[Walt Perko]

Hi, 

Great to have a discussion I mostly understand.   

So, the chips on an Altair 8800 compatible S-100 board that get or send signals to/from the bus have chips that are closet (near the bottom fingers) of the board to protect the rest of the board circuit from odd reflections that would otherwise occur if those chips were not there?  Then the circuit up higher on the board is the primary function of the board in a general sense?  

.

[Michael Chadwick]

"So, the chips on an Altair 8800 compatible S-100 board that get or send signals to/from the bus have chips that are closest (near the bottom fingers) of the board to protect the rest of the board circuit from odd reflections that would otherwise occur if those chips were not there?  Then the circuit up higher on the board is the primary function of the board in a general sense"

Yes, you want the chips that drive and receive bus signals located close to the bus connector, generally buffers like LS244 or LS365 or 367. Then the rest of the logic can be wherever it needs to be on the board.  Though the same issues apply on long signal lines on the board.

Sometimes signals on the board may require termination, though if it's a fast unidirectional signal driving something across the board you can get away with a series resistor at the output of the driving gate.  If the resistor plus the output impedance of the driver matches the line impedance, the wave propagates down the line at half the driver output voltage and when the wave hits the end of the line, it doubles and propagates back. If your receiver is at the end of the line it gets a clean full voltage signal at that time.  When the reflected wave hits the terminator at the driving end, if it's higher or lower voltage than the output of the driver it gets absorbed for the most part. Subsequent reflections, if any, are above the input threshold of the receiver and don't have any effect.

That can work with multiple receivers, but it depends on the input threshold being either above or below the initial wave.  If they are lower, they all change state at the time of the initial wave, if they are higher, then they change when the reflected wave comes back and pushes the voltage at that point above the threshold.  But they all change at slightly different times depending on location along the line.

The advantage of the series termination is less power dissipation than parallel termination.

The issue of signal integrity is why PCIe lines are point to point with separate lines for each direction of data.  No worries about stuff in between messing up the impedance of the line or having to deal with terminating a bidirectional line.  Which is how they can run at such incredible speeds.

Which is all more information than you probably wanted. :)

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[Walt Perko]

Hi, 

This discission of the Altair Bus brought to mind a problem John was having with his new 12-Slot backplane he designed and seemed to fail after several attempts to duplicate the WonderBuss board, CompuPro and other attempts that all failed.  

This makes me wonder if the thickness of the backplane might be the problem?  JLCPCB makes thinner boards and perhaps there is some kind of problem with the signals on the thinner boards ???  

.

[Terry Fox]

I don't think I can make todays Zoom meeting.  

I think John problem was that he was trying to design a fast and large motherboard.  Making it run fast (10+ MHz) is not so easy.  As Jeff discussed on an S100 Zoom meeting a few months ago, higher speeds require more attention to bus design because you are dealing with RF problems such as reflections, impedance mismatching, etc.  Designing a fast reliable high-speed bus is not as simple as just laying down traces.

Terry