18-340: Trouble with Homework, Problem 3, Part C

[Taylor Womack]

Hey,

I'm having difficulty understanding how to do part C of the problem 3 on the homework. It seems like we simply apply what's being done on slide 16-48 to the circuit and then find the highest controllability value. The problem is I don't understand what's happening on slide 16-48.

Is their anyway you could briefly explain what's happening with the values on the nets connected to the first NAND gate on slide 16-48?

Thank you!
---
Taylor Womack
two...@andrew.cmu.edu

[Shawn Blanton]

Taylor

visit office hours...this is not a question for over email...did you
look at the slides prior to this one...? The equations on the previous
slide(s) define where those valises come from. Were you in class that day?

sb

[Qiuling Zhu]

Hi Professor,

We are working together on this problem in my office hour. Unfortunately I myself have trouble to apply the equations on the previous slide to get the numbers in slide 16-48.

Thanks,

Jolin

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[Shawn Blanton]

ok...the numbers may be wrong...just follow the equations...

On 5/2/2013 3:37 PM, Qiuling Zhu wrote:

Hi Professor,

We are working together on this problem in my office hour. Unfortunately I myself have trouble to apply the equations on the previous slide to get the numbers in slide 16-48.

Thanks,

Jolin

On Thu, May 2, 2013 at 3:29 PM, Shawn Blanton <bla...@ece.cmu.edu> wrote:

Taylor

visit office hours...this is not a question for over email...did you look at the slides prior to this one...? The equations on the previous slide(s) define where those valises come from. Were you in class that day?

sb

On 5/1/2013 9:45 PM, Taylor Womack wrote:

Hey,

I'm having difficulty understanding how to do part C of the problem 3 on the homework.  It seems like we simply apply what's being done on slide 16-48 to the circuit and then find the highest controllability value.  The problem is I don't understand what's happening on slide 16-48.

Is their anyway you could briefly explain what's happening with the values on the nets connected to the first NAND gate on slide 16-48?

Thank you!
---
Taylor Womack
two...@andrew.cmu.edu

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