Hi all,
Following are details of a Singapore job opportunity for senior/ principle backend IC design engineers. If you are interested, please send your CV to vanl...@ieee.org for further discussion.
Job Description:
Be part of a team in creating state-of-the-art Secure Low Power SoC ARM-based IC/SoC for the wired and wireless connectivity market in a Product Line environment
Responsibilities:
• Implement RTL2GDS of SoC IC
• Implement RTL2GLN with a strong skill of writing DC constraints.
• Writing of UPF for multiple Power Domains to describe SoC Objective spec PD requirement
• Execute VCLP and power domain equivalence check for UPF and LEC
• Use of ICC2 to work on entire SoC BE flow from floor planning of SoC, CTS, and the P&R layout
• Must be able to close timing for Multi-mode-multi-corner with STA
• Able to execute LVS and DRC for preparation for Tape-out DB
Requirements:
• Bsc/Msc in electrical and electronic or Computer engineering.
• Experience in DFT and scan chain insertion is an added advantage
• Requires at least 5 years or More of SoC Physical BE tape-out experience
• Fluent use of Formality, PT, DC, Calibre, STARRC
• Experience in Tcl and Perl, and C
• Experience in writing of UPF to enable multiple power for DC to SoC layout requirement.
• Able to work in a team with a strong drive to excel
• Able to work independently on a given assignment and work hard to finish on time
• Good written and communication skills
Best regards,
Le Van Loi