|Beta Testers - FPGA shield for Beaglebone||Michael Jones||10/17/12 10:54 AM|
I am looking for individuals that would be interested in being a beta tester for the FPGA MARK-1. The FPGA MARK-1 is a highly configurable FPGA platform that is intended to be used as an independent FPGA development board or as an add-on (shield) to existing embedded platforms. The platforms that the MARK-1 is intended to interface with are: 1) Arduino; 2) Raspberry Pi; and 3) Beagle Bone. (See link to the FPGA MARK-1 project page for more details on the design.)
I took some working prototypes to Maker Faire New York to see what people thought and to get feedback on changes that users would like to see. I have made some changes including adding interfacing options for the Raspberry Pi and Beaglebone and have added a high speed data port for high bandwidth applications such as SDR (Software Defined Radio), high speed ADC, video, etc. I am going to be fabricating Beta boards with the changes and would like to have them tested for any required changes before going to production.
I need Beta testers that are proficient in working with the Raspberry Pi, Beaglebone or Arduino. The users need to have some experience in working FPGA’s. I would like the users to experiment with the FPGA Mark-1 interfacing options to one of the listed platforms, get some code examples running on the interfacing platform, and give me feedback on any errors in the design or changes that they would like to see based on their experience. I will supply the users with the FPGA MARK-1 Beta boards and give them a final production unit once fabricated.
I would like to see some existing projects that the users have developed to show that they are proficient in working with one of the listed platforms. I would also like see some FPGA work to show me that they have some experience in working FPGA’s. Please email with these items and I will talk to you further about being a Beta tester.
I would be happy to hear from anyone that may have opinion, insight or suggestion that they would like to share.
|Re: [beagleboard] Beta Testers - FPGA shield for Beaglebone||Eric||10/17/12 10:05 PM|
looked around the site. still couldn't see how you intend to interface to the beagle board and which beagleboard you intend to target. Got a link to cover that, maybe I missed that info somewhere. Ideally an fpga board would be mapped into memory and/or io space for fast transfers and maximum integration with the beagle.
|Re: [beagleboard] Beta Testers - FPGA shield for Beaglebone||Leon||10/18/12 12:58 AM|
On 18/10/2012 06:04, Eric Fort wrote:See the title - it's for the Bone!
|Re: [beagleboard] Beta Testers - FPGA shield for Beaglebone||Eric||10/18/12 5:28 AM|
Didn't see any details on how you intend to interface to the bone. hoping the interface to the bone is signifigantly different than the interface to the arduino as the bone is much more capable.
|Re: [beagleboard] Beta Testers - FPGA shield for Beaglebone||Michael Jones||10/18/12 12:33 PM|
Depending on when you looked, I added a link to some 3d renders for the bone at the bottom of the page http://valentfx.com/prj/fpga-dev/2-mark-1. It is not as optimal as directly connecting a cape, but I am trying to meet the balance between the multiple capable topologies (Pi, Bone, Arduino, standalone). There are also minimal size and cost criteria that I am trying to meet. Nothing is set in stone at this point. I am very open to hearing your opinions, but please keep in mind that there are many variables being balanced. Currently I am planning in implementing a direct parallel interface between the FPGA and bone and some combination of other pins from P8. Can the dedicated pins(uart, timer,ehrpwm2x) be used as general purpose pins if needed? Please let me know what pins will be most useful from the P8 port. This will allow for a number of different way of communication between the FPGA and bone. Of course any of the other pins connected to the FPGA can be directly mapped to the Bone or indirectly accessed from within the FPGA.
I also want clarify that this platform and any hardware or code developed will be open source. I want to make it clear that I am not in this for myself, but to further the ability for users to easily interface between popular embedded platforms and FPGAs.
|Re: [beagleboard] Beta Testers - FPGA shield for Beaglebone||Michael Jones||10/19/12 4:10 PM|
As an update. I changed up the interface to make it a direct plug in for the BB. I also updated the schematics so that anyone interested can see the specific wiring from the BB to the FPGA. See the project site for specifics. Let me know if you have further thoughts.
|Re: Beta Testers - FPGA shield for Beaglebone||sa_Penguin||10/19/12 6:10 PM|
My first impressions after seeing your Web site are that I'd love one of these - for my Raspberry P. Or my old Arduino. But - for the Beaglebone? Not so much.
The headers for the Pi and Arduino are stackable. At the moment, the headers for the Bone fail this test (judging by the 3D views - you may have changed these by now).
For the board itself... egad that's a lot of adaptors. I'd be interested in how well it functions as a cross - adaptor, ie. Arduino Shields to Pi or Bone.
The board design has changed between the Pi and Bone 3D renders - but for both, it seems PMOD 6 (and I can't even find PMOD 5) aren't actually connected. I'd suggest you dump them.
As a test, stick an Arduino LCD shield (or similar) on top, and see if the the buttons are accessible, and LEDs visible. I suspect PB5 (Reset) and PB6 would have troubles. Same for the LEDs in a circle.
For analog in, you are relying on the microcontroller - that's a limit of 200Ksps 10-bit. Better than nothing, but hardly ground-breaking.
TI has the ADS6244, Linear Technology has the LTC2144-14 (2 channel, 14-bit 105Msps) are two suggestions I'd make.
For outputs, you could be the heros of many people trying to use the Pi as a media centre: add a SPDIF coonection. Go optical, the TOTX173 (or similar) would be my choice.
Having screw terminals for the optional power in is great - but I don't see any protection circuit for if the power is reversed. Just diodes to select the source to regulators U2, U4.
At the very least, I'd strongly recommend you add polarity indicators to the silkscreen mask. Hopefully you've already done this, and my observations (based on the 3D models) are obsolete.
When your design is out of beta stage, I'd suggest you get this guy to make a reference to it: Joel's Cheap FPGA Development Boards
-- Alan Campbell
On Thursday, 18 October 2012 04:24:54 UTC+10:30, Michael Jones wrote:
|Re: Beta Testers - FPGA shield for Beaglebone||magyarm||10/20/12 7:57 AM|
It looks pretty cool, and darn you beat me to it :P I've been working on a similar board for a while now. It's almost done, but I got swallowed by midterms the past 3 weeks, so haven't finished making the corrections my manufacturer suggested just yet. They are done (for now) so going to do a hard sprint for my board.
Looking at the pins connecting it on P8, it seems like you will have all the GPMC interface covered (minus 1 pin that's on P9, but I can't think of what it does off the top of my head). From my own work, I think the GPMC is definitely the way to go for interfacing. I look forward to being able to swap source code for the interface in the coming months. Reading your schematics, I don't see anyway to load the bitstream through the beaglebone. I only see that the on board mcu is by default loading it. Will the beaglebone have a connection to that mcu through a header to load bitstreams? I also like that you have pmods on your board. That is something I didn't think to include... I figured I would make a "pmod board" later that would stack on top of my fpga board. The one thing with the beaglebone is the EEPROM to identify the cape. I don't see you having a connection to the beaglebone's I2C bus for that. Are you planning on adding one, or do you have a different strategy for identifying the board? (If so, mind telling? maybe it's something I could use ;))
All in all, I think it's a cool board. Interestingly, I now know of 3 of us all designing fpga based boards for the beaglebone. Each on is different from the others. It's neat how all of us took different approach to the problem.
Have a good one,
|Re: [beagleboard] Beta Testers - FPGA shield for Beaglebone||sa_Penguin||10/20/12 7:28 PM|
I just saw the new Arduino Due: http://www.wired.com/design/2012/10/arduino-due/
Even more pins to connect!
By this stage, I would suggest "splitting" your design: if you still want to support all the Arduino baseboards, consider a series of adaptor boards rather than a single direct plug-in. You could move some of the buttons, switches, even PMODS to the adaptor boards, sell them seperately, and discount the main board. Sales will show which boards are your biggest market.
Mind you, with an ARM M3 your board, as it stands, could probably give the "real" Due a run for its money.
Sorry if I sound picky. Part of my job (Lockheed Martin) involves reviewing draft proposals from the local engineers. A picky review at the start can save dollars and headaches in the long run (or so they tell me).
That's also why I promote the high-speed ADCs with LVDS outputs. I know of a few engineers who'd really like an FPGA kit with good data acquisition (better than PMOD currently offers) for DSP design.
In fact, if I was to push my own agenda, I'd suggest you leave space for an SI-570 programmable oscillator. Combined with the ADCs you get 80% of SDR hardware, leaving only an analog front end.
-- Alan Campbell
|Re: Beta Testers - FPGA shield for Beaglebone||Stefan||10/24/12 10:09 AM|
I might be interested in testing your FPGA cape for the Bone. I am part of a very capable team at the University of Edinburgh, working on prototyping hardware for bleeding edge wireless communication systems.
I am currently gathering opinions within our research group whether we'd like to take the route of using a solution similar to yours or not, and will let you know on the results shortly.
What would you need in terms of "proof" of our technical capability -- would publications of our work in peer reviewed journals and conferences suffice?
|Re: Beta Testers - FPGA shield for Beaglebone||Michael Jones||12/19/12 9:01 AM|
Sorry I have not been keeping up on this forum topic. If you would like more expedient responses you can send me a direct email. mjo...@valentfx.com
The one thing with the beaglebone is the EEPROM to identify the cape. I don't see you having a connection to the beaglebone's I2C bus for that
I have added use of the I2C bus to talk directly to the LPC chip. The LPC will emulate the eeprom function to identify the cape. I have also made some changes to allow for direct programming of the fpga from the Bone.
I have added easy expansion of 4 LVDS pairs through the use of SATA ports. This will allow for any type LVDS applications to be easily interfaced.
As an update I have built a number of the Pi/Bone prototypes and myself and the beta testers are working on the support code to get them up and running with some cool applications such as running a machine vision application using a CMOS camera.
We have also talked about coming up with some projects such as:
- Software defined Radio
- Machine vision
- Bit Coin mining
We hope to have a couple of cool applications running in order to persuade some of the major distributors to carry to board. If this does not work out we will run a Kickstarter to get the board out there.
You see pictures and status updates for the board here: http://valentfx.com/prj/fpga-dev/2-mark-1
Hold tight, we hope to get this board in your hands soon.
|Re: Beta Testers - FPGA shield for Beaglebone||Michael Jones||12/19/12 9:03 AM|
Could you email me directly? I would like to talk to you about the work that you and your group are doing.
|Re: Beta Testers - FPGA shield for Beaglebone||Michael Jones||1/2/13 11:39 AM|
Hey Guys so a little update you may be interested in. I have designed a fabricated the LOGI-bone. An FPGA cape specifically designed for the beaglebone. I have entered it into the cape contest. The hopes is to get the distributors to carry it!
Here are the specifics: http://valentfx.com/prj/fpga-dev/19-logi-bone-cape
I am trying to get the word on these FPGA boards that I have now named the LOGI family with existing boards being the LOGI-MARK1 and LOGI-BONE. Future boards will be the LOGI-PI and LOGI-ARDUINO.
We currently have a LOGI Team which a few of us who are going to be supporting the boards, creating examples, etc. If any of you are interested in getting involved please let me know!
If you want to see these boards get out there, please help by spreading the word. We hope to have some fun designs up and running soon!
|RE: [beagleboard] Re: Beta Testers - FPGA shield for Beaglebone||Guillermo Vides||1/2/13 1:41 PM|
|Re: [beagleboard] Re: Beta Testers - FPGA shield for Beaglebone||Eric||1/7/13 5:43 AM|
Thanks so much for attaching this to the GPMC port pins. that's kinda needed for full use of the fpga. Hopefully many of the FPGA pins that attach to P6, P8 & P9 can be tri-state thus allowing "unused" pins not used by the cape HDL to be used elsewhere by other capes and circuitry.
|Re: [beagleboard] Re: Beta Testers - FPGA shield for Beaglebone||Michael Jones||1/26/13 11:02 AM|
Ahh, Yes, the pins can be tristated. You can load a bitfile that leaves unused pins as "floating", or you can manually control individual pins for tri-state operation.
By the way, if you guys have a chance check out the logi-bone cape contest entry here and give it a like! I hope that it is selected in the top 3 and will make getting it to you guys a snap as circuitCo will mfg and distribute the design!
|Re: [beagleboard] Re: Beta Testers - FPGA shield for Beaglebone||Michael Jones||12/12/13 8:47 AM|
Just an update that we are Finally releasing the LOGi-Bone. We just launched our kickstarter! So if you are geared up and ready to add an FPGA to you Bone have a look. As always we are open to thoughts and suggestions!