|Beaglebone + PRUSSv2 + pasm_1||2bl...@gmail.com||2/29/12 9:55 PM|
I've been playing with the PRU on the beaglebone lately hoping to get a headstart on some work before TI releases pasm_2 that the TRM refers to.
I've had some success with updating the uio_pruss module and TI's pru_sw examples and apploader (front end to uio_pruss). As of write now I can write short assembly programs that load immediates and store them to the PRU0 8KB Data RAM 0. I however have had no luck storing these to DDR2 @ 0x80000000 or the OCM SRAM @ 0x40300000.
I know there are some other people messing with this stuff as well and was hoping somebody else has had some luck they would share.
The pasm code I'm working with looks like this:
// Configure the programmable pointer register for PRU0 by setting c30_pointer[15:0] and
// c31_pointer[15:0] field to 0x0020 and 0x0010, respectively. This will make C30 point
// to 0x40300000 (L3) and C31 point to 0x80001000 (DDR memory).
//MOV32 r0, 0x00103000
//MOV r1, CTPPR_1
//ST32 r0, r1
// Works: Load values from external DDR Memory into Registers R0/R1/R2
LDI r1, #0
LDI r1.b2, #0x0a
LDI r1.b3, #0x81
LDI r2, #20
LDI r3, #30
// Works: Store to local 0x0 on global: 0x4a300000
LDI r4, #0
SBBO r1, r4, 0, 12
// FIX: Store to global 0x810a0000
SBBO r1, r1, 0, 12
// CTPPR1 = 0x00003000 set by host, hack it with: devmem2 0x4a32202c w 0x00003000
// FIX: Store to 0x40300000 / OCM SRAM
SBCO r1, c30, 0, 12
// FIX: Store to 0x80000000 / DDR2
SBCO r1, c31, 0, 12
// FIX: Read 0x80000000 and store to PRU Data RAM 0
LBCO r1, c31, 0, 4
SBBO r1, r4, 0x10, 4
// Send notification to Host for program completion
//MOV R31.b0, #PRU0_ARM_INTERRUPT
// Halt the processor
|Re: [beagleboard] Beaglebone + PRUSSv2 + pasm_1||pomarek||3/1/12 5:38 AM|
To get outside of pruss memory space you need to clear STANDBY_INIT bit in the SYSCFG register.(TRM 18.104.22.168)
|Re: [beagleboard] Beaglebone + PRUSSv2 + pasm_1||2bl...@gmail.com||3/1/12 6:07 AM|
Awesome, that fixed it.
On Thursday, March 1, 2012 7:38:56 AM UTC-6, pomarek wrote: