Full Adder Using NAND gate

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Manish Khatri

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May 18, 2011, 12:55:27 AM5/18/11
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Is it possible to Implement the sum and carry of a full adder using
only seven nand gate? If yes the give the schematic diagram.

Narveer Yadav

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May 18, 2011, 1:02:19 AM5/18/11
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See the diagram below.

MANISH KHATRI

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May 18, 2011, 1:08:16 AM5/18/11
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this is not a full adder please give the full adder using 7 nand gate


On Wed, May 18, 2011 at 10:32 AM, Narveer Yadav <yada...@gmail.com> wrote:

See the diagram below.



--
Manish Khatri
M.Sc. Electronic Sc.
Kurukshetra University
Kurukshetra

anurekha Sharma

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May 18, 2011, 1:11:52 AM5/18/11
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I agree this is a half adder
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Dr. Anurekha Sharma
Associate Professor
Deptt. of Electronic Science
Kurukshetra University, Kurukshetra-136119

Narveer Yadav

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May 18, 2011, 1:15:48 AM5/18/11
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Yes, this is a half adder. But as far as I Know full adder can implemented using 9 NAND gate.
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Regards,
Narveer Yadav

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