Hello,
and welcome to the mailing list. The description of your problem is unfortunately not very explicit, so it is hard to understand what you actually did.
I am assuming that you followed the instructions in the Hyperbook, and entered something like the following specification.
---------------------------- MODULE OneBitClock ----------------------------
VARIABLE b
Init == b=0 \/ b=1
Next == \/ b=0 /\ b'=1
\/ b=1 /\ b'=0
=============================================================================
You then probably ran TLC by indicating the initial and next-state predicates in the corresponding fields and clicking on the green triangle, seeing that it generated 4 states, 2 of which are distinct.
If you followed the instructions, you then changed b'=0 into b'="xyz" and saved the module. Did you actually rerun TLC, i.e. click on the green triangle? I am asking because the photo attached to your message shows an empty output pane. If you do, you should see a result similar to the attached screen shot.
Hope this helps,
best regards,
Stephan