Pandaboard ES Rev B3 - Using GPIO with DeviceTree

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Anna-Lena Marx

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Apr 10, 2015, 4:33:53 AM4/10/15
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Hi,

I'm new with Pandaboard and running a Pandaboard ES Rev B3 with a Linaro Linux, Kernel 3.19 and Device Tree.
And there's my problem:
I has to use the GPIOs of the Expansion Headers on the Board, but I don't understand at witch points I has to change the Device Tree files to enable pinmuxing at these pins. I'm know which addresses and offsets for which pin I need to add, but not which files should be edited in which way. I tryed alone for a few days, but no success.

Can anyone may help me to understand how device tree works at pandaboard and get GPIOs working?


Regards,
Anna

menon.n...@gmail.com

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Apr 10, 2015, 9:48:14 AM4/10/15
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Base address is here:
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/omap4.dtsi#n176
if the pin belongs to core domain pins, 0x4a100040 , wakeup domain
pins start at 0x4a31e040
then you add to
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/omap4-panda-common.dtsi#n190
if core domain
Without looking at exact pin, lets use an example of 0xdead offset..

my_pins: pinmux_my_pins {
pinctrl-single,pins = <
0xdead (PIN_INPUT | MUX_MODE4) /* mux0.gpio5_4 */
>;
};
--
Regards,
Nishanth Menon

Anna-Lena Marx

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Apr 13, 2015, 6:35:33 AM4/13/15
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Thank you very much for your help, my changes seem to work.

Regards,
Anna-Lena Marx

Anna-Lena Marx

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Apr 24, 2015, 10:06:23 AM4/24/15
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Hi,
I hope you can help me once more. After getting basic GPIO functionality working I need some interrupts on them.
I add this for get the GPIOs working:

&omap4_pmx_core {
    pinctrl
-names = "default";
    pinctrl
-0 = <
           
&dss_dpi_pins
           
&tfp410_pins
           
&dss_hdmi_pins
           
&tpd12s015_pins
           
&hsusbb1_pins
   
>;
       
        j3_gpios
: pinmux_j3_gpios{
                pinctrl
-single,pins =<
                       
0x1e (PIN_OUTPUT | MUX_MODE3)    /* gpio_39 */
               
                       
// 0xee (PIN_OUTPUT | MUX_MODE3)   /* i2c4_scl.gpio_132 used as i2c4 */
                       
// 0xf0 (PIN_OUTPUT | MUX_MODE3)   /* i2c4_sda.gpio_133 used as i2c4 */
                       
                       
0xf2 (PIN_OUTPUT | MUX_MODE3)    /* gpio_134 */
                       
0xf4 (PIN_OUTPUT | MUX_MODE3)    /* gpio_135 */
                       
0xf6 (PIN_OUTPUT | MUX_MODE3)    /* gpio_136 */
                       
0xf8 (PIN_OUTPUT | MUX_MODE3)    /* gpio_137 */
                       
0xfa (PIN_OUTPUT | MUX_MODE3)    /* gpio_138 */
                       
0xfc (PIN_OUTPUT | MUX_MODE3)    /* gpio_139 */
                       
0xfe (PIN_OUTPUT | MUX_MODE3)    /* gpio_140 */
                       
                       
0x11c (PIN_OUTPUT | MUX_MODE3)    /* gpio_155 */
                       
0x11e (PIN_OUTPUT | MUX_MODE3)    /* gpio_156 */
               
>;
       
};
       
        j6_gpios
: pinmux_j6_gpios{
                pinctrl
-single,pins = <
                       
0x10 (PIN_OUTPUT | MUX_MODE3)    /* gpio_32 */
                       
0x12 (PIN_OUTPUT | MUX_MODE3)    /* gpio_33 */
                       
0x14 (PIN_OUTPUT | MUX_MODE3)    /* gpio_34 */
                       
0x16 (PIN_OUTPUT | MUX_MODE3)    /* gpio_35 */
                       
0x18 (PIN_OUTPUT | MUX_MODE3)    /* gpio_36 */
                       
0x1a (PIN_OUTPUT | MUX_MODE3)    /* gpio_37 */
                       
0x1c (PIN_OUTPUT | MUX_MODE3)    /* gpio_38 */
                       
                       
0x34 (PIN_OUTPUT | MUX_MODE3)    /* gpio_50 */
                       
0x36 (PIN_OUTPUT | MUX_MODE3)    /* gpio_51 */
                       
0x3c (PIN_OUTPUT | MUX_MODE3)    /* gpio_54 */
                       
0x3e (PIN_OUTPUT | MUX_MODE3)    /* gpio_55 */
                       
0x40 (PIN_OUTPUT | MUX_MODE3)    /* gpio_56 */
                       
0x46 (PIN_OUTPUT | MUX_MODE3)    /* gpio_59 */
                       
0x4a (PIN_OUTPUT | MUX_MODE3)    /* gpio_61 */
                       
                       
0xD4 (PIN_OUTPUT | MUX_MODE3)     /* gpio_121 */
                       
                       
               
>;
       
};


I need an irq at one gpio but for pinmux@4a100040 seems no irq domain defined.
dmesg:
irq: no irq domain found for /ocp/pinmux@4a100040

Where should I define the irq domain, which interrupts could I use for my gpios?

Regards,
Anna-Lena Marx

Anna-Lena Marx

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Apr 28, 2015, 3:49:44 AM4/28/15
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For adding IRQ I modified omap4-panda-es.dts according to this.
I need two pins for controlling a sensor, one as input with an interrupt, the other as output. I added :

&omap4_pmx_core {
    led_gpio_pins
: gpio_led_pmx {
        pinctrl
-single,pins = <
           
0xb6 (PIN_OUTPUT | MUX_MODE3)    /* gpio_110 */
       
>;
   
};
   
+    hcsr04_pins: hcsr04_pins{
+            pinctrl-single,pins = <
+                0xf6 (PIN_INPUT_PULLUP | MUX_MODE3)    /* gpio_136 */
+                0xfa (PIN_OUTPUT | MUX_MODE3)    /* gpio_138 */
+            >;
+    };
};



+&omap4_pmx_core{
+    
+     hcsr04{
+        pinctrl-names = "default";
+        pinctrl-0 = <&hcsr04_pins>;
+        reg = <0x03>;
+        interrupt-parent = <&gpio4>;
+        interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
+    };
+};


Sadly, I can't get this working. Could anyone help me to find the problem?


Regards,
Anna-Lena Marx
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