SSE instructions

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Philippe Clauss

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Nov 6, 2014, 9:09:54 AM11/6/14
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Hello,

We have made some first experiments using mc-sema with very good results. Do you plan to cover the whole SSE instruction set in the near future?

Thank you,

Philippe

Artem Dinaburg

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Nov 6, 2014, 1:50:39 PM11/6/14
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Hi Philippe,

We are slowly working on supporting more SSE instructions. I can't really give a timetable for when they'll be supported, but we want to add them. 

There are several (e.g. PORS/PORD) are just 128 bit versions of other instructions, so translating them should be fairly straightforward. Those will probably be supported first.

If you end up adding support for any SSE instructions, we will be very glad to merge patches :).

Thanks,
Artem

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Philippe Clauss

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Nov 8, 2014, 5:10:17 AM11/8/14
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Dear Artem,

Yes, we plan to add support for at least some SSE instructions, and we would be glad to contribute whatever we do. However, we are (mostly) interested in scalar and packed floating point arithmetic. This would require quite a bit of infrastructure work in McSema (as far as I understand), especially about representing the registers and handling the MCXSR register. Have you looked at this already? (We haven't checked in the code, feel free to point us to the relevant files.)

Thanks a lot, we hope we will be able to help.

Philippe

Artem Dinaburg

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Nov 9, 2014, 3:05:13 PM11/9/14
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Hi Phillippe,

MXCSR is not currently implemented. You would have to implement it and check various MXCSR bits when translating instructions that use MXCSR state. The recommended way to do this would be to copy the approach we used for EFLAGS and FPU CW, and to split each flag of the MXCSR as a sepatate entry in the register state structure. 

We had a guide for adding new register support at one point, but I can't seem to find it. I'll look around and see if we can get some documentation up to make your life easier. From what I can recall now, you would have to:

1) Add support for it in the RegisterState definition used outside of mcsema:

2) Add support for it in the RegisterState used internally in mcsema:

3) Add support for it in the store/spill code:

4) Add support for it in vairous helper functions:

If you want to look at the existing FPU/SSE support, the FPU translation is done in:
If you look at the current register context, you'll see that support for the SSE data registers (XMM0-XMM7) is already in place.

Artem

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