[PATCH v2 01/13] inmates: arm: uart-demo: move heartbeat to header file

[antonios...@huawei.com]

From: Antonios Motakis <antonios...@huawei.com>

Moving the heartbeat function to a header file, so we can reuse
the uart-demo just by reimplementing the heartbeat on AArch64.

Signed-off-by: Antonios Motakis <antonios...@huawei.com>
---
inmates/demos/arm/uart-demo.c | 13 -------------
inmates/lib/arm/include/inmate.h | 13 +++++++++++++
2 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/inmates/demos/arm/uart-demo.c b/inmates/demos/arm/uart-demo.c
index 46be1ce..4748d40 100644
--- a/inmates/demos/arm/uart-demo.c
+++ b/inmates/demos/arm/uart-demo.c
@@ -12,19 +12,6 @@

#include <inmate.h>

-/*
- * To ease the debugging, we can send a spurious hypercall, which should return
- * -ENOSYS, but appear in the hypervisor stats for this cell.
- */
-static void heartbeat(void)
-{
- asm volatile (
- ".arch_extension virt\n"
- "mov r0, %0\n"
- "hvc #0\n"
- : : "r" (0xbea7) : "r0");
-}
-
void inmate_main(void)
{
unsigned int i = 0, j;
diff --git a/inmates/lib/arm/include/inmate.h b/inmates/lib/arm/include/inmate.h
index cf42983..f6f62a4 100644
--- a/inmates/lib/arm/include/inmate.h
+++ b/inmates/lib/arm/include/inmate.h
@@ -36,6 +36,19 @@ static inline void mmio_write32(void *address, u32 value)
*(volatile u32 *)address = value;
}

+/*
+ * To ease the debugging, we can send a spurious hypercall, which should return
+ * -ENOSYS, but appear in the hypervisor stats for this cell.
+ */
+static inline void heartbeat(void)
+{
+ asm volatile (
+ ".arch_extension virt\n"
+ "mov r0, %0\n"
+ "hvc #0\n"
+ : : "r" (0xbea7) : "r0");
+}
+
void __attribute__((interrupt("IRQ"))) __attribute__((used)) vector_irq(void);

typedef void (*irq_handler_t)(unsigned int);
--
2.8.0.rc3

[antonios...@huawei.com]

From: Antonios Motakis <antonios...@huawei.com>

This patch series, includes the demo inmates to use with the
AArch64 port of Jailhouse. Most of those, are a port of
the AArch32 version.

Also a loader for a Linux kernel inmate is included, along
cell configuration files for the AMD Seattle board, and the
Foundation v8 software model from ARM.

Changes from v1:
- Only minor changes; a short document has been included with
instructions how to run a Linux inmate

Antonios Motakis (11):
inmates: arm: uart-demo: move heartbeat to header file
inmates: arm: lib: move IRQ stack initialization
inmates, arm: prep timer library for AArch64
inmates: arm64: port imate demos from AArch32 to AArch64
arm64: add work around for large SPIs on AMD Seattle
config: add uart demo cell config for Foundation v8
config: gic inmate cell config for foundation-v8
config: UART demo cell config for the AMD Seattle
config: gic demo cell config for the AMD Seattle
config: add linux inmate cell config for AMD Seattle
Documentation: add instructions for ARM64 Linux loader

Dmitry Voytik (2):
inmates: arm64: implement non-root linux loader
config: add linux inmate cell config for foundation-v8

Documentation/non-root-linux-arm64.txt | 51 +++++++
configs/amd-seattle-gic-demo.c | 55 ++++++++
configs/amd-seattle-linux-demo.c | 91 +++++++++++++
configs/amd-seattle-uart-demo.c | 55 ++++++++
configs/foundation-v8-gic-demo.c | 55 ++++++++
configs/foundation-v8-linux-demo.c | 72 ++++++++++
configs/foundation-v8-uart-demo.c | 55 ++++++++
hypervisor/arch/arm/include/asm/sysregs.h | 4 +-
hypervisor/arch/arm/irqchip.c | 17 ++-
inmates/Makefile | 4 +
inmates/demos/arm/uart-demo.c | 13 --
inmates/demos/arm64/Makefile | 20 +++
inmates/lib/arm/gic.c | 5 +-
inmates/lib/arm/include/gic.h | 9 ++
inmates/lib/arm/include/inmate.h | 13 ++
inmates/lib/arm/timer.c | 6 +-
inmates/lib/arm64/Makefile | 21 +++
inmates/lib/arm64/Makefile.lib | 46 +++++++
inmates/lib/arm64/header.S | 66 +++++++++
inmates/lib/arm64/include/gic.h | 30 +++++
inmates/lib/arm64/include/inmate.h | 66 +++++++++
.../arm64/include/mach-amd-seattle/mach/gic_v2.h | 14 ++
.../arm64/include/mach-amd-seattle/mach/timer.h | 13 ++
.../lib/arm64/include/mach-amd-seattle/mach/uart.h | 13 ++
.../arm64/include/mach-foundation-v8/mach/gic_v2.h | 14 ++
.../arm64/include/mach-foundation-v8/mach/timer.h | 13 ++
.../arm64/include/mach-foundation-v8/mach/uart.h | 13 ++
inmates/lib/arm64/inmate.lds | 46 +++++++
inmates/tools/arm64/Makefile | 19 +++
inmates/tools/arm64/linux-loader.c | 66 +++++++++
samples/kernel-inmate-amd-seattle.dts | 149 +++++++++++++++++++++
samples/kernel-inmate-foundation-v8.dts | 103 ++++++++++++++
32 files changed, 1193 insertions(+), 24 deletions(-)
create mode 100644 Documentation/non-root-linux-arm64.txt
create mode 100644 configs/amd-seattle-gic-demo.c
create mode 100644 configs/amd-seattle-linux-demo.c
create mode 100644 configs/amd-seattle-uart-demo.c
create mode 100644 configs/foundation-v8-gic-demo.c
create mode 100644 configs/foundation-v8-linux-demo.c
create mode 100644 configs/foundation-v8-uart-demo.c
create mode 100644 inmates/lib/arm64/Makefile.lib
create mode 100644 inmates/lib/arm64/header.S
create mode 100644 inmates/lib/arm64/include/gic.h
create mode 100644 inmates/lib/arm64/include/inmate.h
create mode 100644 inmates/lib/arm64/include/mach-amd-seattle/mach/gic_v2.h
create mode 100644 inmates/lib/arm64/include/mach-amd-seattle/mach/timer.h
create mode 100644 inmates/lib/arm64/include/mach-amd-seattle/mach/uart.h
create mode 100644 inmates/lib/arm64/include/mach-foundation-v8/mach/gic_v2.h
create mode 100644 inmates/lib/arm64/include/mach-foundation-v8/mach/timer.h
create mode 100644 inmates/lib/arm64/include/mach-foundation-v8/mach/uart.h
create mode 100644 inmates/lib/arm64/inmate.lds
create mode 100644 inmates/tools/arm64/linux-loader.c
create mode 100644 samples/kernel-inmate-amd-seattle.dts
create mode 100644 samples/kernel-inmate-foundation-v8.dts

--
2.8.0.rc3

[antonios...@huawei.com]

From: Antonios Motakis <antonios...@huawei.com>

This is a straightforward port of the inmate demos from
AArch32 to AArch64. These can now be loaded as cells onto
a Foundation ARMv8 model.

Signed-off-by: Antonios Motakis <antonios...@huawei.com>
---

inmates/Makefile | 4 ++
inmates/demos/arm64/Makefile | 20 +++++++
inmates/lib/arm64/Makefile | 21 +++++++
inmates/lib/arm64/Makefile.lib | 46 +++++++++++++++
inmates/lib/arm64/header.S | 66 ++++++++++++++++++++++
inmates/lib/arm64/include/gic.h | 30 ++++++++++
inmates/lib/arm64/include/inmate.h | 66 ++++++++++++++++++++++
.../arm64/include/mach-amd-seattle/mach/gic_v2.h | 14 +++++
.../arm64/include/mach-amd-seattle/mach/timer.h | 13 +++++
.../lib/arm64/include/mach-amd-seattle/mach/uart.h | 13 +++++
.../arm64/include/mach-foundation-v8/mach/gic_v2.h | 14 +++++
.../arm64/include/mach-foundation-v8/mach/timer.h | 13 +++++
.../arm64/include/mach-foundation-v8/mach/uart.h | 13 +++++
inmates/lib/arm64/inmate.lds | 46 +++++++++++++++
14 files changed, 379 insertions(+)

create mode 100644 inmates/lib/arm64/Makefile.lib
create mode 100644 inmates/lib/arm64/header.S
create mode 100644 inmates/lib/arm64/include/gic.h
create mode 100644 inmates/lib/arm64/include/inmate.h
create mode 100644 inmates/lib/arm64/include/mach-amd-seattle/mach/gic_v2.h
create mode 100644 inmates/lib/arm64/include/mach-amd-seattle/mach/timer.h
create mode 100644 inmates/lib/arm64/include/mach-amd-seattle/mach/uart.h
create mode 100644 inmates/lib/arm64/include/mach-foundation-v8/mach/gic_v2.h
create mode 100644 inmates/lib/arm64/include/mach-foundation-v8/mach/timer.h
create mode 100644 inmates/lib/arm64/include/mach-foundation-v8/mach/uart.h
create mode 100644 inmates/lib/arm64/inmate.lds

diff --git a/inmates/Makefile b/inmates/Makefile
index 0e8f258..c66cb2f 100644
--- a/inmates/Makefile
+++ b/inmates/Makefile
@@ -17,6 +17,10 @@ INCLUDES := -I$(INMATES_LIB) \
-I$(src)/../hypervisor/arch/$(SRCARCH)/include \
-I$(src)/../hypervisor/include

+ifeq ($(SRCARCH),arm64)
+INCLUDES += -I$(src)/../hypervisor/arch/arm/include
+endif
+
LINUXINCLUDE :=
KBUILD_AFLAGS += $(INCLUDES)
KBUILD_CFLAGS := -g -Os -Wall -Wstrict-prototypes -Wtype-limits \
diff --git a/inmates/demos/arm64/Makefile b/inmates/demos/arm64/Makefile
index e69de29..49abe09 100644
--- a/inmates/demos/arm64/Makefile
+++ b/inmates/demos/arm64/Makefile
@@ -0,0 +1,20 @@
+#
+# Jailhouse AArch64 support
+#
+# Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH
+#
+# Authors:
+# Antonios Motakis <antonios...@huawei.com>
+#
+# This work is licensed under the terms of the GNU GPL, version 2. See
+# the COPYING file in the top-level directory.
+#
+
+include $(INMATES_LIB)/Makefile.lib
+
+INMATES := gic-demo.bin uart-demo.bin
+
+gic-demo-y := ../arm/gic-demo.o
+uart-demo-y := ../arm/uart-demo.o
+
+$(eval $(call DECLARE_TARGETS,$(INMATES)))
diff --git a/inmates/lib/arm64/Makefile b/inmates/lib/arm64/Makefile
index e69de29..3661191 100644
--- a/inmates/lib/arm64/Makefile
+++ b/inmates/lib/arm64/Makefile
@@ -0,0 +1,21 @@
+#
+# Jailhouse, a Linux-based partitioning hypervisor
+#
+# Copyright (c) Siemens AG, 2015
+#
+# Authors:
+# Jan Kiszka <jan.k...@siemens.com>
+#
+# This work is licensed under the terms of the GNU GPL, version 2. See
+# the COPYING file in the top-level directory.
+#
+
+include $(INMATES_LIB)/Makefile.lib
+
+always := lib.a
+
+lib-y := header.o
+lib-y += ../arm/gic.o ../arm/printk.o ../arm/timer.o
+lib-y += ../string.o ../cmdline.o
+lib-$(CONFIG_ARM_GIC) += ../arm/gic-v2.o
+lib-$(CONFIG_SERIAL_AMBA_PL011) += ../arm/uart-pl011.o
diff --git a/inmates/lib/arm64/Makefile.lib b/inmates/lib/arm64/Makefile.lib
new file mode 100644
index 0000000..0196c51
--- /dev/null
+++ b/inmates/lib/arm64/Makefile.lib
@@ -0,0 +1,46 @@
+#
+# Jailhouse, a Linux-based partitioning hypervisor
+#
+# Copyright (c) ARM Limited, 2014
+# Copyright (c) Siemens AG, 2014
+#
+# Authors:
+# Jean-Philippe Brucker <jean-phili...@arm.com>
+# Jan Kiszka <jan.k...@siemens.com>
+#
+# This work is licensed under the terms of the GNU GPL, version 2. See
+# the COPYING file in the top-level directory.
+#
+
+-include $(obj)/../../../hypervisor/include/generated/config.mk
+
+KBUILD_AFLAGS := $(filter-out -include asm/unified.h,$(KBUILD_AFLAGS))
+
+KBUILD_CFLAGS += -I$(INMATES_LIB)/include
+KBUILD_AFLAGS += -I$(INMATES_LIB)/include
+
+define DECLARE_TARGETS =
+ _TARGETS = $(1)
+ always := $$(_TARGETS)
+ # $(NAME-y) NAME-linked.o NAME.bin
+ targets += $$(foreach t,$$(_TARGETS:.bin=-y),$$($$t)) \
+ $$(_TARGETS:.bin=-linked.o) $$(_TARGETS)
+endef
+
+mach-$(CONFIG_MACH_FOUNDATION_V8) := foundation-v8
+mach-$(CONFIG_MACH_AMD_SEATTLE) := amd-seattle
+
+MACHINE := mach-$(mach-y)
+KBUILD_CFLAGS += -I$(INMATES_LIB)/include/$(MACHINE)
+KBUILD_AFLAGS += -I$(INMATES_LIB)/include/$(MACHINE)
+
+# prevent deleting intermediate files which would cause rebuilds
+.SECONDARY: $(addprefix $(obj)/,$(targets))
+
+.SECONDEXPANSION:
+$(obj)/%-linked.o: $(INMATES_LIB)/inmate.lds $$(addprefix $$(obj)/,$$($$*-y)) \
+ $(INMATES_LIB)/lib.a
+ $(call if_changed,ld)
+
+$(obj)/%.bin: $(obj)/%-linked.o
+ $(call if_changed,objcopy)
diff --git a/inmates/lib/arm64/header.S b/inmates/lib/arm64/header.S
new file mode 100644
index 0000000..fe7bae7
--- /dev/null
+++ b/inmates/lib/arm64/header.S
@@ -0,0 +1,66 @@
+/*
+ * Jailhouse AArch64 support
+ *
+ * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH
+ *
+ * Authors:
+ * Antonios Motakis <antonios...@huawei.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+.macro ventry label
+ .align 7
+ b \label
+.endm
+
+ .section ".boot", "ax"
+ .globl __reset_entry
+__reset_entry:
+ ldr x0, =vectors
+ msr vbar_el1, x0
+
+ ldr x0, =stack_top
+ mov sp, x0
+
+ mov x0, #(3 << 20)
+ msr cpacr_el1, x0
+
+ msr daif, xzr
+
+ isb
+
+ b inmate_main
+
+handle_irq:
+ bl vector_irq
+ eret
+
+.weak vector_irq
+ b .
+
+ .globl vectors
+ .align 11
+vectors:
+ ventry .
+ ventry .
+ ventry .
+ ventry .
+
+ ventry .
+ ventry handle_irq
+ ventry .
+ ventry .
+
+ ventry .
+ ventry handle_irq
+ ventry .
+ ventry .
+
+ ventry .
+ ventry .
+ ventry .
+ ventry .
+
+ .ltorg
diff --git a/inmates/lib/arm64/include/gic.h b/inmates/lib/arm64/include/gic.h
new file mode 100644
index 0000000..6e00643
--- /dev/null
+++ b/inmates/lib/arm64/include/gic.h
@@ -0,0 +1,30 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Copyright (c) ARM Limited, 2014
+ *
+ * Authors:
+ * Jean-Philippe Brucker <jean-phili...@arm.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+#ifndef _JAILHOUSE_INMATES_GIC_H
+#define _JAILHOUSE_INMATES_GIC_H
+
+#include <inmate.h>
+
+#define GICD_ISENABLER 0x0100
+
+#define is_spi(irqn) ((irqn) > 31 && (irqn) < 1020)
+#define gic_setup_irq_stack()
+
+#ifndef __ASSEMBLY__
+
+int gic_init(void);
+void gic_enable(unsigned int irqn);
+void gic_write_eoi(u32 irqn);
+u32 gic_read_ack(void);
+
+#endif /* !__ASSEMBLY__ */
+#endif
diff --git a/inmates/lib/arm64/include/inmate.h b/inmates/lib/arm64/include/inmate.h
new file mode 100644
index 0000000..f869833
--- /dev/null
+++ b/inmates/lib/arm64/include/inmate.h
@@ -0,0 +1,66 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Copyright (c) ARM Limited, 2014
+ *
+ * Authors:
+ * Jean-Philippe Brucker <jean-phili...@arm.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#ifndef _JAILHOUSE_INMATE_H
+#define _JAILHOUSE_INMATE_H
+
+#ifndef __ASSEMBLY__
+typedef signed char s8;
+typedef unsigned char u8;
+
+typedef signed short s16;
+typedef unsigned short u16;
+
+typedef signed int s32;
+typedef unsigned int u32;
+
+typedef signed long long s64;
+typedef unsigned long long u64;
+
+static inline u32 mmio_read32(void *address)
+{
+ return *(volatile u32 *)address;
+}
+
+static inline void mmio_write32(void *address, u32 value)
+{
+ *(volatile u32 *)address = value;
+}
+

+/*
+ * To ease the debugging, we can send a spurious hypercall, which should return
+ * -ENOSYS, but appear in the hypervisor stats for this cell.
+ */
+static inline void heartbeat(void)
+{
+ asm volatile (

+ "mov x0, %0\n"
+ "hvc #0\n"
+ : : "r" (0xbea7) : "x0");
+}
+
+void __attribute__((used)) vector_irq(void);
+
+typedef void (*irq_handler_t)(unsigned int);
+void gic_setup(irq_handler_t handler);
+void gic_enable_irq(unsigned int irq);
+
+unsigned long timer_get_frequency(void);
+u64 timer_get_ticks(void);
+u64 timer_ticks_to_ns(u64 ticks);
+void timer_start(u64 timeout);
+
+#endif /* !__ASSEMBLY__ */
+
+#include "../inmate_common.h"
+
+#endif /* !_JAILHOUSE_INMATE_H */
diff --git a/inmates/lib/arm64/include/mach-amd-seattle/mach/gic_v2.h b/inmates/lib/arm64/include/mach-amd-seattle/mach/gic_v2.h
new file mode 100644
index 0000000..b357a21
--- /dev/null
+++ b/inmates/lib/arm64/include/mach-amd-seattle/mach/gic_v2.h
@@ -0,0 +1,14 @@
+/*
+ * Jailhouse AArch64 support
+ *
+ * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH
+ *
+ * Authors:
+ * Antonios Motakis <antonios...@huawei.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#define GICD_BASE ((void *)0xe1110000)
+#define GICC_BASE ((void *)0xe112f000)
diff --git a/inmates/lib/arm64/include/mach-amd-seattle/mach/timer.h b/inmates/lib/arm64/include/mach-amd-seattle/mach/timer.h
new file mode 100644
index 0000000..696b5cb
--- /dev/null
+++ b/inmates/lib/arm64/include/mach-amd-seattle/mach/timer.h
@@ -0,0 +1,13 @@
+/*
+ * Jailhouse AArch64 support
+ *
+ * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH
+ *
+ * Authors:
+ * Antonios Motakis <antonios...@huawei.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#define TIMER_IRQ 27
diff --git a/inmates/lib/arm64/include/mach-amd-seattle/mach/uart.h b/inmates/lib/arm64/include/mach-amd-seattle/mach/uart.h
new file mode 100644
index 0000000..512b6cb
--- /dev/null
+++ b/inmates/lib/arm64/include/mach-amd-seattle/mach/uart.h
@@ -0,0 +1,13 @@
+/*
+ * Jailhouse AArch64 support
+ *
+ * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH
+ *
+ * Authors:
+ * Antonios Motakis <antonios...@huawei.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#define UART_BASE ((void *)0xe1010000)
diff --git a/inmates/lib/arm64/include/mach-foundation-v8/mach/gic_v2.h b/inmates/lib/arm64/include/mach-foundation-v8/mach/gic_v2.h
new file mode 100644
index 0000000..bd3ec88
--- /dev/null
+++ b/inmates/lib/arm64/include/mach-foundation-v8/mach/gic_v2.h
@@ -0,0 +1,14 @@
+/*
+ * Jailhouse AArch64 support
+ *
+ * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH
+ *
+ * Authors:
+ * Antonios Motakis <antonios...@huawei.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#define GICD_BASE ((void *)0x2c001000)
+#define GICC_BASE ((void *)0x2c002000)
diff --git a/inmates/lib/arm64/include/mach-foundation-v8/mach/timer.h b/inmates/lib/arm64/include/mach-foundation-v8/mach/timer.h
new file mode 100644
index 0000000..696b5cb
--- /dev/null
+++ b/inmates/lib/arm64/include/mach-foundation-v8/mach/timer.h
@@ -0,0 +1,13 @@
+/*
+ * Jailhouse AArch64 support
+ *
+ * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH
+ *
+ * Authors:
+ * Antonios Motakis <antonios...@huawei.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#define TIMER_IRQ 27
diff --git a/inmates/lib/arm64/include/mach-foundation-v8/mach/uart.h b/inmates/lib/arm64/include/mach-foundation-v8/mach/uart.h
new file mode 100644
index 0000000..5ac3f87
--- /dev/null
+++ b/inmates/lib/arm64/include/mach-foundation-v8/mach/uart.h
@@ -0,0 +1,13 @@
+/*
+ * Jailhouse AArch64 support
+ *
+ * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH
+ *
+ * Authors:
+ * Antonios Motakis <antonios...@huawei.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#define UART_BASE ((void *)0x1c090000)
diff --git a/inmates/lib/arm64/inmate.lds b/inmates/lib/arm64/inmate.lds
new file mode 100644
index 0000000..01ba5f5
--- /dev/null
+++ b/inmates/lib/arm64/inmate.lds
@@ -0,0 +1,46 @@
+/*
+ * Jailhouse AArch64 support
+ *
+ * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH
+ *
+ * Authors:
+ * Antonios Motakis <antonios...@huawei.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+SECTIONS {
+ . = 0;
+ .boot : { *(.boot) }
+
+ . = 0x1000;
+ .cmdline : {
+ *(.cmdline)
+ BYTE(0); /* empty string in case no buffer is provided */
+ }
+
+ bss_start = .;
+ .bss : {
+ *(.bss)
+ }
+
+ . = ALIGN(4);
+ .text : {
+ *(.text)
+ }
+
+ .rodata : {
+ *(.rodata)
+ }
+
+ .data : {
+ *(.data)
+ }
+
+ . = ALIGN(4096);
+ . = . + 0x1000;
+ stack_top = .;
+}
+
+ENTRY(__reset_entry)
--
2.8.0.rc3

[antonios...@huawei.com]

From: Antonios Motakis <antonios...@huawei.com>

The AMD Seattle board features SPI ids that are larger than 64,
which we do not support properly. This workaround allows us to
demonstrate working cells on this target, until we have a proper fix.

This implies that only specific setups will be used on the
AMD Seattle; the IRQs for the uart and the second xgmac are being
passed to the cells.

Signed-off-by: Antonios Motakis <antonios...@huawei.com>
---

hypervisor/arch/arm/irqchip.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/hypervisor/arch/arm/irqchip.c b/hypervisor/arch/arm/irqchip.c
index d14de0a..7b9b429 100644
--- a/hypervisor/arch/arm/irqchip.c
+++ b/hypervisor/arch/arm/irqchip.c
@@ -40,9 +40,22 @@ bool spi_in_cell(struct cell *cell, unsigned int spi)
/* FIXME: Change the configuration to a bitmask range */
u32 spi_mask;

- if (spi >= 64)
+ if (spi >= 64) {
+#ifdef CONFIG_MACH_AMD_SEATTLE
+ /* uart irq workaround */
+ if (spi == 328)
+ return (cell != &root_cell);
+
+ /* xgmac1 irq workaround for the very brave.
+ * Uncommenting this may make the root cell unstable.
+ if ((spi == 322) || (spi ==324) ||
+ ((spi >= 341) && (spi <= 345))) {
+
+ return (cell != &root_cell);
+ }*/
+#endif
return (cell == &root_cell);
- else if (spi >= 32)
+ } else if (spi >= 32)
spi_mask = cell->arch.spis >> 32;
else
spi_mask = cell->arch.spis;
--
2.8.0.rc3

[antonios...@huawei.com]

From: Antonios Motakis <antonios...@huawei.com>

This patch is a minor touch up, that will allow to build the
ARM timer inmate library also on AArch64. We just need to add
the EL0 prefix to the CNTFRQ and CNTPCT sysregs, so we can
access them with the same code.

Signed-off-by: Antonios Motakis <antonios...@huawei.com>
---

hypervisor/arch/arm/include/asm/sysregs.h | 4 ++--
inmates/lib/arm/timer.c | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/hypervisor/arch/arm/include/asm/sysregs.h b/hypervisor/arch/arm/include/asm/sysregs.h
index 3011364..5e472bd 100644
--- a/hypervisor/arch/arm/include/asm/sysregs.h
+++ b/hypervisor/arch/arm/include/asm/sysregs.h
@@ -61,7 +61,7 @@
#define CNTV_CTL_EL0 SYSREG_32(0, c14, c3, 1)
#define CNTV_CVAL_EL0 SYSREG_64(3, c14)

-#define CNTPCT SYSREG_64(0, c14)
+#define CNTPCT_EL0 SYSREG_64(0, c14)

/*
* AArch32-specific registers: they are 64bit on AArch64, and will need some
@@ -97,7 +97,7 @@
#define TPIDRURO SYSREG_32(0, c13, c0, 3)
#define TPIDRPRW SYSREG_32(0, c13, c0, 4)

-#define CNTFRQ SYSREG_32(0, c14, c0, 0)
+#define CNTFRQ_EL0 SYSREG_32(0, c14, c0, 0)

#define ATS1HR SYSREG_32(4, c7, c8, 0)

diff --git a/inmates/lib/arm/timer.c b/inmates/lib/arm/timer.c
index fcb4161..4681a69 100644
--- a/inmates/lib/arm/timer.c
+++ b/inmates/lib/arm/timer.c
@@ -17,9 +17,9 @@

unsigned long timer_get_frequency(void)
{
- u32 freq;
+ unsigned long freq;

- arm_read_sysreg(CNTFRQ, freq);
+ arm_read_sysreg(CNTFRQ_EL0, freq);
return freq;
}

@@ -27,7 +27,7 @@ u64 timer_get_ticks(void)
{
u64 pct64;

- arm_read_sysreg(CNTPCT, pct64);
+ arm_read_sysreg(CNTPCT_EL0, pct64);
return pct64;
}

--
2.8.0.rc3

[antonios...@huawei.com]

From: Antonios Motakis <antonios...@huawei.com>

On AArch64 we won't need to initialize an IRQ stack; just move
the functionality to a header, so we may reuse the gic library.

Signed-off-by: Antonios Motakis <antonios...@huawei.com>
---

inmates/lib/arm/gic.c | 5 +----
inmates/lib/arm/include/gic.h | 9 +++++++++
2 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/inmates/lib/arm/gic.c b/inmates/lib/arm/gic.c
index 0ab8198..79d208c 100644
--- a/inmates/lib/arm/gic.c
+++ b/inmates/lib/arm/gic.c
@@ -14,7 +14,6 @@
#include <gic.h>

static irq_handler_t irq_handler = (irq_handler_t)NULL;
-static __attribute__((aligned(0x1000))) u32 irq_stack[1024];

/* Replaces the weak reference in header.S */
void vector_irq(void)
@@ -37,9 +36,7 @@ void gic_setup(irq_handler_t handler)
gic_init();
irq_handler = handler;

- asm volatile (".arch_extension virt\n");
- asm volatile ("msr SP_irq, %0\n" : : "r" (irq_stack));
- asm volatile ("cpsie i\n");
+ gic_setup_irq_stack();
}

void gic_enable_irq(unsigned int irq)
diff --git a/inmates/lib/arm/include/gic.h b/inmates/lib/arm/include/gic.h
index 6a28e7d..55c09ea 100644
--- a/inmates/lib/arm/include/gic.h
+++ b/inmates/lib/arm/include/gic.h
@@ -20,6 +20,15 @@

#ifndef __ASSEMBLY__

+static inline void gic_setup_irq_stack(void)
+{
+ static __attribute__((aligned(0x1000))) u32 irq_stack[1024];
+
+ asm volatile (".arch_extension virt\n");
+ asm volatile ("msr SP_irq, %0\n" : : "r" (irq_stack));
+ asm volatile ("cpsie i\n");
+}
+
int gic_init(void);
void gic_enable(unsigned int irqn);
void gic_write_eoi(u32 irqn);
--
2.8.0.rc3

[antonios...@huawei.com]

From: Antonios Motakis <antonios...@huawei.com>

Add a cell configuration file for the foundation-v8 model, to
be used with the PL011 UART inmate demo.

Signed-off-by: Antonios Motakis <antonios...@huawei.com>
---

configs/foundation-v8-uart-demo.c | 55 +++++++++++++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
create mode 100644 configs/foundation-v8-uart-demo.c

diff --git a/configs/foundation-v8-uart-demo.c b/configs/foundation-v8-uart-demo.c
new file mode 100644
index 0000000..7fde1aa
--- /dev/null
+++ b/configs/foundation-v8-uart-demo.c
@@ -0,0 +1,55 @@

+/*
+ * Jailhouse AArch64 support
+ *
+ * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH
+ *
+ * Authors:
+ * Antonios Motakis <antonios...@huawei.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+

+#include <linux/types.h>
+#include <jailhouse/cell-config.h>
+
+#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0])
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[2];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .name = "pl011-demo",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = 0,
+ .pio_bitmap_size = 0,
+ .num_pci_devices = 0,
+ },
+
+ .cpus = {
+ 0x4,
+ },
+
+ .mem_regions = {
+ /* UART 2 */ {
+ .phys_start = 0x1c0b0000,
+ .virt_start = 0x1c090000,
+ .size = 0x10000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* RAM */ {
+ .phys_start = 0xfbff0000,
+ .virt_start = 0,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ }
+};
--
2.8.0.rc3

[antonios...@huawei.com]

From: Antonios Motakis <antonios...@huawei.com>

Add a cell configuration file for the gic inmate demo, for the
foundation-v8 model.

Signed-off-by: Antonios Motakis <antonios...@huawei.com>
---

configs/foundation-v8-gic-demo.c | 55 ++++++++++++++++++++++++++++++++++++++++

1 file changed, 55 insertions(+)

create mode 100644 configs/foundation-v8-gic-demo.c

diff --git a/configs/foundation-v8-gic-demo.c b/configs/foundation-v8-gic-demo.c
new file mode 100644
index 0000000..cac296a
--- /dev/null
+++ b/configs/foundation-v8-gic-demo.c

@@ -0,0 +1,55 @@
+/*

+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Copyright (c) ARM Limited, 2014

+ *
+ * Authors:

+ * Jean-Philippe Brucker <jean-phili...@arm.com>

+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <linux/types.h>
+#include <jailhouse/cell-config.h>
+
+#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0])
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[2];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,

+ .name = "gic-demo",

+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = 0,
+ .pio_bitmap_size = 0,
+ .num_pci_devices = 0,
+ },
+
+ .cpus = {

+ 0x2,

+ },
+
+ .mem_regions = {

+ /* UART 1 */ {
+ .phys_start = 0x1c0a0000,

+ .virt_start = 0x1c090000,
+ .size = 0x10000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* RAM */ {

+ .phys_start = 0xfbfe0000,

+ .virt_start = 0,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },

+ },
+};
--
2.8.0.rc3

[antonios...@huawei.com]

From: Antonios Motakis <antonios...@huawei.com>

Add a cell configuration file to use on the AMD Seattle, to be
used with the gic demo inmate.

Signed-off-by: Antonios Motakis <antonios...@huawei.com>
---

configs/amd-seattle-gic-demo.c | 55 ++++++++++++++++++++++++++++++++++++++++++

1 file changed, 55 insertions(+)

create mode 100644 configs/amd-seattle-gic-demo.c

diff --git a/configs/amd-seattle-gic-demo.c b/configs/amd-seattle-gic-demo.c
new file mode 100644
index 0000000..c418e94
--- /dev/null
+++ b/configs/amd-seattle-gic-demo.c

@@ -0,0 +1,55 @@
+/*

+ * Jailhouse AArch64 support
+ *

+ * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH

+ *
+ * Authors:

+ * Antonios Motakis <antonios...@huawei.com>

+ 0x10,

+ },
+
+ .mem_regions = {

+ /* UART */ {
+ .phys_start = 0xe1010000,
+ .virt_start = 0xe1010000,

+ .size = 0x10000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |

+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,

+ },
+ /* RAM */ {

+ .phys_start = 0x82fbfe0000,

+ .virt_start = 0,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ }

+};
--
2.8.0.rc3

[antonios...@huawei.com]

From: Dmitry Voytik <dmitry...@huawei.com>

Add the cell configuration files, and some helper scripts and device
tree for the foundation-v8 model. These can be used to load a linux
inmate on a cell on that target.

Signed-off-by: Dmitry Voytik <dmitry...@huawei.com>
Signed-off-by: Antonios Motakis <antonios...@huawei.com>
[antonios...@huawei.com: split off as a separate patch,
some minor renaming for consistency]
---
configs/foundation-v8-linux-demo.c | 72 ++++++++++++++++++++++
samples/kernel-inmate-foundation-v8.dts | 103 ++++++++++++++++++++++++++++++++
2 files changed, 175 insertions(+)
create mode 100644 configs/foundation-v8-linux-demo.c
create mode 100644 samples/kernel-inmate-foundation-v8.dts

diff --git a/configs/foundation-v8-linux-demo.c b/configs/foundation-v8-linux-demo.c
new file mode 100644
index 0000000..33c44ab
--- /dev/null
+++ b/configs/foundation-v8-linux-demo.c
@@ -0,0 +1,72 @@

+/*
+ * Jailhouse AArch64 support
+ *
+ * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH
+ *
+ * Authors:

+ * Dmitry Voytik <dmitry...@huawei.com>

+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <linux/types.h>
+#include <jailhouse/cell-config.h>
+
+#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0])
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[2];

+ struct jailhouse_irqchip irqchips[1];

+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,

+ .name = "linux-inmate-demo",

+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),

+ .num_irqchips = 1,

+ .pio_bitmap_size = 0,
+ .num_pci_devices = 0,
+ },
+
+ .cpus = {

+ 0xc, /* 2nd and 3rd CPUs */
+ },
+
+ /* Physical memory map:
+ * 0x0_0000_0000 - 0x0_7fff_ffff (2048 MiB) Devices
+ * 0x0_8000_0000 - 0x0_bbdf_ffff ( 958 MiB) Ram, root cell Kernel
+ * 0x0_bbe0_0000 - 0x0_fbff_ffff (1026 MiB) Ram, nothing
+ * 0x0_fc00_0000 - 0x1_0000_0000 ( 64 MiB) Ram, hypervisor
+ * ... ( 30 GiB)
+ * 0x8_8000_0000 - 0x9_0000_0000 (2048 MiB) Ram, nonroot cells
+ */
+ .mem_regions = {
+ /* uart3 */ {
+ .phys_start = 0x1c0c0000,
+ .virt_start = 0x1c090000, /* inmate lib uses */
+ .size = 0x1000,

+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |

+ JAILHOUSE_MEM_IO,
+ },
+ /* RAM load */ {
+ .phys_start = 0x880000000,
+ .virt_start = 0x0,
+ .size = 0x10000000, /* 256 MiB */

+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },

+ },
+
+ .irqchips = {
+ /* GIC */ {
+ /* address should be the same as in root cell */
+ .address = 0x2c001000,
+ .pin_bitmap = (1 << 8), /* uart3 */
+ },
+ }
+};
diff --git a/samples/kernel-inmate-foundation-v8.dts b/samples/kernel-inmate-foundation-v8.dts
new file mode 100644
index 0000000..ed18763
--- /dev/null
+++ b/samples/kernel-inmate-foundation-v8.dts
@@ -0,0 +1,103 @@

+/*
+ * Jailhouse AArch64 support
+ *
+ * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH
+ *
+ * Authors:

+ * Dmitry Voytik <dmitry...@huawei.com>

+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ *

+ * ARMv8 Foundation model DTS
+ *
+ */
+
+/dts-v1/;
+
+/* 64 KiB */
+/memreserve/ 0x0 0x00010000;
+
+/ {
+ model = "Jailhouse-Foundation-v8A";
+ compatible = "arm,foundation-aarch64", "arm,vexpress";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ bootargs = "earlycon";
+ };
+
+ aliases {
+ serial0 = &serial0;
+ };
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x2>;
+ enable-method = "psci";
+ next-level-cache = <&L2_0>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x3>;
+ enable-method = "psci";
+ next-level-cache = <&L2_0>;
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x10000000>; /* 256 MiB starts at 0x0 */
+ };
+
+ gic: interrupt-controller@2c001000 {
+ compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x0 0x2c001000 0 0x1000>,
+ <0x0 0x2c002000 0 0x1000>;
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <1 13 0xf08>,
+ <1 14 0xf08>,
+ <1 11 0xf08>;
+ clock-frequency = <100000000>;
+ };
+
+ v2m_clk24mhz: clk24mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ clock-output-names = "v2m:clk24mhz";
+ };
+
+ serial0: uart@1c090000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x0 0x1c090000 0x0 0x1000>;
+ interrupts = <0 8 1>;
+ clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
+ clock-names = "uartclk", "apb_pclk";
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+};
--
2.8.0.rc3

[antonios...@huawei.com]

From: Dmitry Voytik <dmitry...@huawei.com>

This patch implements a loader, that can be used to boot a Linux
kernel in a Jailhouse cell on AArch64.

Signed-off-by: Dmitry Voytik <dmitry...@huawei.com>
Signed-off-by: Antonios Motakis <antonios...@huawei.com>
[antonios...@huawei.com:

- split foundation-v8 configuration to a separate patch
- small fixes in the linux loader output
- take kernel and dtb address using cell load command line ]
---
inmates/tools/arm64/Makefile | 19 +++++++++++
inmates/tools/arm64/linux-loader.c | 66 ++++++++++++++++++++++++++++++++++++++
2 files changed, 85 insertions(+)
create mode 100644 inmates/tools/arm64/linux-loader.c

diff --git a/inmates/tools/arm64/Makefile b/inmates/tools/arm64/Makefile
index e69de29..4a72277 100644
--- a/inmates/tools/arm64/Makefile
+++ b/inmates/tools/arm64/Makefile
@@ -0,0 +1,19 @@

+#
+# Jailhouse, a Linux-based partitioning hypervisor
+#

+# Copyright (c) Siemens AG, 2013-2015

+#
+# Authors:
+# Jan Kiszka <jan.k...@siemens.com>
+#

+# This work is licensed under the terms of the GNU GPL, version 2. See
+# the COPYING file in the top-level directory.
+#
+
+include $(INMATES_LIB)/Makefile.lib
+

+INMATES := linux-loader.bin
+
+linux-loader-y := linux-loader.o
+
+$(eval $(call DECLARE_TARGETS,$(INMATES)))
diff --git a/inmates/tools/arm64/linux-loader.c b/inmates/tools/arm64/linux-loader.c
new file mode 100644
index 0000000..e8a6cac
--- /dev/null
+++ b/inmates/tools/arm64/linux-loader.c
@@ -0,0 +1,66 @@

+/*
+ * Jailhouse AArch64 support
+ *
+ * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH
+ *
+ * Authors:
+ * Dmitry Voytik <dmitry...@huawei.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+

+#include <inmate.h>
+
+/* Example memory map:
+ * 0x00000000 - 0x00003fff (16K) this binary
+ * 0x00280000 Image
+ * 0x0fe00000 dtb
+ */
+
+#define CMDLINE_BUFFER_SIZE 256
+CMDLINE_BUFFER(CMDLINE_BUFFER_SIZE);
+
+struct arm64_linux_header {
+ u32 code0; /* Executable code */
+ u32 code1; /* Executable code */
+ u64 text_offset; /* Image load offset, little endian */
+ u64 image_size; /* Effective Image size, little endian */
+ u64 flags; /* kernel flags, little endian */
+ u64 res2; /* = 0, reserved */
+ u64 res3; /* = 0, reserved */
+ u64 res4; /* = 0, reserved */
+ u32 magic; /* 0x644d5241 Magic number, little endian,
+ "ARM\x64" */
+ u32 res5; /* reserved (used for PE COFF offset) */
+};
+
+void inmate_main(void)
+{
+ struct arm64_linux_header *kernel;
+ unsigned long dtb;
+ void (*entry)(unsigned long);
+
+ printk("\nJailhouse ARM64 Linux bootloader\n");
+
+ kernel = (void *) cmdline_parse_int("kernel", 0);
+ dtb = cmdline_parse_int("dtb", 0);
+
+ if (!kernel || !dtb) {
+ printk("ERROR: command line parameters kernel and dtb"
+ " are required\n");
+ while(1);
+ }
+
+ entry = (void*)(unsigned long) kernel;
+
+ printk("DTB: 0x%016lx\n", dtb);
+ printk("Image: 0x%016lx\n", kernel);
+ printk("Image size: %lu Bytes\n", kernel->image_size);
+ printk("entry: 0x%016lx\n", entry);
+ if (kernel->magic != 0x644d5241)
+ printk("WARNING: wrong Linux Image header magic: 0x%08x\n",
+ kernel->magic);
+
+ entry(dtb);
+}
--
2.8.0.rc3

[antonios...@huawei.com]

From: Antonios Motakis <antonios...@huawei.com>

Add the cell configuration files, and some helper scripts and device

tree for the AMD Seattle development board. These can be used to

load a linux inmate on a cell on that target.

Signed-off-by: Antonios Motakis <antonios...@huawei.com>
---
configs/amd-seattle-linux-demo.c | 91 +++++++++++++++++++++
samples/kernel-inmate-amd-seattle.dts | 149 ++++++++++++++++++++++++++++++++++
2 files changed, 240 insertions(+)
create mode 100644 configs/amd-seattle-linux-demo.c
create mode 100644 samples/kernel-inmate-amd-seattle.dts

diff --git a/configs/amd-seattle-linux-demo.c b/configs/amd-seattle-linux-demo.c
new file mode 100644
index 0000000..ba618b5
--- /dev/null
+++ b/configs/amd-seattle-linux-demo.c
@@ -0,0 +1,91 @@

+/*
+ * Jailhouse AArch64 support
+ *
+ * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH
+ *
+ * Authors:

+ * Antonios Motakis <antonios...@huawei.com>

+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+

+#include <linux/types.h>
+#include <jailhouse/cell-config.h>
+
+#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0])
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];

+ struct jailhouse_memory mem_regions[6];

+ struct jailhouse_irqchip irqchips[1];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .name = "linux-inmate-demo",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = 1,
+ .pio_bitmap_size = 0,
+ .num_pci_devices = 0,
+ },
+
+ .cpus = {

+ 0xc0,
+ },
+
+ .mem_regions = {

+ /* UART */ {
+ .phys_start = 0xe1010000,
+ .virt_start = 0xe1010000,
+ .size = 0x10000,

+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |

+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
+ },

+ /* xgmac */ {
+ .phys_start = 0xe0900000,
+ .virt_start = 0xe0900000,
+ .size = 0x100000,

+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },

+ /* phy */ {
+ .phys_start = 0xe1240000,
+ .virt_start = 0xe1240000,

+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },

+ /* phy */ {
+ .phys_start = 0xe1250000,
+ .virt_start = 0xe1250000,

+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },

+ /* RAM */ {
+ .phys_start = 0x82d0000000,

+ .virt_start = 0x0,
+ .size = 0x10000000, /* 256 MiB */
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },

+ /* RAM */ {
+ .phys_start = 0x82e0000000,
+ .virt_start = 0x82e0000000,

+ .size = 0x10000000, /* 256 MiB */
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ },
+
+ .irqchips = {
+ /* GIC */ {

+ .address = 0x2c001000,
+ .pin_bitmap = 0, /* forward uart irq with a hack for now */
+ },
+ }
+};
diff --git a/samples/kernel-inmate-amd-seattle.dts b/samples/kernel-inmate-amd-seattle.dts
new file mode 100644
index 0000000..fae73e7
--- /dev/null
+++ b/samples/kernel-inmate-amd-seattle.dts
@@ -0,0 +1,149 @@

+/*
+ * Jailhouse AArch64 support
+ *
+ * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH
+ *
+ * Authors:

+ * Antonios Motakis <antonios...@huawei.com>

+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.

+ *
+ */
+
+/dts-v1/;
+

+/ {
+ model = "Jailhouse cell on AMD Seattle";
+ compatible = "amd,seattle-overdrive", "amd,seattle";

+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ bootargs = "earlycon";
+ };
+

+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+

+ cpu@300 {

+ device_type = "cpu";
+ compatible = "arm,armv8";

+ reg = <0x0 0x300>;

+ enable-method = "psci";
+ next-level-cache = <&L2_0>;
+ };
+

+ cpu@301 {

+ device_type = "cpu";
+ compatible = "arm,armv8";

+ reg = <0x0 0x301>;

+ enable-method = "psci";
+ next-level-cache = <&L2_0>;
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+

+ aliases {
+ serial0 = &serial0;
+ };
+

+ memory@82e0000000 {
+ device_type = "memory";
+ reg = <0x82 0xe0000000 0x0 0x10000000>; /* 256 MiB */
+ };
+
+ gic: interrupt-controller@e1110000 {
+ compatible = "arm,gic-400", "arm,cortex-a15-gic";

+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;

+ reg = <0x0 0xe1110000 0 0x1000>,
+ <0x0 0xe112f000 0 0x2000>;

+ };
+
+ timer {
+ compatible = "arm,armv8-timer";

+ interrupts = <1 13 0xff04>,
+ <1 14 0xff04>,
+ <1 11 0xff04>;
+ };
+
+ uartspiclk_100mhz: clk100mhz_1 {

+ compatible = "fixed-clock";
+ #clock-cells = <0>;

+ clock-frequency = <100000000>;
+ clock-output-names = "uartspiclk_100mhz";
+ };
+
+ serial0: uart@e1010000 {

+ compatible = "arm,pl011", "arm,primecell";

+ reg = <0x0 0xe1010000 0x0 0x1000>;
+ interrupts = <0 328 4>;
+ clocks = <&uartspiclk_100mhz>, <&uartspiclk_100mhz>;

+ clock-names = "uartclk", "apb_pclk";
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+

+ smb0: smb {
+ compatible = "simple-bus";

+ #address-cells = <2>;
+ #size-cells = <2>;

+ ranges;
+
+ xgmacclk1_dma_250mhz: clk250mhz_2 {

+ compatible = "fixed-clock";
+ #clock-cells = <0>;

+ clock-frequency = <250000000>;
+ clock-output-names = "xgmacclk1_dma_250mhz";
+ };
+
+ xgmacclk1_ptp_250mhz: clk250mhz_3 {

+ compatible = "fixed-clock";
+ #clock-cells = <0>;

+ clock-frequency = <250000000>;
+ clock-output-names = "xgmacclk1_ptp_250mhz";
+ };
+
+ xgmac1_phy: phy@e1240c00 {
+ compatible = "amd,xgbe-phy-seattle-v1a";
+ reg = <0 0xe1240c00 0 0x00400>, /* SERDES RX/TX1 */
+ <0 0xe1250080 0 0x00060>, /* SERDES IR 1/2 */
+ <0 0xe12500fc 0 0x00004>; /* SERDES IR 2/2 */
+ interrupts = <0 322 4>;
+ amd,speed-set = <0>;
+ amd,serdes-blwc = <1>, <1>, <0>;
+ amd,serdes-cdr-rate = <2>, <2>, <7>;
+ amd,serdes-pq-skew = <10>, <10>, <18>;
+ amd,serdes-tx-amp = <15>, <15>, <10>;
+ amd,serdes-dfe-tap-config = <3>, <3>, <1>;
+ amd,serdes-dfe-tap-enable = <0>, <0>, <127>;
+ };
+
+ xgmac1: xgmac@e0900000 {
+ compatible = "amd,xgbe-seattle-v1a";
+ reg = <0 0xe0900000 0 0x80000>,
+ <0 0xe0980000 0 0x80000>;
+ interrupts = <0 324 4>,
+ <0 341 1>, <0 342 1>, <0 343 1>, <0 344 1>;
+ amd,per-channel-interrupt;
+ mac-address = [ 02 B1 B2 B3 B4 B5 ];
+ clocks = <&xgmacclk1_dma_250mhz>, <&xgmacclk1_ptp_250mhz>;
+ clock-names = "dma_clk", "ptp_clk";
+ phy-handle = <&xgmac1_phy>;
+ phy-mode = "xgmii";
+ #stream-id-cells = <24>;
+ dma-coherent;
+ };
+ };
+};
--
2.8.0.rc3

[antonios...@huawei.com]

From: Antonios Motakis <antonios...@huawei.com>

Add a cell configuration file for the AMD Seattle development
board, to be used with the PL011 UART demo inmate.

Signed-off-by: Antonios Motakis <antonios...@huawei.com>
---

configs/amd-seattle-uart-demo.c | 55 +++++++++++++++++++++++++++++++++++++++++

1 file changed, 55 insertions(+)

create mode 100644 configs/amd-seattle-uart-demo.c

diff --git a/configs/amd-seattle-uart-demo.c b/configs/amd-seattle-uart-demo.c
new file mode 100644
index 0000000..6ef7644
--- /dev/null
+++ b/configs/amd-seattle-uart-demo.c
@@ -0,0 +1,55 @@

+/*
+ * Jailhouse AArch64 support
+ *
+ * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH
+ *
+ * Authors:
+ * Antonios Motakis <antonios...@huawei.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <linux/types.h>
+#include <jailhouse/cell-config.h>
+
+#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0])
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];

+ struct jailhouse_memory mem_regions[2];

+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,

+ .name = "pl011-demo",

+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),

+ .num_irqchips = 0,

+ .pio_bitmap_size = 0,
+ .num_pci_devices = 0,
+ },
+
+ .cpus = {

+ 0x4,

+ },
+
+ .mem_regions = {

+ /* UART 2 */ {

+ .phys_start = 0xe1010000,
+ .virt_start = 0xe1010000,
+ .size = 0x10000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
+ },

+ /* RAM */ {
+ .phys_start = 0x82fbff0000,

+ .virt_start = 0,
+ .size = 0x00010000,

+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ }

+};
--
2.8.0.rc3

[antonios...@huawei.com]

From: Antonios Motakis <antonios...@huawei.com>

Add a short document describing the use of the Linux loader,
used to run Linux inmates on non-root cells on ARM64.

Signed-off-by: Antonios Motakis <antonios...@huawei.com>
---

Documentation/non-root-linux-arm64.txt | 51 ++++++++++++++++++++++++++++++++++
1 file changed, 51 insertions(+)
create mode 100644 Documentation/non-root-linux-arm64.txt

diff --git a/Documentation/non-root-linux-arm64.txt b/Documentation/non-root-linux-arm64.txt
new file mode 100644
index 0000000..1712c87
--- /dev/null
+++ b/Documentation/non-root-linux-arm64.txt
@@ -0,0 +1,51 @@
+Booting Linux in non-root cells on ARM64
+========================================
+
+Booting a Linux kernel on an ARM target is significantly simpler than on x86,
+so in this case we do not need a specially modified Linux kernel for the
+non-root cell.
+
+What we will need is:
+
+(a) A non-root cell for the Linxu inmate.
+
+Under configs/ there are -linux-demo.c example cell configurations
+for this purpose. This will produce a cell configuration file
+(e.g. amd-seattle-linux-demo.cell).
+
+(b) An ARM64 Linux kernel.
+
+A good idea is to append a RAMdisk to the end of the kernel, to use as the
+root filesystem for the Linux inmate. Special patches are not needed.
+
+(c) A device tree blob.
+
+Sample dts files can be found under samples/, just compile to a dtb using
+the Linxu kernel dtc tool.
+
+(d) linux-loader inmate for Jailhouse ARM64 (provided).
+
+After building, copy the binary from inmates/tools/arm64/linux-loader.bin
+
+Starting the Linux inmate
+-------------------------
+
+Loading a Linux inmate can be as simple as:
+
+ $ LOAD_ADDR=0x82e0080000 # example values for the amd seattle
+ $ DTB_ADDR=0xfe00000
+ $
+ $ jailhouse cell create linux-demo.cell
+ $ jailhouse cell load --name linux-inmate-demo \
+ linux-loader.bin -a 0x0 \
+ Image -a $LOAD_ADDR \
+ kernel-inmate.dtb -a $DTB_ADDR \
+ -s "kernel=$LOAD_ADDR dtb=$DTB_ADDR" -a 0x1000
+
+Make sure LOAD_ADDR and DTB_ADDR are set to the (cell virtual) addresses,
+where you want to load the kernel and device tree. This needs to be available
+memory ranges in the non root cell configuration that is being used.
+
+Finally you can start the cell:
+
+ $ jailhouse cell start linux-inmate-demo
--
2.8.0.rc3

[Jan Kiszka]

How much of this is ARM64-specific, how much could be reused on 32-bit?
I'm also asking because I'd like to address that topic over there soon.

Jan

--
Siemens AG, Corporate Technology, CT RDA ITP SES-DE
Corporate Competence Center Embedded Linux

[Jan Kiszka]

OK, it is very much ARM64 - found the ARM booting description by now.

[Jan Kiszka]

On 2016-06-17 21:13, antonios...@huawei.com wrote:

Ah, this was eating my interrupts! Uncommented, and now it works again.

I was always unbinding the xgmac1 before creating the non-root Linux
cell, plus that interface was down all the time while Jailhouse was
enabled. Therefore no instability here.

Anyway, this is nasty, and we need to address this properly before
merging. In fact, I may have a need for proper SPI assignment on ARM
soon as well. Brings back the proposal I still like most:

> - use multiple irqchip entries per physical chip to add more bitmap
> capacity if needed
>
> The latter could be modelled as
>
> struct jailhouse_irqchip {
> __u64 address;
> __u64 id;
> __u64 pin_base;
> __u64 pin_bitmap[BITMAP_SIZE];
> }
>

Let me play with that...

Jan

[Jan Kiszka]

Done, results in next and a rebased version of your patches in
wip/arm64. Seems to work, but the GIC v3 is still totally untested.
Feedback welcome!

Will send the base patches soon, then look into the ARM64 series in more
details.

[Antonios Motakis]

Looks good! (yeah, I ate your interrupts, sorry :)

Actually, I also unbind the second xgmac from my side. However, I would have nasty stuff happen when first loading a Linux inmate, and then destroying it without disabling Jailhouse. Eventually CPU6 (which was CPU0 for the inmate previously), would lock up. In no other scenario would I see the same lock up.

The most plausible explanation I have, is that the instability was not only due to the IRQ handling, but also because platform devices, such as the NIC here, don't have a standard reset method. This means that the NIC is not in a reset state after destroying the inmate. The combination of a non-reset NIC, with the sub-optimal IRQ handling, probably caused the lock ups.

It will be interesting to see now that the IRQ mapping to the cells has been fixed, whether this scenario is still a problem.

Cheers,
Tony

>
> Jan
>

--
Antonios Motakis
Virtualization Engineer
Huawei Technologies Duesseldorf GmbH
European Research Center
Riesstrasse 25, 80992 München

[Jan Kiszka]

OK, keep me informed. I will try to finish the review based on wip/arm64
soon.

BTW, one background question: How do you work around the missing SMMU
support for the non-root cell when the xgmac does DMA? I see in the cell
config that only half of the memory is 1:1 mapped. Is the lower half
never used as DMA target by Linux?

[Antonios Motakis]

Actually, what happens is we are being super wasteful: only the second region is used by Linux at all (see the provided device tree).

We still need a zero-mapped region for the loader, plus we also put the DTB there. But looking at this again, we definitely don't need as much...

Tony

[Jan Kiszka]

Ah, now it makes sense. Feel free to send patch updates to clean this up.

Thanks,
Jan