[PATCH 2/5] inmates: arm: make inmates compile-time relocatable

[Ralf Ramsauer]

This allows us to load inmates to arbitrary locations. This patch
preserves the current default behaviour.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
inmates/Makefile | 2 +-
inmates/lib/arm/inmate.lds.S | 10 ++++++++--
inmates/lib/arm64/inmate.lds.S | 10 ++++++++--
3 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/inmates/Makefile b/inmates/Makefile
index b5fa016e..507d364f 100644
--- a/inmates/Makefile
+++ b/inmates/Makefile
@@ -23,7 +23,7 @@ ifeq ($(subst arm64,arm,$(SRCARCH)),arm)
INCLUDES += -I$(src)/../hypervisor/arch/arm-common/include
endif

-LINUXINCLUDE :=
+LINUXINCLUDE := -I$(src)/../hypervisor/include
KBUILD_AFLAGS += $(INCLUDES)
KBUILD_CFLAGS := -g -Os -Wall -Wstrict-prototypes -Wtype-limits \
-Wmissing-declarations -Wmissing-prototypes \
diff --git a/inmates/lib/arm/inmate.lds.S b/inmates/lib/arm/inmate.lds.S
index fe132532..21649475 100644
--- a/inmates/lib/arm/inmate.lds.S
+++ b/inmates/lib/arm/inmate.lds.S
@@ -12,11 +12,17 @@
* the COPYING file in the top-level directory.
*/

+#include <jailhouse/config.h>
+
+#ifndef CONFIG_INMATE_BASE
+#define CONFIG_INMATE_BASE 0x0
+#endif
+
SECTIONS {
- . = 0;
+ . = CONFIG_INMATE_BASE;
.boot : { *(.boot) }

- . = 0x100;
+ . = CONFIG_INMATE_BASE + 0x100;
.cmdline : {
*(.cmdline)
BYTE(0); /* empty string in case no buffer is provided */
diff --git a/inmates/lib/arm64/inmate.lds.S b/inmates/lib/arm64/inmate.lds.S
index 01ba5f54..d6fb3285 100644
--- a/inmates/lib/arm64/inmate.lds.S
+++ b/inmates/lib/arm64/inmate.lds.S
@@ -10,11 +10,17 @@
* the COPYING file in the top-level directory.
*/

+#include <jailhouse/config.h>
+
+#ifndef CONFIG_INMATE_BASE
+#define CONFIG_INMATE_BASE 0x0
+#endif
+
SECTIONS {
- . = 0;
+ . = CONFIG_INMATE_BASE;
.boot : { *(.boot) }

- . = 0x1000;
+ . = CONFIG_INMATE_BASE + 0x1000;
.cmdline : {
*(.cmdline)
BYTE(0); /* empty string in case no buffer is provided */
--
2.12.2

[Ralf Ramsauer]

Hi,

this series allows us to load inmates to arbitrary locations.

Therefore, I extended struct cell by an entry point. By default, this entry
will default to zero, and current behaviour does not change.

No x86 support at the moment.

Additionally, this series implements a new config flag CONFIG_BARE_METAL, which
allows for booting inmates directly on ARM, e.g. via u-boot, without jailhouse
and without Linux. This is useful, if we want to compare behaviour of inmates
with pure bare-metal applications.

There is no documentation at the moment. I'm going to add documentation, if
this series is accepted.

Tested on a TK1, TX1, and LeMaker HiKey.

Ralf

Ralf Ramsauer (5):
inmates: arm, arm64: compile arm linker script
inmates: arm: make inmates compile-time relocatable
arm: allow dynamic entry point switch
inmates: arm-common: enable GICD_CTLR
inmates: arm: add empty definition for heartbeat in bare-metal case

.gitignore | 2 ++
hypervisor/arch/arm-common/control.c | 2 +-
hypervisor/include/jailhouse/cell-config.h | 4 +++-
inmates/Makefile | 2 +-
inmates/lib/arm-common/gic-v2.c | 3 +++
inmates/lib/arm/Makefile | 2 +-
inmates/lib/arm/include/arch/inmate.h | 4 ++++
inmates/lib/arm/{inmate.lds => inmate.lds.S} | 10 ++++++++--
inmates/lib/arm64/Makefile | 2 +-
inmates/lib/arm64/include/arch/inmate.h | 4 ++++
inmates/lib/arm64/{inmate.lds => inmate.lds.S} | 10 ++++++++--
tools/jailhouse-cell-linux | 2 +-
tools/jailhouse-hardware-check | 2 +-
13 files changed, 38 insertions(+), 11 deletions(-)
rename inmates/lib/arm/{inmate.lds => inmate.lds.S} (83%)
rename inmates/lib/arm64/{inmate.lds => inmate.lds.S} (80%)

--
2.12.2

[Ralf Ramsauer]

Enables the GIC distributor. This needs to be done if we want to boot
inmate on bare-metal without jailhouse and doesn't hurt regular
jailhouse inmates.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---

inmates/lib/arm-common/gic-v2.c | 3 +++
1 file changed, 3 insertions(+)

diff --git a/inmates/lib/arm-common/gic-v2.c b/inmates/lib/arm-common/gic-v2.c
index 2123c72a..23d5b5f6 100644
--- a/inmates/lib/arm-common/gic-v2.c
+++ b/inmates/lib/arm-common/gic-v2.c
@@ -17,6 +17,8 @@
#define GICC_PMR 0x0004
#define GICC_IAR 0x000c
#define GICC_EOIR 0x0010
+#define GICD_CTLR 0x0000
+#define GICD_CTLR_ENABLE (1 << 0)

#define GICC_CTLR_GRPEN1 (1 << 0)

@@ -32,6 +34,7 @@ int gic_init(void)
{
mmio_write32(GICC_V2_BASE + GICC_CTLR, GICC_CTLR_GRPEN1);
mmio_write32(GICC_V2_BASE + GICC_PMR, GICC_PMR_DEFAULT);
+ mmio_write32(GICD_V2_BASE + GICD_CTLR, GICD_CTLR_ENABLE);

return 0;
}
--
2.12.2

[Ralf Ramsauer]

This patch finally allows us to run inmates on bare metal, without Linux
and without Jailhouse.

This is useful, for comparing inmate behaviour, with and without an
active hypervisor.

From now on, inmates can be loaded from u-boot when defining
CONFIG_INMATE_BASE and CONFIG_BARE_METAL.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---

inmates/lib/arm/include/arch/inmate.h | 4 ++++
inmates/lib/arm64/include/arch/inmate.h | 4 ++++
2 files changed, 8 insertions(+)

diff --git a/inmates/lib/arm/include/arch/inmate.h b/inmates/lib/arm/include/arch/inmate.h
index 02f0a8e3..4916ed65 100644
--- a/inmates/lib/arm/include/arch/inmate.h
+++ b/inmates/lib/arm/include/arch/inmate.h
@@ -14,6 +14,9 @@
* To ease the debugging, we can send a spurious hypercall, which should return
* -ENOSYS, but appear in the hypervisor stats for this cell.
*/
+#ifdef CONFIG_BARE_METAL
+#define heartbeat()
+#else
static inline void heartbeat(void)
{
asm volatile (
@@ -22,5 +25,6 @@ static inline void heartbeat(void)
"hvc #0\n"
: : "r" (0xbea7) : "r0");
}
+#endif

void __attribute__((interrupt("IRQ"), used)) vector_irq(void);
diff --git a/inmates/lib/arm64/include/arch/inmate.h b/inmates/lib/arm64/include/arch/inmate.h
index cd9275dd..dd9d6d9d 100644
--- a/inmates/lib/arm64/include/arch/inmate.h
+++ b/inmates/lib/arm64/include/arch/inmate.h
@@ -14,6 +14,9 @@
* To ease the debugging, we can send a spurious hypercall, which should return
* -ENOSYS, but appear in the hypervisor stats for this cell.
*/
+#ifdef CONFIG_BARE_METAL
+#define heartbeat()
+#else
static inline void heartbeat(void)
{
asm volatile (
@@ -21,5 +24,6 @@ static inline void heartbeat(void)
"hvc #0\n"
: : "r" (0xbea7) : "x0");
}
+#endif

void __attribute__((used)) vector_irq(void);
--
2.12.2

[Ralf Ramsauer]

Required, if we want to make code compile-time relocatable. No
functional change.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---

.gitignore | 2 ++
inmates/lib/arm/Makefile | 2 +-
inmates/lib/arm/{inmate.lds => inmate.lds.S} | 0
inmates/lib/arm64/Makefile | 2 +-
inmates/lib/arm64/{inmate.lds => inmate.lds.S} | 0
5 files changed, 4 insertions(+), 2 deletions(-)
rename inmates/lib/arm/{inmate.lds => inmate.lds.S} (100%)
rename inmates/lib/arm64/{inmate.lds => inmate.lds.S} (100%)

diff --git a/.gitignore b/.gitignore
index 727eee34..b4ebeda7 100644
--- a/.gitignore
+++ b/.gitignore
@@ -14,6 +14,8 @@ modules.order
driver/jailhouse.ko
hypervisor/include/jailhouse/config.h
hypervisor/hypervisor.lds
+inmates/lib/arm/inmate.lds
+inmates/lib/arm64/inmate.lds
tools/jailhouse
tools/jailhouse-gcov-extract
tools/jailhouse-config-collect
diff --git a/inmates/lib/arm/Makefile b/inmates/lib/arm/Makefile
index f126bce1..7326c328 100644
--- a/inmates/lib/arm/Makefile
+++ b/inmates/lib/arm/Makefile
@@ -13,7 +13,7 @@
include $(INMATES_LIB)/Makefile.lib
include $(INMATES_LIB)/../arm-common/Makefile.lib

-always := lib.a
+always := lib.a inmate.lds

ccflags-y := -ffunction-sections

diff --git a/inmates/lib/arm/inmate.lds b/inmates/lib/arm/inmate.lds.S
similarity index 100%
rename from inmates/lib/arm/inmate.lds
rename to inmates/lib/arm/inmate.lds.S
diff --git a/inmates/lib/arm64/Makefile b/inmates/lib/arm64/Makefile
index 465c274b..554c0d1f 100644
--- a/inmates/lib/arm64/Makefile
+++ b/inmates/lib/arm64/Makefile
@@ -13,7 +13,7 @@
include $(INMATES_LIB)/Makefile.lib
include $(INMATES_LIB)/../arm-common/Makefile.lib

-always := lib.a
+always := lib.a inmate.lds

lib-y := $(COMMON_OBJECTS)
lib-y += header.o
diff --git a/inmates/lib/arm64/inmate.lds b/inmates/lib/arm64/inmate.lds.S
similarity index 100%
rename from inmates/lib/arm64/inmate.lds
rename to inmates/lib/arm64/inmate.lds.S
--
2.12.2

[Ralf Ramsauer]

to avoid ```'s.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---

Documentation/hypervisor-configuration.md | 122 ++++++++++++++----------------
1 file changed, 57 insertions(+), 65 deletions(-)

diff --git a/Documentation/hypervisor-configuration.md b/Documentation/hypervisor-configuration.md
index 1394fc78..4b48ae64 100644
--- a/Documentation/hypervisor-configuration.md
+++ b/Documentation/hypervisor-configuration.md
@@ -12,76 +12,68 @@ Available configuration options
-------------------------------

General configuration parameters
-```
-/* Print error sources with filename and line number to debug console */
-#define CONFIG_TRACE_ERROR 1
-/*
- * Set instruction pointer to 0 if cell CPU has caused an access violation.
- * Linux inmates will dump a stack trace in this case.
- */
-#define CONFIG_CRASH_CELL_ON_PANIC 1
-/* Enable code coverage data collection (see Documentation/gcov.txt) */
-#define CONFIG_JAILHOUSE_GCOV 1
-```
+
+ /* Print error sources with filename and line number to debug console */
+ #define CONFIG_TRACE_ERROR 1
+
+ /*
+ * Set instruction pointer to 0 if cell CPU has caused an access violation.
+ * Linux inmates will dump a stack trace in this case.
+ */
+ #define CONFIG_CRASH_CELL_ON_PANIC 1
+
+ /* Enable code coverage data collection (see Documentation/gcov.txt) */
+ #define CONFIG_JAILHOUSE_GCOV 1

### Example board specific configurations

#### ARM

-```
-/* BananaPi M1 */
-#define CONFIG_MACH_BANANAPI 1
-#define CONFIG_ARM_GIC_V2 1
-```
-
-```
-/* Nvidia Jetson TK1 */
-#define CONFIG_MACH_JETSON_TK1 1
-#define CONFIG_ARM_GIC_V2 1
-```
-
-```
-/* Xunlong Orange Pi Zero, 256 MiB */
-#define CONFIG_MACH_ORANGEPI0 1
-#define CONFIG_ARM_GIC_V2 1
-```
-
-```
-/* ARM Fast Model */
-#define CONFIG_MACH_VEXPRESS 1
-/* Fast Model supports both, GICv2 and GICv3 */
-#define CONFIG_ARM_GIC_V2 1
-/* #define CONFIG_ARM_GIC_V3 */
-```
+##### BananaPi M1
+
+ #define CONFIG_MACH_BANANAPI 1
+ #define CONFIG_ARM_GIC_V2 1
+
+##### Nvidia Jetson TK1
+
+ #define CONFIG_MACH_JETSON_TK1 1
+ #define CONFIG_ARM_GIC_V2 1
+
+##### Xunlong Orange Pi Zero, 256 MiB
+
+ #define CONFIG_MACH_ORANGEPI0 1
+ #define CONFIG_ARM_GIC_V2 1
+
+##### ARM Fast Model
+
+ #define CONFIG_MACH_VEXPRESS 1
+ /* Fast Model supports both, GICv2 and GICv3 */
+ #define CONFIG_ARM_GIC_V2 1
+ /* #define CONFIG_ARM_GIC_V3 */

#### ARM64

-```
-/* Nvidia Jetson TK1 */
-#define CONFIG_MACH_JETSON_TX1 1
-#define CONFIG_ARM_GIC_V2 1
-```
-
-```
-/* Xilinx Zynq UltraScale+ MPSoC ZCU102 */
-#define CONFIG_MACH_ZYNQMP_ZCU102 1
-#define CONFIG_ARM_GIC_V2 1
-```
-
-```
-/* HiKey LeMaker 2 GiB */
-#define CONFIG_MACH_HIKEY 1
-#define CONFIG_ARM_GIC_V2 1
-```
-
-```
-/* ARMv8 Foundation Model */
-#define CONFIG_MACH_FOUNDATION_V8 1
-#define CONFIG_ARM_GIC_V2 1
-```
-
-```
-/* AMD ARM-Opteron A1100 */
-#define CONFIG_MACH_AMD_SEATTLE 1
-#define CONFIG_ARM_GIC_V2 1
-```
+##### Nvidia Jetson TK1
+
+ #define CONFIG_MACH_JETSON_TX1 1
+ #define CONFIG_ARM_GIC_V2 1
+
+##### Xilinx Zynq UltraScale+ MPSoC ZCU102
+
+ #define CONFIG_MACH_ZYNQMP_ZCU102 1
+ #define CONFIG_ARM_GIC_V2 1
+
+##### HiKey LeMaker 2 GiB
+
+ #define CONFIG_MACH_HIKEY 1
+ #define CONFIG_ARM_GIC_V2 1
+
+##### ARMv8 Foundation Model
+
+ #define CONFIG_MACH_FOUNDATION_V8 1
+ #define CONFIG_ARM_GIC_V2 1
+
+##### AMD ARM-Opteron A1100
+
+ #define CONFIG_MACH_AMD_SEATTLE 1
+ #define CONFIG_ARM_GIC_V2 1
--
2.12.2

[Ralf Ramsauer]

This allows us to load inmates to arbitrary locations. This patch
preserves the current default behaviour.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---

[Ralf Ramsauer]

From now on, the entry point of a cell is no longer fixed to 0x0 on ARM.

Default behaviour does not change, as non-defined entry settings in cell
configs default to zero.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---

hypervisor/arch/arm-common/control.c | 6 +++---
hypervisor/include/jailhouse/cell-config.h | 4 +++-
tools/jailhouse-cell-linux | 4 ++--
tools/jailhouse-hardware-check | 2 +-
4 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/hypervisor/arch/arm-common/control.c b/hypervisor/arch/arm-common/control.c
index 55d202a0..c5476b2d 100644
--- a/hypervisor/arch/arm-common/control.c
+++ b/hypervisor/arch/arm-common/control.c
@@ -197,10 +197,10 @@ void arch_cell_reset(struct cell *cell)
unsigned int cpu;

/*
- * All CPUs but the first are initially suspended.
- * The first CPU starts at address 0.
+ * All CPUs but the first are initially suspended. The first CPU
+ * starts at cpu_reset_address, defined in the cell configuration.
*/
- per_cpu(first)->cpu_on_entry = 0;
+ per_cpu(first)->cpu_on_entry = cell->config->cpu_reset_address;
for_each_cpu_except(cpu, cell->cpu_set, first)
per_cpu(cpu)->cpu_on_entry = PSCI_INVALID_ADDRESS;

diff --git a/hypervisor/include/jailhouse/cell-config.h b/hypervisor/include/jailhouse/cell-config.h
index 62c8b4c7..3a003f02 100644
--- a/hypervisor/include/jailhouse/cell-config.h
+++ b/hypervisor/include/jailhouse/cell-config.h
@@ -40,7 +40,7 @@
#define _JAILHOUSE_CELL_CONFIG_H

/* Incremented on any layout or semantic change of system or cell config. */
-#define JAILHOUSE_CONFIG_REVISION 4
+#define JAILHOUSE_CONFIG_REVISION 5

#define JAILHOUSE_CELL_NAME_MAXLEN 31

@@ -72,6 +72,8 @@ struct jailhouse_cell_desc {
__u32 num_pci_caps;

__u32 vpci_irq_base;
+
+ __u64 cpu_reset_address;
} __attribute__((packed));

#define JAILHOUSE_MEM_READ 0x0001
diff --git a/tools/jailhouse-cell-linux b/tools/jailhouse-cell-linux
index dea6c3ef..bd6092fd 100755
--- a/tools/jailhouse-cell-linux
+++ b/tools/jailhouse-cell-linux
@@ -511,8 +511,8 @@ class MemoryRegion:


class Config:
- _HEADER_FORMAT = '6sH32s4xIIIIIIIII'
- _HEADER_REVISION = 4
+ _HEADER_FORMAT = '6sH32s4xIIIIIIIIIQ'
+ _HEADER_REVISION = 5

def __init__(self, config_file):
self.data = config_file.read()
diff --git a/tools/jailhouse-hardware-check b/tools/jailhouse-hardware-check
index fb820120..413b90d1 100755
--- a/tools/jailhouse-hardware-check
+++ b/tools/jailhouse-hardware-check
@@ -113,7 +113,7 @@ class Sysconfig:
X86_MAX_IOMMU_UNITS = 8
X86_IOMMU_SIZE = 20

- HEADER_REVISION = 4
+ HEADER_REVISION = 5
HEADER_FORMAT = '6sH'

def __init__(self, path):
--
2.12.2

[Ralf Ramsauer]

Enables the GIC distributor. This needs to be done if we want to boot
inmate on bare-metal without jailhouse and doesn't hurt regular
jailhouse inmates.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---

[Ralf Ramsauer]

Hi,

this series allows us to load inmates to arbitrary locations.

Therefore, I extended struct cell by an entry point. By default, this entry
will default to zero, and current behaviour does not change.

No x86 support at the moment.

Additionally, this series implements a new config flag CONFIG_BARE_METAL, which
allows for booting inmates directly on ARM, e.g. via u-boot, without jailhouse
and without Linux. This is useful, if we want to compare behaviour of inmates
with pure bare-metal applications.

There is no documentation at the moment. I'm going to add documentation, if
this series is accepted.

Tested on a TK1, TX1, and LeMaker HiKey.

Ralf

since V1:
- Fixup for documentation
- Add documentation
- Exemplarily adjust Jetson TK1 config to demonstrate the usage

Ralf Ramsauer (8):

inmates: arm, arm64: compile arm linker script
inmates: arm: make inmates compile-time relocatable
arm: allow dynamic entry point switch
inmates: arm-common: enable GICD_CTLR
inmates: arm: add empty definition for heartbeat in bare-metal case

Documentation: Reformat hypervisor configuration
Documentation: document relocatable and bare-metal inmates
configs: exemplarily add CONFIG_INMATE_BASE to TK1 demo inmate

.gitignore | 2 +
Documentation/hypervisor-configuration.md | 139 +++++++++++++------------
configs/jetson-tk1-demo.c | 8 +-
hypervisor/arch/arm-common/control.c | 6 +-
hypervisor/include/jailhouse/cell-config.h | 4 +-

inmates/Makefile | 2 +-
inmates/lib/arm-common/gic-v2.c | 3 +

inmates/lib/arm/Makefile | 2 +-
inmates/lib/arm/include/arch/inmate.h | 4 +

inmates/lib/arm/{inmate.lds => inmate.lds.S} | 10 +-

inmates/lib/arm64/Makefile | 2 +-
inmates/lib/arm64/include/arch/inmate.h | 4 +

inmates/lib/arm64/{inmate.lds => inmate.lds.S} | 10 +-
tools/jailhouse-cell-linux | 4 +-
tools/jailhouse-hardware-check | 2 +-
15 files changed, 122 insertions(+), 80 deletions(-)
rename inmates/lib/arm/{inmate.lds => inmate.lds.S} (83%)
rename inmates/lib/arm64/{inmate.lds => inmate.lds.S} (80%)

--
2.12.2

[Ralf Ramsauer]

This illustrates how CONFIG_INMATE_BASE can be used for inmates.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---

Documentation/hypervisor-configuration.md | 3 +++
configs/jetson-tk1-demo.c | 8 +++++++-
2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/Documentation/hypervisor-configuration.md b/Documentation/hypervisor-configuration.md
index 6e5095f0..fcd81052 100644
--- a/Documentation/hypervisor-configuration.md
+++ b/Documentation/hypervisor-configuration.md
@@ -36,6 +36,9 @@ General configuration parameters
* Strip Jailhouse specific parts from inmates (e.g., heartbeat()). This
* allows inmates to be booted on bare-metal, without Jailhouse and is
* mainly used for testing purposes.
+ *
+ * See configs/jetson-tk1-demo.c for the usage of this parameter in cell
+ * configurations.
*/
#define CONFIG_BARE_METAL 1

diff --git a/configs/jetson-tk1-demo.c b/configs/jetson-tk1-demo.c
index 8310721d..84555501 100644
--- a/configs/jetson-tk1-demo.c
+++ b/configs/jetson-tk1-demo.c
@@ -18,6 +18,10 @@

#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0])

+#ifndef CONFIG_INMATE_BASE
+#define CONFIG_INMATE_BASE 0x0
+#endif
+

struct {
struct jailhouse_cell_desc cell;
__u64 cpus[1];
@@ -31,6 +35,8 @@ struct {

.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
+
+ .cpu_reset_address = CONFIG_INMATE_BASE,
},

.cpus = {
@@ -47,7 +53,7 @@ struct {
},
/* RAM */ {
.phys_start = 0xfbef0000,
- .virt_start = 0,
+ .virt_start = CONFIG_INMATE_BASE,
.size = 0x00010000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
--
2.12.2

[Ralf Ramsauer]

as we introduced two new config parameters, CONFIG_BARE_METAL and
CONFIG_INMATE_BASE.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---

Documentation/hypervisor-configuration.md | 14 ++++++++++++++
1 file changed, 14 insertions(+)

diff --git a/Documentation/hypervisor-configuration.md b/Documentation/hypervisor-configuration.md
index 4b48ae64..6e5095f0 100644
--- a/Documentation/hypervisor-configuration.md
+++ b/Documentation/hypervisor-configuration.md
@@ -25,6 +25,20 @@ General configuration parameters

/* Enable code coverage data collection (see Documentation/gcov.txt) */

#define CONFIG_JAILHOUSE_GCOV 1

+ /*
+ * Link inmates against a custom base address. Only supported on ARM
+ * architectures. If this parameter is defined, inmates must be loaded to
+ * the appropriate location.
+ */
+ #define CONFIG_INMATE_BASE 0x90000000
+
+ /*
+ * Strip Jailhouse specific parts from inmates (e.g., heartbeat()). This
+ * allows inmates to be booted on bare-metal, without Jailhouse and is
+ * mainly used for testing purposes.
+ */
+ #define CONFIG_BARE_METAL 1
+

### Example board specific configurations

#### ARM

--
2.12.2

[Ralf Ramsauer]

This patch finally allows us to run inmates on bare metal, without Linux
and without Jailhouse.

This is useful, for comparing inmate behaviour, with and without an
active hypervisor.

From now on, inmates can be loaded from u-boot when defining
CONFIG_INMATE_BASE and CONFIG_BARE_METAL.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---

[Jan Kiszka]

Seems fine now, but I'm keeping it on hold for the time after 0.7 (which
is already delayed).

Thanks,
Jan

--
Siemens AG, Corporate Technology, CT RDA ITP SES-DE
Corporate Competence Center Embedded Linux

[Ralf Ramsauer]

Fair enough!

Thanks
Ralf
>
> Thanks,
> Jan
>

[Constantin Petra]

Hi,

We're really interested in these patches, we want to use a different start address for a 1:1 mapping of a binary, and stomped into the fact that we couldn't get it to start from the needed address (on ZCU102).
Unfortunately it seems like I cannot get these patches from mail, is there any repository where this code is available? (or get the patches as ".patch" files).

By the way, is there a (recommended) way to start a 32bit EL1 mode cell or is the 64-bit variant the only one available for ZCU102?

Thank you,
Constantin

[Ralf Ramsauer]

Hi,

yes, there is quite a bunch of more patches in my local queue... :)

Let me push those ARM Entry Point patches to some repo:
https://github.com/lfd/jailhouse/tree/arm-entry

Rebased to latest next. If you successfully tested them, just drop a
Tested-By.

Ralf

[Constantin Petra]

Hi again,

I was able to run the uart-demo on 1:1 mapping at 20600000 on ZCU102 dev board rev B.

I don't know what dropping a "Tested-By" implies though :)

Best Regards,

Constantin

[Ralf Ramsauer]

Hi,

On 05/04/2017 05:01 PM, Constantin Petra wrote:
> Hi again,
>
> I was able to run the uart-demo on 1:1 mapping at 20600000 on ZCU102 dev
> board rev B.

Good to hear.

> I don't know what dropping a "Tested-By" implies though :)

Ah, sorry.

So if your test is successful, and everything works as expected, then
you can send the following line to the list:
Tested-by: Random J Developer <ran...@developer.example.org>

The maintainer (i.e., Jan) will integrate this line to the commit
message when merging the patch.

Ralf

>
> Best Regards,
> Constantin
>
>
> On Thu, May 4, 2017 at 2:10 PM, Ralf Ramsauer
> <ralf.r...@oth-regensburg.de

> <http://hypervisor-configuration.md> | 139

[Constantin Petra]

Tested-by: Constantin Petra <Constant...@gmail.com>

On Thu, May 4, 2017 at 6:07 PM, Ralf Ramsauer <ralf.r...@oth-regensburg.de> wrote:

Hi,

On 05/04/2017 05:01 PM, Constantin Petra wrote:
> Hi again,
>
> I was able to run the uart-demo on 1:1 mapping at 20600000 on ZCU102 dev
> board rev B.
Good to hear.
> I don't know what dropping a "Tested-By" implies though :)
Ah, sorry.

So if your test is successful, and everything works as expected, then
you can send the following line to the list:
Tested-by: Random J Developer <ran...@developer.example.org>

The maintainer (i.e., Jan) will integrate this line to the commit
message when merging the patch.

  Ralf

>
> Best Regards,
> Constantin
>
>
> On Thu, May 4, 2017 at 2:10 PM, Ralf Ramsauer

> <ralf.ramsauer@oth-regensburg.de

[Jan Kiszka]

On 2017-04-26 14:25, Ralf Ramsauer wrote:

I've pulled the #ifdefs - inverted - into the function bodys. Then there
is no need for the #else.

[Jan Kiszka]

On 2017-04-26 14:25, Ralf Ramsauer wrote:

Thanks, merged.

[Ralf Ramsauer]

Apparently, this was not enough. As HEADER_FORMAT expanded, we also need
to unexpand the 'Q' to some variable. jailhouse-cell-linux currently
doesn't respect the cpu_reset_address, so we can simply ignore it, but
we must do that explicitly.

For a quick fix, could you please squash following fixup into this patch?

diff --git a/tools/jailhouse-cell-linux b/tools/jailhouse-cell-linux
index bd6092fd55e8..e5b318ef3a28 100755
--- a/tools/jailhouse-cell-linux
+++ b/tools/jailhouse-cell-linux
@@ -528,7 +528,8 @@ class Config:
self.pio_bitmap_size,
self.num_pci_devices,
self.num_pci_caps,
- self.vpci_irq_base) = \
+ self.vpci_irq_base,
+ _) = \
struct.unpack_from(Config._HEADER_FORMAT, self.data)
if str(signature.decode()) != 'JHCELL':
print('Not a cell configuration: %s' % config_file.name,


I can also resend the whole series if desired.

However, this fix makes things working if the linux-loader is still
located at address zero. I already wrote (and tested) another patch,
that enables respect of cpu_reset_address for the jailhouse-cell-linux
tool. I'll follow up with this patch.

Sorry!
Ralf

[Jan Kiszka]

Please resent this patch as v2 with the fix folded in. I will replace it
in next then.

[Ralf Ramsauer]

From now on, the entry point of a cell is no longer fixed to 0x0 on ARM.

Default behaviour does not change, as non-defined entry settings in cell

configs default to zero. jailhouse-cell-linux currently does not support
non-zero loader locations.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
hypervisor/arch/arm-common/control.c | 6 +++---
hypervisor/include/jailhouse/cell-config.h | 4 +++-

tools/jailhouse-cell-linux | 7 ++++---
tools/jailhouse-hardware-check | 2 +-
4 files changed, 11 insertions(+), 8 deletions(-)

index dea6c3ef..e5b318ef 100755

--- a/tools/jailhouse-cell-linux
+++ b/tools/jailhouse-cell-linux
@@ -511,8 +511,8 @@ class MemoryRegion:


class Config:
- _HEADER_FORMAT = '6sH32s4xIIIIIIIII'
- _HEADER_REVISION = 4
+ _HEADER_FORMAT = '6sH32s4xIIIIIIIIIQ'
+ _HEADER_REVISION = 5

def __init__(self, config_file):
self.data = config_file.read()

@@ -528,7 +528,8 @@ class Config:
self.pio_bitmap_size,
self.num_pci_devices,
self.num_pci_caps,
- self.vpci_irq_base) = \
+ self.vpci_irq_base,
+ _) = \
struct.unpack_from(Config._HEADER_FORMAT, self.data)
if str(signature.decode()) != 'JHCELL':
print('Not a cell configuration: %s' % config_file.name,

diff --git a/tools/jailhouse-hardware-check b/tools/jailhouse-hardware-check
index fb820120..413b90d1 100755
--- a/tools/jailhouse-hardware-check
+++ b/tools/jailhouse-hardware-check
@@ -113,7 +113,7 @@ class Sysconfig:
X86_MAX_IOMMU_UNITS = 8
X86_IOMMU_SIZE = 20

- HEADER_REVISION = 4
+ HEADER_REVISION = 5
HEADER_FORMAT = '6sH'

def __init__(self, path):

--
2.13.0

[Jan Kiszka]

Thanks, put into next.