[RFC PATCH v2 00/18] Provide platform information on ARM

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Ralf Ramsauer

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May 14, 2018, 8:19:19 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
Hi,

analogously to x86, this series provides some platform information on
ARM via the communication region.

In sum, this series passes to inmates:
- A struct jailhouse_debug_console to inmates on all architectures
(including x86, but there it is not used yet)
- arm: GIC (v3 and v4) register locations
- arm: Platform Timer IRQ

The nice thing is that we get rid of mach.h on ARM architectures, which
makes inmates completely platform independant.

Inmate command line options (e.g., con-type, con-divider, ...) may still
override platform information.

Tested on a Jetson TK1 and qemu-arm64.

I converted this to a RFC series as there are still some things missing:
- Documentation for new comm region ABI
- Use the comm region's struct jailhouse_console on x86
- Analogously to arm: rewrite x86's uart drivers, embed them in struct uart_chip
- We then can (probably) consolidate both architecture's printk.c

Ralf

since v1:
- rebased to next
- register uart drivers in an array instead of a section: the section
approach won't work easily for our inmates

Ralf Ramsauer (18):
inmates: arm: uart: introduce DEFINE_UART macro
inmates: arm: uart: register uarts in uart_array
core, driver: rename struct jailhouse_console to jailhouse_ringbuf
core: refactor struct jailhouse_debug_console
inmates: arm: add consoles to inmate definition
core: pass cell's console to communication region
inmates: arm: configure uarts via communication region
core: add common platform info for ARM architectures
inmates: arm-common: define mmio_read64
inmates: arm: sysregs: define bits for MPIDR
inmates: arm: get GIC configuration from comm_region's platform info
inmates: arm: dynamically choose GIC version
core: arm: define timer_irq in sysconfig and pass it to comm_region
inmates: arm: use timer_irq from comm_region
inmates: arm: delete mach.h
core, tools: Increase header revision
core: increase comm_region's revision
inmates: arm: allow absence of config.h

configs/arm/bananapi-gic-demo.c | 10 ++
configs/arm/bananapi-linux-demo.c | 10 ++
configs/arm/bananapi-uart-demo.c | 10 ++
configs/arm/bananapi.c | 1 +
configs/arm/emtrion-rzg1e-linux-demo.c | 10 ++
configs/arm/emtrion-rzg1e-uart-demo.c | 10 ++
configs/arm/emtrion-rzg1e.c | 1 +
configs/arm/emtrion-rzg1h-linux-demo.c | 10 ++
configs/arm/emtrion-rzg1h-uart-demo.c | 10 ++
configs/arm/emtrion-rzg1h.c | 1 +
configs/arm/emtrion-rzg1m-linux-demo.c | 10 ++
configs/arm/emtrion-rzg1m-uart-demo.c | 10 ++
configs/arm/emtrion-rzg1m.c | 1 +
configs/arm/jetson-tk1-demo.c | 10 ++
configs/arm/jetson-tk1-linux-demo.c | 10 ++
configs/arm/jetson-tk1.c | 1 +
configs/arm/orangepi0-gic-demo.c | 7 +
configs/arm/orangepi0-linux-demo.c | 7 +
configs/arm/orangepi0.c | 1 +
configs/arm/vexpress-gic-demo.c | 7 +
configs/arm/vexpress-linux-demo.c | 7 +
configs/arm/vexpress-uart-demo.c | 7 +
configs/arm/vexpress.c | 1 +
configs/arm64/amd-seattle-gic-demo.c | 7 +
configs/arm64/amd-seattle-linux-demo.c | 7 +
configs/arm64/amd-seattle-uart-demo.c | 7 +
configs/arm64/amd-seattle.c | 1 +
configs/arm64/espressobin-gic-demo.c | 7 +
configs/arm64/espressobin-linux-demo.c | 7 +
configs/arm64/espressobin.c | 1 +
configs/arm64/foundation-v8-gic-demo.c | 7 +
configs/arm64/foundation-v8-linux-demo.c | 7 +
configs/arm64/foundation-v8-uart-demo.c | 7 +
configs/arm64/foundation-v8.c | 1 +
configs/arm64/hikey-gic-demo.c | 7 +
configs/arm64/hikey-linux-demo.c | 7 +
configs/arm64/hikey.c | 1 +
configs/arm64/imx8mq-gic-demo.c | 7 +
configs/arm64/imx8mq.c | 1 +
configs/arm64/jetson-tx1-demo.c | 7 +
configs/arm64/jetson-tx1-linux-demo.c | 7 +
configs/arm64/jetson-tx1.c | 1 +
configs/arm64/jetson-tx2-demo.c | 7 +
configs/arm64/jetson-tx2.c | 1 +
configs/arm64/qemu-arm64-gic-demo.c | 7 +
configs/arm64/qemu-arm64-linux-demo.c | 7 +
configs/arm64/qemu-arm64.c | 1 +
configs/arm64/zynqmp-zcu102-gic-demo.c | 7 +
configs/arm64/zynqmp-zcu102-linux-demo-2.c | 7 +
configs/arm64/zynqmp-zcu102-linux-demo.c | 7 +
configs/arm64/zynqmp-zcu102.c | 1 +
driver/main.c | 16 +--
hypervisor/arch/arm-common/control.c | 10 ++
hypervisor/control.c | 1 +
hypervisor/include/jailhouse/header.h | 2 +-
hypervisor/include/jailhouse/printk.h | 2 +-
hypervisor/include/jailhouse/uart.h | 2 +-
hypervisor/printk.c | 2 +-
.../arch/arm-common/asm/jailhouse_hypercall.h | 44 +++++++
include/arch/arm/asm/jailhouse_hypercall.h | 3 +
include/arch/arm64/asm/jailhouse_hypercall.h | 3 +
include/jailhouse/cell-config.h | 51 +-------
include/jailhouse/console.h | 84 ++++++++++++
include/jailhouse/hypercall.h | 8 +-
inmates/Makefile | 7 +-
inmates/demos/arm/gic-demo.c | 5 +-
inmates/lib/arm-common/Makefile.lib | 2 +-
inmates/lib/arm-common/gic-v2.c | 28 ++--
inmates/lib/arm-common/gic-v3.c | 55 ++++++--
inmates/lib/arm-common/gic.c | 15 ++-
inmates/lib/arm-common/include/gic.h | 2 -
inmates/lib/arm-common/include/inmate.h | 5 +
inmates/lib/arm-common/include/uart.h | 30 +++--
inmates/lib/arm-common/printk.c | 49 ++-----
inmates/lib/arm-common/uart-8250-8.c | 15 +--
inmates/lib/arm-common/uart-8250.c | 15 +--
inmates/lib/arm-common/uart-hscif.c | 15 +--
inmates/lib/arm-common/uart-imx.c | 15 +--
inmates/lib/arm-common/uart-jailhouse.c | 12 +-
inmates/lib/arm-common/uart-mvebu.c | 15 +--
inmates/lib/arm-common/uart-pl011.c | 15 +--
inmates/lib/arm-common/uart-scifa.c | 15 +--
inmates/lib/arm-common/uart-xuartps.c | 15 +--
inmates/lib/arm-common/uart.c | 63 +++++++++
inmates/lib/arm/include/asm/sysregs.h | 9 ++
inmates/lib/arm/include/mach.h | 116 -----------------
inmates/lib/arm/inmate.lds.S | 2 -
inmates/lib/arm64/include/asm/sysregs.h | 10 ++
inmates/lib/arm64/include/mach.h | 121 ------------------
inmates/lib/arm64/inmate.lds.S | 2 -
tools/jailhouse-cell-linux | 4 +-
tools/jailhouse-hardware-check | 2 +-
92 files changed, 721 insertions(+), 460 deletions(-)
create mode 100644 include/arch/arm-common/asm/jailhouse_hypercall.h
create mode 100644 include/jailhouse/console.h
create mode 100644 inmates/lib/arm-common/uart.c
delete mode 100644 inmates/lib/arm/include/mach.h
delete mode 100644 inmates/lib/arm64/include/mach.h

--
2.17.0

Ralf Ramsauer

unread,
May 14, 2018, 8:19:19 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
Register all uarts in an array. When initialising the console,
console_init() will iterate over that array to find the appropriate
driver.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
inmates/lib/arm-common/Makefile.lib | 2 +-
inmates/lib/arm-common/include/uart.h | 15 +++----
inmates/lib/arm-common/printk.c | 24 +++-------
inmates/lib/arm-common/uart.c | 63 +++++++++++++++++++++++++++
4 files changed, 75 insertions(+), 29 deletions(-)
create mode 100644 inmates/lib/arm-common/uart.c

diff --git a/inmates/lib/arm-common/Makefile.lib b/inmates/lib/arm-common/Makefile.lib
index 9edb2d9f..cb5a8031 100644
--- a/inmates/lib/arm-common/Makefile.lib
+++ b/inmates/lib/arm-common/Makefile.lib
@@ -37,7 +37,7 @@
#

objs-y := ../string.o ../cmdline.o ../setup.o
-objs-y += printk.o gic.o timer.o
+objs-y += printk.o gic.o timer.o uart.o
objs-y += uart-jailhouse.o uart-pl011.o uart-8250.o uart-8250-8.o
objs-y += uart-xuartps.o uart-mvebu.o uart-hscif.o uart-scifa.o uart-imx.o
objs-y += gic-v2.o gic-v3.o
diff --git a/inmates/lib/arm-common/include/uart.h b/inmates/lib/arm-common/include/uart.h
index bf0b6dba..25eaef5a 100644
--- a/inmates/lib/arm-common/include/uart.h
+++ b/inmates/lib/arm-common/include/uart.h
@@ -51,9 +51,14 @@ struct uart_chip {
void (*write)(struct uart_chip*, char c);
};

+extern struct uart_chip *uart_array[];
+
#define UART_OPS_NAME(__name) \
uart_##__name##_ops

+#define DECLARE_UART(__name) \
+ extern struct uart_chip UART_OPS_NAME(__name)
+
#define DEFINE_UART(__name, __description) \
struct uart_chip UART_OPS_NAME(__name) = { \
.name = __description, \
@@ -61,13 +66,3 @@ struct uart_chip {
.is_busy = uart_##__name##_is_busy, \
.write = uart_##__name##_write, \
}
-
-extern struct uart_chip uart_jailhouse_ops;
-extern struct uart_chip uart_8250_ops;
-extern struct uart_chip uart_8250_8_ops;
-extern struct uart_chip uart_pl011_ops;
-extern struct uart_chip uart_xuartps_ops;
-extern struct uart_chip uart_mvebu_ops;
-extern struct uart_chip uart_hscif_ops;
-extern struct uart_chip uart_scifa_ops;
-extern struct uart_chip uart_imx_ops;
diff --git a/inmates/lib/arm-common/printk.c b/inmates/lib/arm-common/printk.c
index 73091c36..3c4d6211 100644
--- a/inmates/lib/arm-common/printk.c
+++ b/inmates/lib/arm-common/printk.c
@@ -77,29 +77,17 @@ static void console_write(const char *msg)

static void console_init(void)
{
+ struct uart_chip **c;
char buf[32];
const char *type;
unsigned int n;

type = cmdline_parse_str("con-type", buf, sizeof(buf), CON_TYPE);
- if (!strcmp(type, "JAILHOUSE"))
- chip = &uart_jailhouse_ops;
- else if (!strcmp(type, "8250"))
- chip = &uart_8250_ops;
- else if (!strcmp(type, "8250-8"))
- chip = &uart_8250_8_ops;
- else if (!strcmp(type, "PL011"))
- chip = &uart_pl011_ops;
- else if (!strcmp(type, "XUARTPS"))
- chip = &uart_xuartps_ops;
- else if (!strcmp(type, "MVEBU"))
- chip = &uart_mvebu_ops;
- else if (!strcmp(type, "HSCIF"))
- chip = &uart_hscif_ops;
- else if (!strcmp(type, "SCIFA"))
- chip = &uart_scifa_ops;
- else if (!strcmp(type, "IMX-UART"))
- chip = &uart_imx_ops;
+ for (c = uart_array; *c; c++)
+ if (!strcmp(type, (*c)->name)) {
+ chip = *c;
+ break;
+ }

if (!chip)
return;
diff --git a/inmates/lib/arm-common/uart.c b/inmates/lib/arm-common/uart.c
new file mode 100644
index 00000000..8b16e630
--- /dev/null
+++ b/inmates/lib/arm-common/uart.c
@@ -0,0 +1,63 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Copyright (c) OTH Regensburg, 2018
+ *
+ * Authors:
+ * Ralf Ramsauer <ralf.r...@oth-regensburg.de>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ *
+ * Alternatively, you can use or redistribute this file under the following
+ * BSD license:
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <inmate.h>
+#include <uart.h>
+
+DECLARE_UART(8250);
+DECLARE_UART(8250_8);
+DECLARE_UART(hscif);
+DECLARE_UART(imx);
+DECLARE_UART(jailhouse);
+DECLARE_UART(mvebu);
+DECLARE_UART(pl011);
+DECLARE_UART(scifa);
+DECLARE_UART(xuartps);
+
+struct uart_chip *uart_array[] = {
+ &UART_OPS_NAME(8250),
+ &UART_OPS_NAME(8250_8),
+ &UART_OPS_NAME(hscif),
+ &UART_OPS_NAME(imx),
+ &UART_OPS_NAME(jailhouse),
+ &UART_OPS_NAME(mvebu),
+ &UART_OPS_NAME(pl011),
+ &UART_OPS_NAME(scifa),
+ &UART_OPS_NAME(xuartps),
+ NULL
+};
--
2.17.0

Ralf Ramsauer

unread,
May 14, 2018, 8:19:19 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
For the moment, this macro shrinks repeating definitions of structures
by reducing boilerplate. Later, we will enhance the macro when we add
the uart flags.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
inmates/lib/arm-common/include/uart.h | 15 ++++++++++++++-
inmates/lib/arm-common/uart-8250-8.c | 12 ++++--------
inmates/lib/arm-common/uart-8250.c | 12 ++++--------
inmates/lib/arm-common/uart-hscif.c | 12 ++++--------
inmates/lib/arm-common/uart-imx.c | 12 ++++--------
inmates/lib/arm-common/uart-jailhouse.c | 12 ++++--------
inmates/lib/arm-common/uart-mvebu.c | 12 ++++--------
inmates/lib/arm-common/uart-pl011.c | 12 ++++--------
inmates/lib/arm-common/uart-scifa.c | 12 ++++--------
inmates/lib/arm-common/uart-xuartps.c | 12 ++++--------
10 files changed, 50 insertions(+), 73 deletions(-)

diff --git a/inmates/lib/arm-common/include/uart.h b/inmates/lib/arm-common/include/uart.h
index abe211e2..bf0b6dba 100644
--- a/inmates/lib/arm-common/include/uart.h
+++ b/inmates/lib/arm-common/include/uart.h
@@ -1,7 +1,7 @@
/*
* Jailhouse, a Linux-based partitioning hypervisor
*
- * Copyright (c) OTH Regensburg, 2016
+ * Copyright (c) OTH Regensburg, 2016-2018
*
* Authors:
* Ralf Ramsauer <ralf.r...@oth-regensburg.de>
@@ -37,6 +37,8 @@
*/

struct uart_chip {
+ const char *name;
+
void *base;

void *clock_reg;
@@ -49,6 +51,17 @@ struct uart_chip {
void (*write)(struct uart_chip*, char c);
};

+#define UART_OPS_NAME(__name) \
+ uart_##__name##_ops
+
+#define DEFINE_UART(__name, __description) \
+ struct uart_chip UART_OPS_NAME(__name) = { \
+ .name = __description, \
+ .init = uart_##__name##_init, \
+ .is_busy = uart_##__name##_is_busy, \
+ .write = uart_##__name##_write, \
+ }
+
extern struct uart_chip uart_jailhouse_ops;
extern struct uart_chip uart_8250_ops;
extern struct uart_chip uart_8250_8_ops;
diff --git a/inmates/lib/arm-common/uart-8250-8.c b/inmates/lib/arm-common/uart-8250-8.c
index 2d13d369..a109848d 100644
--- a/inmates/lib/arm-common/uart-8250-8.c
+++ b/inmates/lib/arm-common/uart-8250-8.c
@@ -50,7 +50,7 @@
#define UART_LSR 0x5
#define UART_LSR_THRE 0x20

-static void uart_init(struct uart_chip *chip)
+static void uart_8250_8_init(struct uart_chip *chip)
{
if (chip->clock_reg)
mmio_write32(chip->clock_reg,
@@ -65,18 +65,14 @@ static void uart_init(struct uart_chip *chip)
}
}

-static bool uart_is_busy(struct uart_chip *chip)
+static bool uart_8250_8_is_busy(struct uart_chip *chip)
{
return !(mmio_read8(chip->base + UART_LSR) & UART_LSR_THRE);
}

-static void uart_write(struct uart_chip *chip, char c)
+static void uart_8250_8_write(struct uart_chip *chip, char c)
{
mmio_write8(chip->base + UART_TX, c);
}

-struct uart_chip uart_8250_8_ops = {
- .init = uart_init,
- .is_busy = uart_is_busy,
- .write = uart_write,
-};
+DEFINE_UART(8250_8, "8250-8");
diff --git a/inmates/lib/arm-common/uart-8250.c b/inmates/lib/arm-common/uart-8250.c
index 4cfaed2f..a0d97281 100644
--- a/inmates/lib/arm-common/uart-8250.c
+++ b/inmates/lib/arm-common/uart-8250.c
@@ -50,7 +50,7 @@
#define UART_LSR 0x14
#define UART_LSR_THRE 0x20

-static void uart_init(struct uart_chip *chip)
+static void uart_8250_init(struct uart_chip *chip)
{
if (chip->clock_reg)
mmio_write32(chip->clock_reg,
@@ -65,18 +65,14 @@ static void uart_init(struct uart_chip *chip)
}
}

-static bool uart_is_busy(struct uart_chip *chip)
+static bool uart_8250_is_busy(struct uart_chip *chip)
{
return !(mmio_read32(chip->base + UART_LSR) & UART_LSR_THRE);
}

-static void uart_write(struct uart_chip *chip, char c)
+static void uart_8250_write(struct uart_chip *chip, char c)
{
mmio_write32(chip->base + UART_TX, c);
}

-struct uart_chip uart_8250_ops = {
- .init = uart_init,
- .is_busy = uart_is_busy,
- .write = uart_write,
-};
+DEFINE_UART(8250, "8250");
diff --git a/inmates/lib/arm-common/uart-hscif.c b/inmates/lib/arm-common/uart-hscif.c
index 4f73a0a2..c3c9aadb 100644
--- a/inmates/lib/arm-common/uart-hscif.c
+++ b/inmates/lib/arm-common/uart-hscif.c
@@ -53,7 +53,7 @@

#define HSCIF_FIFO_SIZE 128

-static void uart_init(struct uart_chip *chip)
+static void uart_hscif_init(struct uart_chip *chip)
{
u16 hsscr;

@@ -67,12 +67,12 @@ static void uart_init(struct uart_chip *chip)
}
}

-static bool uart_is_busy(struct uart_chip *chip)
+static bool uart_hscif_is_busy(struct uart_chip *chip)
{
return !(mmio_read16(chip->base + HSCIF_HSFSR) & HSCIF_HSFSR_TDFE);
}

-static void uart_write(struct uart_chip *chip, char c)
+static void uart_hscif_write(struct uart_chip *chip, char c)
{
mmio_write8(chip->base + HSCIF_HSFTDR, c);
mmio_write16(chip->base + HSCIF_HSFSR,
@@ -80,8 +80,4 @@ static void uart_write(struct uart_chip *chip, char c)
~(HSCIF_HSFSR_TDFE | HSCIF_HSFSR_TEND));
}

-struct uart_chip uart_hscif_ops = {
- .init = uart_init,
- .is_busy = uart_is_busy,
- .write = uart_write,
-};
+DEFINE_UART(hscif, "HSCIF");
diff --git a/inmates/lib/arm-common/uart-imx.c b/inmates/lib/arm-common/uart-imx.c
index 830a9cd2..88db0813 100644
--- a/inmates/lib/arm-common/uart-imx.c
+++ b/inmates/lib/arm-common/uart-imx.c
@@ -41,23 +41,19 @@
#define UTXD 0x40
#define UTS_TXEMPTY (1 << 6)

-static void uart_init(struct uart_chip *chip)
+static void uart_imx_init(struct uart_chip *chip)
{
/* Initialization currently done by Linux. */
}

-static bool uart_is_busy(struct uart_chip *chip)
+static bool uart_imx_is_busy(struct uart_chip *chip)
{
return !(mmio_read32(chip->base + UTS) & UTS_TXEMPTY);
}

-static void uart_write(struct uart_chip *chip, char c)
+static void uart_imx_write(struct uart_chip *chip, char c)
{
mmio_write32(chip->base + UTXD, c);
}

-struct uart_chip uart_imx_ops = {
- .init = uart_init,
- .is_busy = uart_is_busy,
- .write = uart_write,
-};
+DEFINE_UART(imx, "IMX");
diff --git a/inmates/lib/arm-common/uart-jailhouse.c b/inmates/lib/arm-common/uart-jailhouse.c
index 28d12284..096ae85b 100644
--- a/inmates/lib/arm-common/uart-jailhouse.c
+++ b/inmates/lib/arm-common/uart-jailhouse.c
@@ -39,22 +39,18 @@
#include <inmate.h>
#include <uart.h>

-static void jailhouse_init(struct uart_chip *chip)
+static void uart_jailhouse_init(struct uart_chip *chip)
{
}

-static bool jailhouse_is_busy(struct uart_chip *chip)
+static bool uart_jailhouse_is_busy(struct uart_chip *chip)
{
return false;
}

-static void jailhouse_write(struct uart_chip *chip, char c)
+static void uart_jailhouse_write(struct uart_chip *chip, char c)
{
jailhouse_call_arg1(JAILHOUSE_HC_DEBUG_CONSOLE_PUTC, c);
}

-struct uart_chip uart_jailhouse_ops = {
- .init = jailhouse_init,
- .is_busy = jailhouse_is_busy,
- .write = jailhouse_write,
-};
+DEFINE_UART(jailhouse, "JAILHOUSE");
diff --git a/inmates/lib/arm-common/uart-mvebu.c b/inmates/lib/arm-common/uart-mvebu.c
index c762f7f0..c40b42eb 100644
--- a/inmates/lib/arm-common/uart-mvebu.c
+++ b/inmates/lib/arm-common/uart-mvebu.c
@@ -43,22 +43,18 @@
#define UART_STAT 0xc
#define UART_STAT_TX_FULL (1 << 11)

-static void uart_init(struct uart_chip *chip)
+static void uart_mvebu_init(struct uart_chip *chip)
{
}

-static bool uart_is_busy(struct uart_chip *chip)
+static bool uart_mvebu_is_busy(struct uart_chip *chip)
{
return !!(mmio_read32(chip->base + UART_STAT) & UART_STAT_TX_FULL);
}

-static void uart_write(struct uart_chip *chip, char c)
+static void uart_mvebu_write(struct uart_chip *chip, char c)
{
mmio_write32(chip->base + UART_TSH, c);
}

-struct uart_chip uart_mvebu_ops = {
- .init = uart_init,
- .is_busy = uart_is_busy,
- .write = uart_write,
-};
+DEFINE_UART(mvebu, "MVEBU");
diff --git a/inmates/lib/arm-common/uart-pl011.c b/inmates/lib/arm-common/uart-pl011.c
index 12cb2e52..3bbf0f94 100644
--- a/inmates/lib/arm-common/uart-pl011.c
+++ b/inmates/lib/arm-common/uart-pl011.c
@@ -58,7 +58,7 @@

#define UARTLCR_H_WLEN (3 << 5)

-static void uart_init(struct uart_chip *chip)
+static void uart_pl011_init(struct uart_chip *chip)
{
#ifdef CONFIG_MACH_VEXPRESS
/* 115200 8N1 */
@@ -76,20 +76,16 @@ static void uart_init(struct uart_chip *chip)
#endif
}

-static bool uart_is_busy(struct uart_chip *chip)
+static bool uart_pl011_is_busy(struct uart_chip *chip)
{
/* FIFO full or busy */
return (mmio_read32(chip->base + UARTFR) &
(UARTFR_TXFF | UARTFR_BUSY)) != 0;
}

-static void uart_write(struct uart_chip *chip, char c)
+static void uart_pl011_write(struct uart_chip *chip, char c)
{
mmio_write32(chip->base + UARTDR, c);
}

-struct uart_chip uart_pl011_ops = {
- .init = uart_init,
- .is_busy = uart_is_busy,
- .write = uart_write,
-};
+DEFINE_UART(pl011, "PL011");
diff --git a/inmates/lib/arm-common/uart-scifa.c b/inmates/lib/arm-common/uart-scifa.c
index 92357d37..9d7939c4 100644
--- a/inmates/lib/arm-common/uart-scifa.c
+++ b/inmates/lib/arm-common/uart-scifa.c
@@ -54,7 +54,7 @@
#define SCIFA_FIFO_SIZE 64
#define SCIFA_TTRG_32BYTES 0

-static void uart_init(struct uart_chip *chip)
+static void uart_scifa_init(struct uart_chip *chip)
{
u16 scascr;

@@ -68,12 +68,12 @@ static void uart_init(struct uart_chip *chip)
}
}

-static bool uart_is_busy(struct uart_chip *chip)
+static bool uart_scifa_is_busy(struct uart_chip *chip)
{
return !(mmio_read16(chip->base + SCIFA_SCASSR) & SCIFA_SCASSR_TDFE);
}

-static void uart_write(struct uart_chip *chip, char c)
+static void uart_scifa_write(struct uart_chip *chip, char c)
{
mmio_write8(chip->base + SCIFA_SCAFTDR, c);
mmio_write16(chip->base + SCIFA_SCASSR,
@@ -81,8 +81,4 @@ static void uart_write(struct uart_chip *chip, char c)
~(SCIFA_SCASSR_TDFE | SCIFA_SCASSR_TEND));
}

-struct uart_chip uart_scifa_ops = {
- .init = uart_init,
- .is_busy = uart_is_busy,
- .write = uart_write,
-};
+DEFINE_UART(scifa, "SCIFA");
diff --git a/inmates/lib/arm-common/uart-xuartps.c b/inmates/lib/arm-common/uart-xuartps.c
index 6b04e491..92de9ddd 100644
--- a/inmates/lib/arm-common/uart-xuartps.c
+++ b/inmates/lib/arm-common/uart-xuartps.c
@@ -43,22 +43,18 @@
#define UART_SR_TXEMPTY 0x8
#define UART_FIFO 0x30

-static void uart_init(struct uart_chip *chip)
+static void uart_xuartps_init(struct uart_chip *chip)
{
}

-static bool uart_is_busy(struct uart_chip *chip)
+static bool uart_xuartps_is_busy(struct uart_chip *chip)
{
return !(mmio_read32(chip->base + UART_SR) & UART_SR_TXEMPTY);
}

-static void uart_write(struct uart_chip *chip, char c)
+static void uart_xuartps_write(struct uart_chip *chip, char c)
{
mmio_write32(chip->base + UART_FIFO, c);
}

-struct uart_chip uart_xuartps_ops = {
- .init = uart_init,
- .is_busy = uart_is_busy,
- .write = uart_write,
-};
+DEFINE_UART(xuartps, "XUARTPS");
--
2.17.0

Ralf Ramsauer

unread,
May 14, 2018, 8:19:20 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
Rename struct jailhouse_debug_console to jailhouse_console, and move the
definition to its own header.

No functional change.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
hypervisor/include/jailhouse/uart.h | 2 +-
include/jailhouse/cell-config.h | 46 ++--------------
include/jailhouse/console.h | 84 +++++++++++++++++++++++++++++
3 files changed, 88 insertions(+), 44 deletions(-)
create mode 100644 include/jailhouse/console.h

diff --git a/hypervisor/include/jailhouse/uart.h b/hypervisor/include/jailhouse/uart.h
index 0190e679..c6e5e61e 100644
--- a/hypervisor/include/jailhouse/uart.h
+++ b/hypervisor/include/jailhouse/uart.h
@@ -16,7 +16,7 @@ struct uart_chip {
/* must be set by the caller */
void *virt_base;
void *virt_clock_reg;
- struct jailhouse_debug_console *debug_console;
+ struct jailhouse_console *debug_console;

/* driver selects defaults, if used */
void (*reg_out)(struct uart_chip *chip, unsigned int reg, u32 value);
diff --git a/include/jailhouse/cell-config.h b/include/jailhouse/cell-config.h
index ec8884af..7af7d6a8 100644
--- a/include/jailhouse/cell-config.h
+++ b/include/jailhouse/cell-config.h
@@ -39,6 +39,8 @@
#ifndef _JAILHOUSE_CELL_CONFIG_H
#define _JAILHOUSE_CELL_CONFIG_H

+#include <jailhouse/console.h>
+
/*
* Incremented on any layout or semantic change of system or cell config.
* Also update HEADER_REVISION in tools.
@@ -182,48 +184,6 @@ struct jailhouse_iommu {
__u32 amd_features;
} __attribute__((packed));

-/* Bits 0..3 are used to select the particular driver */
-#define JAILHOUSE_CON1_TYPE_NONE 0x0000
-#define JAILHOUSE_CON1_TYPE_VGA 0x0001
-#define JAILHOUSE_CON1_TYPE_8250 0x0002
-#define JAILHOUSE_CON1_TYPE_PL011 0x0003
-#define JAILHOUSE_CON1_TYPE_XUARTPS 0x0004
-#define JAILHOUSE_CON1_TYPE_MVEBU 0x0005
-#define JAILHOUSE_CON1_TYPE_HSCIF 0x0006
-#define JAILHOUSE_CON1_TYPE_SCIFA 0x0007
-#define JAILHOUSE_CON1_TYPE_IMX 0x0008
-#define JAILHOUSE_CON1_TYPE_MASK 0x000f
-
-#define CON1_TYPE(flags) ((flags) & JAILHOUSE_CON1_TYPE_MASK)
-
-/* Bits 4 is used to select PIO (cleared) or MMIO (set) access */
-#define JAILHOUSE_CON1_ACCESS_PIO 0x0000
-#define JAILHOUSE_CON1_ACCESS_MMIO 0x0010
-
-#define CON1_IS_MMIO(flags) ((flags) & JAILHOUSE_CON1_ACCESS_MMIO)
-
-/* Bits 5 is used to select 1 (cleared) or 4-bytes (set) register distance.
- * 1 byte implied 8-bit access, 4 bytes 32-bit access. */
-#define JAILHOUSE_CON1_REGDIST_1 0x0000
-#define JAILHOUSE_CON1_REGDIST_4 0x0020
-
-#define CON1_USES_REGDIST_1(flags) (((flags) & JAILHOUSE_CON1_REGDIST_4) == 0)
-
-/* Bits 8..11 are used to select the second console driver */
-#define JAILHOUSE_CON2_TYPE_ROOTPAGE 0x0100
-#define JAILHOUSE_CON2_TYPE_MASK 0x0f00
-
-#define CON2_TYPE(flags) ((flags) & JAILHOUSE_CON2_TYPE_MASK)
-
-struct jailhouse_debug_console {
- __u64 address;
- __u32 size;
- __u32 flags;
- __u32 divider;
- __u32 gate_nr;
- __u64 clock_reg;
-} __attribute__((packed));
-
#define JAILHOUSE_SYSTEM_SIGNATURE "JHSYST"

/**
@@ -235,7 +195,7 @@ struct jailhouse_system {

/** Jailhouse's location in memory */
struct jailhouse_memory hypervisor_memory;
- struct jailhouse_debug_console debug_console;
+ struct jailhouse_console debug_console;
struct {
__u64 pci_mmconfig_base;
__u8 pci_mmconfig_end_bus;
diff --git a/include/jailhouse/console.h b/include/jailhouse/console.h
new file mode 100644
index 00000000..5a83deb8
--- /dev/null
+++ b/include/jailhouse/console.h
@@ -0,0 +1,84 @@
+#ifndef _JAILHOUSE_CONSOLE_H
+#define _JAILHOUSE_CONSOLE_H
+
+/* Bits 0..3 are used to select the particular driver */
+#define JAILHOUSE_CON1_TYPE_NONE 0x0000
+#define JAILHOUSE_CON1_TYPE_VGA 0x0001
+#define JAILHOUSE_CON1_TYPE_8250 0x0002
+#define JAILHOUSE_CON1_TYPE_PL011 0x0003
+#define JAILHOUSE_CON1_TYPE_XUARTPS 0x0004
+#define JAILHOUSE_CON1_TYPE_MVEBU 0x0005
+#define JAILHOUSE_CON1_TYPE_HSCIF 0x0006
+#define JAILHOUSE_CON1_TYPE_SCIFA 0x0007
+#define JAILHOUSE_CON1_TYPE_IMX 0x0008
+#define JAILHOUSE_CON1_TYPE_MASK 0x000f
+
+#define CON1_TYPE(flags) ((flags) & JAILHOUSE_CON1_TYPE_MASK)
+
+/* Bits 4 is used to select PIO (cleared) or MMIO (set) access */
+#define JAILHOUSE_CON1_ACCESS_PIO 0x0000
+#define JAILHOUSE_CON1_ACCESS_MMIO 0x0010
+
+#define CON1_IS_MMIO(flags) ((flags) & JAILHOUSE_CON1_ACCESS_MMIO)
+
+/* Bits 5 is used to select 1 (cleared) or 4-bytes (set) register distance.
+ * 1 byte implied 8-bit access, 4 bytes 32-bit access. */
+#define JAILHOUSE_CON1_REGDIST_1 0x0000
+#define JAILHOUSE_CON1_REGDIST_4 0x0020
+
+#define CON1_USES_REGDIST_1(flags) (((flags) & JAILHOUSE_CON1_REGDIST_4) == 0)
+
+/* Bits 8..11 are used to select the second console driver */
+#define JAILHOUSE_CON2_TYPE_ROOTPAGE 0x0100
+#define JAILHOUSE_CON2_TYPE_MASK 0x0f00
+
+#define CON2_TYPE(flags) ((flags) & JAILHOUSE_CON2_TYPE_MASK)
+
+struct jailhouse_console {
+ __u64 address;
+ __u32 size;
+ __u32 flags;
+ __u32 divider;
+ __u32 gate_nr;
+ __u64 clock_reg;
+} __attribute__((packed));
+
+#endif /* !_JAILHOUSE_CONSOLE_H */
--
2.17.0

Ralf Ramsauer

unread,
May 14, 2018, 8:19:20 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
Add all inmate console definitions to the cell config of the inmate.

Later, the hypervisor will take the definition and copy it over to the
communication region that may be accessed by the inmate.

This patch changes the structure of struct cell_desc, so increase the
header revision, and align jailhouse-cell-linux accordingly.

Note:
Addresses of those consoles are taken from mach.h

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
configs/arm/bananapi-gic-demo.c | 10 ++++++++++
configs/arm/bananapi-linux-demo.c | 10 ++++++++++
configs/arm/bananapi-uart-demo.c | 10 ++++++++++
configs/arm/emtrion-rzg1e-linux-demo.c | 10 ++++++++++
configs/arm/emtrion-rzg1e-uart-demo.c | 10 ++++++++++
configs/arm/emtrion-rzg1h-linux-demo.c | 10 ++++++++++
configs/arm/emtrion-rzg1h-uart-demo.c | 10 ++++++++++
configs/arm/emtrion-rzg1m-linux-demo.c | 10 ++++++++++
configs/arm/emtrion-rzg1m-uart-demo.c | 10 ++++++++++
configs/arm/jetson-tk1-demo.c | 10 ++++++++++
configs/arm/jetson-tk1-linux-demo.c | 10 ++++++++++
configs/arm/orangepi0-gic-demo.c | 7 +++++++
configs/arm/orangepi0-linux-demo.c | 7 +++++++
configs/arm/vexpress-gic-demo.c | 7 +++++++
configs/arm/vexpress-linux-demo.c | 7 +++++++
configs/arm/vexpress-uart-demo.c | 7 +++++++
configs/arm64/amd-seattle-gic-demo.c | 7 +++++++
configs/arm64/amd-seattle-linux-demo.c | 7 +++++++
configs/arm64/amd-seattle-uart-demo.c | 7 +++++++
configs/arm64/espressobin-gic-demo.c | 7 +++++++
configs/arm64/espressobin-linux-demo.c | 7 +++++++
configs/arm64/foundation-v8-gic-demo.c | 7 +++++++
configs/arm64/foundation-v8-linux-demo.c | 7 +++++++
configs/arm64/foundation-v8-uart-demo.c | 7 +++++++
configs/arm64/hikey-gic-demo.c | 7 +++++++
configs/arm64/hikey-linux-demo.c | 7 +++++++
configs/arm64/imx8mq-gic-demo.c | 7 +++++++
configs/arm64/jetson-tx1-demo.c | 7 +++++++
configs/arm64/jetson-tx1-linux-demo.c | 7 +++++++
configs/arm64/jetson-tx2-demo.c | 7 +++++++
configs/arm64/qemu-arm64-gic-demo.c | 7 +++++++
configs/arm64/qemu-arm64-linux-demo.c | 7 +++++++
configs/arm64/zynqmp-zcu102-gic-demo.c | 7 +++++++
configs/arm64/zynqmp-zcu102-linux-demo-2.c | 7 +++++++
configs/arm64/zynqmp-zcu102-linux-demo.c | 7 +++++++
include/jailhouse/cell-config.h | 2 ++
36 files changed, 280 insertions(+)

diff --git a/configs/arm/bananapi-gic-demo.c b/configs/arm/bananapi-gic-demo.c
index a96e9cfb..881207ee 100644
--- a/configs/arm/bananapi-gic-demo.c
+++ b/configs/arm/bananapi-gic-demo.c
@@ -31,6 +31,16 @@ struct {

.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
+
+ .console = {
+ .address = 0x01c29c00,
+ .clock_reg = 0x01c2006c,
+ .gate_nr = 23,
+ .divider = 0x0d,
+ .flags = JAILHOUSE_CON1_TYPE_8250 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm/bananapi-linux-demo.c b/configs/arm/bananapi-linux-demo.c
index 93d401c6..50b2bb06 100644
--- a/configs/arm/bananapi-linux-demo.c
+++ b/configs/arm/bananapi-linux-demo.c
@@ -37,6 +37,16 @@ struct {
.num_pci_devices = ARRAY_SIZE(config.pci_devices),

.vpci_irq_base = 123,
+
+ .console = {
+ .address = 0x01c29c00,
+ .clock_reg = 0x01c2006c,
+ .gate_nr = 23,
+ .divider = 0x0d,
+ .flags = JAILHOUSE_CON1_TYPE_8250 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm/bananapi-uart-demo.c b/configs/arm/bananapi-uart-demo.c
index d33cd952..bd110146 100644
--- a/configs/arm/bananapi-uart-demo.c
+++ b/configs/arm/bananapi-uart-demo.c
@@ -31,6 +31,16 @@ struct {

.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
+
+ .console = {
+ .address = 0x01c29c00,
+ .clock_reg = 0x01c2006c,
+ .gate_nr = 23,
+ .divider = 0x0d,
+ .flags = JAILHOUSE_CON1_TYPE_8250 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm/emtrion-rzg1e-linux-demo.c b/configs/arm/emtrion-rzg1e-linux-demo.c
index 7ddd20e7..f005d9a9 100644
--- a/configs/arm/emtrion-rzg1e-linux-demo.c
+++ b/configs/arm/emtrion-rzg1e-linux-demo.c
@@ -36,6 +36,16 @@ struct {
.num_irqchips = ARRAY_SIZE(config.irqchips),
/* .num_pci_devices = ARRAY_SIZE(config.pci_devices),
.vpci_irq_base = 123, */
+
+ .console = {
+ .address = 0xe6ee0000,
+ .clock_reg = 0xe615014c,
+ .gate_nr = 15,
+ .divider = 0x10,
+ .flags = JAILHOUSE_CON1_TYPE_HSCIF |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm/emtrion-rzg1e-uart-demo.c b/configs/arm/emtrion-rzg1e-uart-demo.c
index c063b4c8..0af05bc7 100644
--- a/configs/arm/emtrion-rzg1e-uart-demo.c
+++ b/configs/arm/emtrion-rzg1e-uart-demo.c
@@ -31,6 +31,16 @@ struct {

.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
+
+ .console = {
+ .address = 0xe6ee0000,
+ .clock_reg = 0xe615014c,
+ .gate_nr = 15,
+ .divider = 0x10,
+ .flags = JAILHOUSE_CON1_TYPE_HSCIF |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm/emtrion-rzg1h-linux-demo.c b/configs/arm/emtrion-rzg1h-linux-demo.c
index 97389245..ac0866c1 100644
--- a/configs/arm/emtrion-rzg1h-linux-demo.c
+++ b/configs/arm/emtrion-rzg1h-linux-demo.c
@@ -36,6 +36,16 @@ struct {
.num_irqchips = ARRAY_SIZE(config.irqchips),
/* .num_pci_devices = ARRAY_SIZE(config.pci_devices),
.vpci_irq_base = 123, */
+
+ .console = {
+ .address = 0xe6c40000,
+ .clock_reg = 0xe6150138,
+ .gate_nr = 4,
+ .divider = 0x1b,
+ .flags = JAILHOUSE_CON1_TYPE_SCIFA |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm/emtrion-rzg1h-uart-demo.c b/configs/arm/emtrion-rzg1h-uart-demo.c
index 8bcfb9bd..597337c5 100644
--- a/configs/arm/emtrion-rzg1h-uart-demo.c
+++ b/configs/arm/emtrion-rzg1h-uart-demo.c
@@ -31,6 +31,16 @@ struct {

.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
+
+ .console = {
+ .address = 0xe6c40000,
+ .clock_reg = 0xe6150138,
+ .gate_nr = 4,
+ .divider = 0x1b,
+ .flags = JAILHOUSE_CON1_TYPE_SCIFA |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm/emtrion-rzg1m-linux-demo.c b/configs/arm/emtrion-rzg1m-linux-demo.c
index e7893512..61f2ba3a 100644
--- a/configs/arm/emtrion-rzg1m-linux-demo.c
+++ b/configs/arm/emtrion-rzg1m-linux-demo.c
@@ -36,6 +36,16 @@ struct {
.num_irqchips = ARRAY_SIZE(config.irqchips),
/* .num_pci_devices = ARRAY_SIZE(config.pci_devices),
.vpci_irq_base = 123, */
+
+ .console = {
+ .address = 0xe6ee0000,
+ .clock_reg = 0xe615014c,
+ .gate_nr = 15,
+ .divider = 0x10,
+ .flags = JAILHOUSE_CON1_TYPE_HSCIF |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm/emtrion-rzg1m-uart-demo.c b/configs/arm/emtrion-rzg1m-uart-demo.c
index 752f7aeb..a961f8c4 100644
--- a/configs/arm/emtrion-rzg1m-uart-demo.c
+++ b/configs/arm/emtrion-rzg1m-uart-demo.c
@@ -31,6 +31,16 @@ struct {

.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
+
+ .console = {
+ .address = 0xe6ee0000,
+ .clock_reg = 0xe615014c,
+ .gate_nr = 15,
+ .divider = 0x10,
+ .flags = JAILHOUSE_CON1_TYPE_HSCIF |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm/jetson-tk1-demo.c b/configs/arm/jetson-tk1-demo.c
index 15c90e61..5a2ed067 100644
--- a/configs/arm/jetson-tk1-demo.c
+++ b/configs/arm/jetson-tk1-demo.c
@@ -37,6 +37,16 @@ struct {
.num_memory_regions = ARRAY_SIZE(config.mem_regions),

.cpu_reset_address = CONFIG_INMATE_BASE,
+
+ .console = {
+ .address = 0x70006300,
+ /* .clock_reg = 0x60006000 + 0x330, */
+ /* .gate_nr = (65 % 32), */
+ /* .divider = 0xdd, */
+ .flags = JAILHOUSE_CON1_TYPE_8250 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm/jetson-tk1-linux-demo.c b/configs/arm/jetson-tk1-linux-demo.c
index c66a6863..0e04c42b 100644
--- a/configs/arm/jetson-tk1-linux-demo.c
+++ b/configs/arm/jetson-tk1-linux-demo.c
@@ -37,6 +37,16 @@ struct {
.num_pci_devices = ARRAY_SIZE(config.pci_devices),

.vpci_irq_base = 152,
+
+ .console = {
+ .address = 0x70006300,
+ /* .clock_reg = 0x60006000 + 0x330, */
+ /* .gate_nr = (65 % 32), */
+ /* .divider = 0xdd, */
+ .flags = JAILHOUSE_CON1_TYPE_8250 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm/orangepi0-gic-demo.c b/configs/arm/orangepi0-gic-demo.c
index fe199bcd..a391ad53 100644
--- a/configs/arm/orangepi0-gic-demo.c
+++ b/configs/arm/orangepi0-gic-demo.c
@@ -31,6 +31,13 @@ struct {

.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
+
+ .console = {
+ .address = 0x01c28000,
+ .flags = JAILHOUSE_CON1_TYPE_8250 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm/orangepi0-linux-demo.c b/configs/arm/orangepi0-linux-demo.c
index a3da1053..a561491a 100644
--- a/configs/arm/orangepi0-linux-demo.c
+++ b/configs/arm/orangepi0-linux-demo.c
@@ -37,6 +37,13 @@ struct {
.num_pci_devices = ARRAY_SIZE(config.pci_devices),

.vpci_irq_base = 123,
+
+ .console = {
+ .address = 0x01c28000,
+ .flags = JAILHOUSE_CON1_TYPE_8250 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm/vexpress-gic-demo.c b/configs/arm/vexpress-gic-demo.c
index fd59dfa2..1e109c10 100644
--- a/configs/arm/vexpress-gic-demo.c
+++ b/configs/arm/vexpress-gic-demo.c
@@ -34,6 +34,13 @@ struct {
.num_irqchips = 0,
.pio_bitmap_size = 0,
.num_pci_devices = 0,
+
+ .console = {
+ .address = 0x1c090000,
+ .flags = JAILHOUSE_CON1_TYPE_PL011 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm/vexpress-linux-demo.c b/configs/arm/vexpress-linux-demo.c
index 7f1b8198..63247757 100644
--- a/configs/arm/vexpress-linux-demo.c
+++ b/configs/arm/vexpress-linux-demo.c
@@ -35,6 +35,13 @@ struct {
.num_irqchips = 1,
.pio_bitmap_size = 0,
.num_pci_devices = 0,
+
+ .console = {
+ .address = 0x1c090000,
+ .flags = JAILHOUSE_CON1_TYPE_PL011 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm/vexpress-uart-demo.c b/configs/arm/vexpress-uart-demo.c
index eedcad90..829d288d 100644
--- a/configs/arm/vexpress-uart-demo.c
+++ b/configs/arm/vexpress-uart-demo.c
@@ -34,6 +34,13 @@ struct {
.num_irqchips = 0,
.pio_bitmap_size = 0,
.num_pci_devices = 0,
+
+ .console = {
+ .address = 0x1c090000,
+ .flags = JAILHOUSE_CON1_TYPE_PL011 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/amd-seattle-gic-demo.c b/configs/arm64/amd-seattle-gic-demo.c
index aaccdf25..36e5c16b 100644
--- a/configs/arm64/amd-seattle-gic-demo.c
+++ b/configs/arm64/amd-seattle-gic-demo.c
@@ -34,6 +34,13 @@ struct {
.num_irqchips = 0,
.pio_bitmap_size = 0,
.num_pci_devices = 0,
+
+ .console = {
+ .address = 0xe1010000,
+ .flags = JAILHOUSE_CON1_TYPE_PL011 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/amd-seattle-linux-demo.c b/configs/arm64/amd-seattle-linux-demo.c
index 88b9740d..6a7efe95 100644
--- a/configs/arm64/amd-seattle-linux-demo.c
+++ b/configs/arm64/amd-seattle-linux-demo.c
@@ -35,6 +35,13 @@ struct {
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
+
+ .console = {
+ .address = 0xe1010000,
+ .flags = JAILHOUSE_CON1_TYPE_PL011 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/amd-seattle-uart-demo.c b/configs/arm64/amd-seattle-uart-demo.c
index b620919b..d29f9ae2 100644
--- a/configs/arm64/amd-seattle-uart-demo.c
+++ b/configs/arm64/amd-seattle-uart-demo.c
@@ -34,6 +34,13 @@ struct {
.num_irqchips = 0,
.pio_bitmap_size = 0,
.num_pci_devices = 0,
+
+ .console = {
+ .address = 0xe1010000,
+ .flags = JAILHOUSE_CON1_TYPE_PL011 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/espressobin-gic-demo.c b/configs/arm64/espressobin-gic-demo.c
index 2cd1e5cd..ce586dc2 100644
--- a/configs/arm64/espressobin-gic-demo.c
+++ b/configs/arm64/espressobin-gic-demo.c
@@ -34,6 +34,13 @@ struct {
.num_irqchips = 0,
.pio_bitmap_size = 0,
.num_pci_devices = 0,
+
+ .console = {
+ .address = 0xd0012000,
+ .flags = JAILHOUSE_CON1_TYPE_MVEBU |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/espressobin-linux-demo.c b/configs/arm64/espressobin-linux-demo.c
index 1d358c31..9cc84140 100644
--- a/configs/arm64/espressobin-linux-demo.c
+++ b/configs/arm64/espressobin-linux-demo.c
@@ -37,6 +37,13 @@ struct {
.num_pci_devices = ARRAY_SIZE(config.pci_devices),

.vpci_irq_base = 140-32,
+
+ .console = {
+ .address = 0xd0012000,
+ .flags = JAILHOUSE_CON1_TYPE_MVEBU |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/foundation-v8-gic-demo.c b/configs/arm64/foundation-v8-gic-demo.c
index 02a8f38b..2b35c352 100644
--- a/configs/arm64/foundation-v8-gic-demo.c
+++ b/configs/arm64/foundation-v8-gic-demo.c
@@ -34,6 +34,13 @@ struct {
.num_irqchips = 0,
.pio_bitmap_size = 0,
.num_pci_devices = 0,
+
+ .console = {
+ .address = 0x1c090000,
+ .flags = JAILHOUSE_CON1_TYPE_PL011 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/foundation-v8-linux-demo.c b/configs/arm64/foundation-v8-linux-demo.c
index 1601a4f0..fbf65d3d 100644
--- a/configs/arm64/foundation-v8-linux-demo.c
+++ b/configs/arm64/foundation-v8-linux-demo.c
@@ -35,6 +35,13 @@ struct {
.num_irqchips = 1,
.pio_bitmap_size = 0,
.num_pci_devices = 0,
+
+ .console = {
+ .address = 0x1c090000,
+ .flags = JAILHOUSE_CON1_TYPE_PL011 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/foundation-v8-uart-demo.c b/configs/arm64/foundation-v8-uart-demo.c
index bde46352..ce7d67e2 100644
--- a/configs/arm64/foundation-v8-uart-demo.c
+++ b/configs/arm64/foundation-v8-uart-demo.c
@@ -34,6 +34,13 @@ struct {
.num_irqchips = 0,
.pio_bitmap_size = 0,
.num_pci_devices = 0,
+
+ .console = {
+ .address = 0x1c090000,
+ .flags = JAILHOUSE_CON1_TYPE_PL011 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/hikey-gic-demo.c b/configs/arm64/hikey-gic-demo.c
index f5618863..596cd2ad 100644
--- a/configs/arm64/hikey-gic-demo.c
+++ b/configs/arm64/hikey-gic-demo.c
@@ -34,6 +34,13 @@ struct {
.num_irqchips = 0,
.pio_bitmap_size = 0,
.num_pci_devices = 0,
+
+ .console = {
+ .address = 0xf7113000,
+ .flags = JAILHOUSE_CON1_TYPE_PL011 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/hikey-linux-demo.c b/configs/arm64/hikey-linux-demo.c
index 57cfb959..df85fde3 100644
--- a/configs/arm64/hikey-linux-demo.c
+++ b/configs/arm64/hikey-linux-demo.c
@@ -37,6 +37,13 @@ struct {
.num_pci_devices = ARRAY_SIZE(config.pci_devices),

.vpci_irq_base = 143-32,
+
+ .console = {
+ .address = 0xf7113000,
+ .flags = JAILHOUSE_CON1_TYPE_PL011 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/imx8mq-gic-demo.c b/configs/arm64/imx8mq-gic-demo.c
index 7f13f7ae..d33e6b83 100644
--- a/configs/arm64/imx8mq-gic-demo.c
+++ b/configs/arm64/imx8mq-gic-demo.c
@@ -31,6 +31,13 @@ struct {
.num_irqchips = 0,
.pio_bitmap_size = 0,
.num_pci_devices = 0,
+
+ .console = {
+ .address = 0x30860000,
+ .flags = JAILHOUSE_CON1_TYPE_IMX |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/jetson-tx1-demo.c b/configs/arm64/jetson-tx1-demo.c
index e369d00b..3d904ece 100644
--- a/configs/arm64/jetson-tx1-demo.c
+++ b/configs/arm64/jetson-tx1-demo.c
@@ -31,6 +31,13 @@ struct {

.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
+
+ .console = {
+ .address = 0x70006000,
+ .flags = JAILHOUSE_CON1_TYPE_8250 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/jetson-tx1-linux-demo.c b/configs/arm64/jetson-tx1-linux-demo.c
index 8ea66a32..084f64a5 100644
--- a/configs/arm64/jetson-tx1-linux-demo.c
+++ b/configs/arm64/jetson-tx1-linux-demo.c
@@ -46,6 +46,13 @@ struct {
.vpci_irq_base = 152,

.cpu_reset_address = CONFIG_INMATE_BASE,
+
+ .console = {
+ .address = 0x70006000,
+ .flags = JAILHOUSE_CON1_TYPE_8250 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/jetson-tx2-demo.c b/configs/arm64/jetson-tx2-demo.c
index 93b3fbf9..e3c87eb3 100644
--- a/configs/arm64/jetson-tx2-demo.c
+++ b/configs/arm64/jetson-tx2-demo.c
@@ -26,6 +26,13 @@ struct {

.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
+
+ .console = {
+ .address = 0x3100000,
+ .flags = JAILHOUSE_CON1_TYPE_8250 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/qemu-arm64-gic-demo.c b/configs/arm64/qemu-arm64-gic-demo.c
index 33e95dc3..5ee2ddc3 100644
--- a/configs/arm64/qemu-arm64-gic-demo.c
+++ b/configs/arm64/qemu-arm64-gic-demo.c
@@ -34,6 +34,13 @@ struct {
.num_irqchips = 0,
.pio_bitmap_size = 0,
.num_pci_devices = 0,
+
+ .console = {
+ .address = 0x09000000,
+ .flags = JAILHOUSE_CON1_TYPE_PL011 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/qemu-arm64-linux-demo.c b/configs/arm64/qemu-arm64-linux-demo.c
index b72d6ab6..4aba161d 100644
--- a/configs/arm64/qemu-arm64-linux-demo.c
+++ b/configs/arm64/qemu-arm64-linux-demo.c
@@ -38,6 +38,13 @@ struct {
.num_pci_devices = ARRAY_SIZE(config.pci_devices),

.vpci_irq_base = 140-32,
+
+ .console = {
+ .address = 0x09000000,
+ .flags = JAILHOUSE_CON1_TYPE_PL011 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/zynqmp-zcu102-gic-demo.c b/configs/arm64/zynqmp-zcu102-gic-demo.c
index a12799c0..d03c9d00 100644
--- a/configs/arm64/zynqmp-zcu102-gic-demo.c
+++ b/configs/arm64/zynqmp-zcu102-gic-demo.c
@@ -34,6 +34,13 @@ struct {
.num_irqchips = 0,
.pio_bitmap_size = 0,
.num_pci_devices = 0,
+
+ .console = {
+ .address = 0xff010000,
+ .flags = JAILHOUSE_CON1_TYPE_XUARTPS |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/zynqmp-zcu102-linux-demo-2.c b/configs/arm64/zynqmp-zcu102-linux-demo-2.c
index 1091712c..54a6ac88 100644
--- a/configs/arm64/zynqmp-zcu102-linux-demo-2.c
+++ b/configs/arm64/zynqmp-zcu102-linux-demo-2.c
@@ -37,6 +37,13 @@ struct {
.num_pci_devices = ARRAY_SIZE(config.pci_devices),

.vpci_irq_base = 144-32,
+
+ .console = {
+ .address = 0xff010000,
+ .flags = JAILHOUSE_CON1_TYPE_XUARTPS |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/configs/arm64/zynqmp-zcu102-linux-demo.c b/configs/arm64/zynqmp-zcu102-linux-demo.c
index d226ca7a..d208df40 100644
--- a/configs/arm64/zynqmp-zcu102-linux-demo.c
+++ b/configs/arm64/zynqmp-zcu102-linux-demo.c
@@ -37,6 +37,13 @@ struct {
.num_pci_devices = ARRAY_SIZE(config.pci_devices),

.vpci_irq_base = 140-32,
+
+ .console = {
+ .address = 0xff010000,
+ .flags = JAILHOUSE_CON1_TYPE_XUARTPS |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4,
+ },
},

.cpus = {
diff --git a/include/jailhouse/cell-config.h b/include/jailhouse/cell-config.h
index 7af7d6a8..09a45a40 100644
--- a/include/jailhouse/cell-config.h
+++ b/include/jailhouse/cell-config.h
@@ -81,6 +81,8 @@ struct jailhouse_cell_desc {

__u64 cpu_reset_address;
__u64 msg_reply_timeout;
+
+ struct jailhouse_console console;
} __attribute__((packed));

#define JAILHOUSE_MEM_READ 0x0001
--
2.17.0

Ralf Ramsauer

unread,
May 14, 2018, 8:19:20 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
To avoid name clashes in future, as jailhouse_debug_console will be
renamed to jailhouse_console.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
driver/main.c | 16 ++++++++--------
hypervisor/include/jailhouse/header.h | 2 +-
hypervisor/include/jailhouse/printk.h | 2 +-
hypervisor/printk.c | 2 +-
4 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/driver/main.c b/driver/main.c
index 7b89425d..cb889694 100644
--- a/driver/main.c
+++ b/driver/main.c
@@ -94,7 +94,7 @@ static struct device *jailhouse_dev;
static unsigned long hv_core_and_percpu_size;
static atomic_t call_done;
static int error_code;
-static struct jailhouse_console* volatile console_page;
+static struct jailhouse_ringbuf* volatile console_page;
static bool console_available;
static struct resource *hypervisor_mem_res;

@@ -124,7 +124,7 @@ static typeof(__hyp_stub_vectors) *__hyp_stub_vectors_sym;
static struct {
bool valid;
unsigned int id;
- struct jailhouse_console page;
+ struct jailhouse_ringbuf page;
} last_console;

#ifdef CONFIG_X86
@@ -140,7 +140,7 @@ static void init_hypercall(void)
}
#endif

-static void copy_console_page(struct jailhouse_console *dst)
+static void copy_console_page(struct jailhouse_ringbuf *dst)
{
unsigned int tail;

@@ -152,7 +152,7 @@ static void copy_console_page(struct jailhouse_console *dst)
rmb();

/* copy console page */
- memcpy(dst, console_page, sizeof(struct jailhouse_console));
+ memcpy(dst, console_page, sizeof(struct jailhouse_ringbuf));
rmb();
} while (console_page->tail != tail || console_page->busy);
}
@@ -258,7 +258,7 @@ static inline const char * jailhouse_get_fw_name(void)
#endif
}

-static int __jailhouse_console_dump_delta(struct jailhouse_console *console,
+static int __jailhouse_console_dump_delta(struct jailhouse_ringbuf *console,
char *dst, unsigned int head,
unsigned int *miss)
{
@@ -312,7 +312,7 @@ int jailhouse_console_dump_delta(char *dst, unsigned int head,
unsigned int *miss)
{
int ret;
- struct jailhouse_console *console;
+ struct jailhouse_ringbuf *console;

if (!jailhouse_enabled)
return -EAGAIN;
@@ -320,7 +320,7 @@ int jailhouse_console_dump_delta(char *dst, unsigned int head,
if (!console_available)
return -EPERM;

- console = kmalloc(sizeof(struct jailhouse_console), GFP_KERNEL);
+ console = kmalloc(sizeof(struct jailhouse_ringbuf), GFP_KERNEL);
if (console == NULL)
return -ENOMEM;

@@ -458,7 +458,7 @@ static int jailhouse_cmd_enable(struct jailhouse_system __user *arg)
goto error_release_memreg;
}

- console_page = (struct jailhouse_console*)
+ console_page = (struct jailhouse_ringbuf*)
(hypervisor_mem + header->console_page);
last_console.valid = false;

diff --git a/hypervisor/include/jailhouse/header.h b/hypervisor/include/jailhouse/header.h
index 45c69ea9..57d257f8 100644
--- a/hypervisor/include/jailhouse/header.h
+++ b/hypervisor/include/jailhouse/header.h
@@ -31,7 +31,7 @@
*/
typedef int (*jailhouse_entry)(unsigned int);

-struct jailhouse_console {
+struct jailhouse_ringbuf {
unsigned int busy;
unsigned int tail;
/* current implementation requires the size of the content to be a
diff --git a/hypervisor/include/jailhouse/printk.h b/hypervisor/include/jailhouse/printk.h
index e775e975..2c03e0ab 100644
--- a/hypervisor/include/jailhouse/printk.h
+++ b/hypervisor/include/jailhouse/printk.h
@@ -29,4 +29,4 @@ void arch_dbg_write_init(void);
extern void (*arch_dbg_write)(const char *msg);

extern bool virtual_console;
-extern volatile struct jailhouse_console console;
+extern volatile struct jailhouse_ringbuf console;
diff --git a/hypervisor/printk.c b/hypervisor/printk.c
index 1cc35510..631afb1e 100644
--- a/hypervisor/printk.c
+++ b/hypervisor/printk.c
@@ -19,7 +19,7 @@
#include <asm/spinlock.h>

bool virtual_console = false;
-volatile struct jailhouse_console console __attribute__((section(".console")));
+volatile struct jailhouse_ringbuf console __attribute__((section(".console")));

static DEFINE_SPINLOCK(printk_lock);

--
2.17.0

Ralf Ramsauer

unread,
May 14, 2018, 8:19:21 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
We need this accessor for reading GIC's TYPER.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
inmates/lib/arm-common/include/inmate.h | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/inmates/lib/arm-common/include/inmate.h b/inmates/lib/arm-common/include/inmate.h
index 1fe3c849..865ef3a2 100644
--- a/inmates/lib/arm-common/include/inmate.h
+++ b/inmates/lib/arm-common/include/inmate.h
@@ -84,6 +84,11 @@ static inline void mmio_write32(void *address, u32 value)
*(volatile u32 *)address = value;
}

+static inline u64 mmio_read64(void *address)
+{
+ return *(volatile u64 *)address;
+}
+
static inline void cpu_relax(void)
{
asm volatile("" : : : "memory");
--
2.17.0

Ralf Ramsauer

unread,
May 14, 2018, 8:19:21 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
Everything is now in place, inmates are only missing the semantics of
struct jailhouse_console.

But this can be done easily by extending struct uart by a matching .flag
field that corresponds to jailhouse_console's .flag.

Passing con-type (et. al.) as inmate command line argument can still
override the configuration.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
inmates/lib/arm-common/include/uart.h | 4 +++-
inmates/lib/arm-common/printk.c | 27 ++++++++-----------------
inmates/lib/arm-common/uart-8250-8.c | 5 ++++-
inmates/lib/arm-common/uart-8250.c | 5 ++++-
inmates/lib/arm-common/uart-hscif.c | 5 ++++-
inmates/lib/arm-common/uart-imx.c | 5 ++++-
inmates/lib/arm-common/uart-jailhouse.c | 2 +-
inmates/lib/arm-common/uart-mvebu.c | 5 ++++-
inmates/lib/arm-common/uart-pl011.c | 5 ++++-
inmates/lib/arm-common/uart-scifa.c | 5 ++++-
inmates/lib/arm-common/uart-xuartps.c | 5 ++++-
11 files changed, 44 insertions(+), 29 deletions(-)

diff --git a/inmates/lib/arm-common/include/uart.h b/inmates/lib/arm-common/include/uart.h
index 25eaef5a..7b01cbd8 100644
--- a/inmates/lib/arm-common/include/uart.h
+++ b/inmates/lib/arm-common/include/uart.h
@@ -38,6 +38,7 @@

struct uart_chip {
const char *name;
+ const __u32 flags;

void *base;

@@ -59,9 +60,10 @@ extern struct uart_chip *uart_array[];
#define DECLARE_UART(__name) \
extern struct uart_chip UART_OPS_NAME(__name)

-#define DEFINE_UART(__name, __description) \
+#define DEFINE_UART(__name, __description, __flags) \
struct uart_chip UART_OPS_NAME(__name) = { \
.name = __description, \
+ .flags = __flags, \
.init = uart_##__name##_init, \
.is_busy = uart_##__name##_is_busy, \
.write = uart_##__name##_write, \
diff --git a/inmates/lib/arm-common/printk.c b/inmates/lib/arm-common/printk.c
index 3c4d6211..0b3f0a70 100644
--- a/inmates/lib/arm-common/printk.c
+++ b/inmates/lib/arm-common/printk.c
@@ -39,19 +39,6 @@
#include <inmate.h>
#include <stdarg.h>
#include <uart.h>
-#include <mach.h>
-
-#ifndef CON_DIVIDER
-#define CON_DIVIDER 0
-#endif
-
-#ifndef CON_CLOCK_REG
-#define CON_CLOCK_REG 0
-#endif
-
-#ifndef CON_GATE_NR
-#define CON_GATE_NR 0
-#endif

#define UART_IDLE_LOOPS 100

@@ -77,14 +64,16 @@ static void console_write(const char *msg)

static void console_init(void)
{
+ struct jailhouse_console *console = &comm_region->console;
struct uart_chip **c;
char buf[32];
const char *type;
unsigned int n;

- type = cmdline_parse_str("con-type", buf, sizeof(buf), CON_TYPE);
+ type = cmdline_parse_str("con-type", buf, sizeof(buf), "");
for (c = uart_array; *c; c++)
- if (!strcmp(type, (*c)->name)) {
+ if (!strcmp(type, (*c)->name) ||
+ (!*type && console->flags == (*c)->flags)) {
chip = *c;
break;
}
@@ -93,11 +82,11 @@ static void console_init(void)
return;

chip->base = (void *)(unsigned long)
- cmdline_parse_int("con-base", CON_BASE);
- chip->divider = cmdline_parse_int("con-divider", CON_DIVIDER);
- chip->gate_nr = cmdline_parse_int("con-gate-nr", CON_GATE_NR);
+ cmdline_parse_int("con-base", console->address);
+ chip->divider = cmdline_parse_int("con-divider", console->divider);
+ chip->gate_nr = cmdline_parse_int("con-gate-nr", console->gate_nr);
chip->clock_reg = (void *)(unsigned long)
- cmdline_parse_int("con-clock-reg", CON_CLOCK_REG);
+ cmdline_parse_int("con-clock-reg", console->clock_reg);

chip->init(chip);

diff --git a/inmates/lib/arm-common/uart-8250-8.c b/inmates/lib/arm-common/uart-8250-8.c
index a109848d..36a0f5c4 100644
--- a/inmates/lib/arm-common/uart-8250-8.c
+++ b/inmates/lib/arm-common/uart-8250-8.c
@@ -75,4 +75,7 @@ static void uart_8250_8_write(struct uart_chip *chip, char c)
mmio_write8(chip->base + UART_TX, c);
}

-DEFINE_UART(8250_8, "8250-8");
+DEFINE_UART(8250_8, "8250-8",
+ JAILHOUSE_CON1_TYPE_8250 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_1);
diff --git a/inmates/lib/arm-common/uart-8250.c b/inmates/lib/arm-common/uart-8250.c
index a0d97281..71b51a05 100644
--- a/inmates/lib/arm-common/uart-8250.c
+++ b/inmates/lib/arm-common/uart-8250.c
@@ -75,4 +75,7 @@ static void uart_8250_write(struct uart_chip *chip, char c)
mmio_write32(chip->base + UART_TX, c);
}

-DEFINE_UART(8250, "8250");
+DEFINE_UART(8250, "8250",
+ JAILHOUSE_CON1_TYPE_8250 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4);
diff --git a/inmates/lib/arm-common/uart-hscif.c b/inmates/lib/arm-common/uart-hscif.c
index c3c9aadb..80eb9076 100644
--- a/inmates/lib/arm-common/uart-hscif.c
+++ b/inmates/lib/arm-common/uart-hscif.c
@@ -80,4 +80,7 @@ static void uart_hscif_write(struct uart_chip *chip, char c)
~(HSCIF_HSFSR_TDFE | HSCIF_HSFSR_TEND));
}

-DEFINE_UART(hscif, "HSCIF");
+DEFINE_UART(hscif, "HSCIF",
+ JAILHOUSE_CON1_TYPE_HSCIF |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4);
diff --git a/inmates/lib/arm-common/uart-imx.c b/inmates/lib/arm-common/uart-imx.c
index 88db0813..2d03bc4f 100644
--- a/inmates/lib/arm-common/uart-imx.c
+++ b/inmates/lib/arm-common/uart-imx.c
@@ -56,4 +56,7 @@ static void uart_imx_write(struct uart_chip *chip, char c)
mmio_write32(chip->base + UTXD, c);
}

-DEFINE_UART(imx, "IMX");
+DEFINE_UART(imx, "IMX",
+ JAILHOUSE_CON1_TYPE_IMX |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4);
diff --git a/inmates/lib/arm-common/uart-jailhouse.c b/inmates/lib/arm-common/uart-jailhouse.c
index 096ae85b..fbe009e6 100644
--- a/inmates/lib/arm-common/uart-jailhouse.c
+++ b/inmates/lib/arm-common/uart-jailhouse.c
@@ -53,4 +53,4 @@ static void uart_jailhouse_write(struct uart_chip *chip, char c)
jailhouse_call_arg1(JAILHOUSE_HC_DEBUG_CONSOLE_PUTC, c);
}

-DEFINE_UART(jailhouse, "JAILHOUSE");
+DEFINE_UART(jailhouse, "JAILHOUSE", JAILHOUSE_CON2_TYPE_ROOTPAGE);
diff --git a/inmates/lib/arm-common/uart-mvebu.c b/inmates/lib/arm-common/uart-mvebu.c
index c40b42eb..3fb4c830 100644
--- a/inmates/lib/arm-common/uart-mvebu.c
+++ b/inmates/lib/arm-common/uart-mvebu.c
@@ -57,4 +57,7 @@ static void uart_mvebu_write(struct uart_chip *chip, char c)
mmio_write32(chip->base + UART_TSH, c);
}

-DEFINE_UART(mvebu, "MVEBU");
+DEFINE_UART(mvebu, "MVEBU",
+ JAILHOUSE_CON1_TYPE_MVEBU |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4);
diff --git a/inmates/lib/arm-common/uart-pl011.c b/inmates/lib/arm-common/uart-pl011.c
index 3bbf0f94..a84e30da 100644
--- a/inmates/lib/arm-common/uart-pl011.c
+++ b/inmates/lib/arm-common/uart-pl011.c
@@ -88,4 +88,7 @@ static void uart_pl011_write(struct uart_chip *chip, char c)
mmio_write32(chip->base + UARTDR, c);
}

-DEFINE_UART(pl011, "PL011");
+DEFINE_UART(pl011, "PL011",
+ JAILHOUSE_CON1_TYPE_PL011 |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4);
diff --git a/inmates/lib/arm-common/uart-scifa.c b/inmates/lib/arm-common/uart-scifa.c
index 9d7939c4..36d80aa5 100644
--- a/inmates/lib/arm-common/uart-scifa.c
+++ b/inmates/lib/arm-common/uart-scifa.c
@@ -81,4 +81,7 @@ static void uart_scifa_write(struct uart_chip *chip, char c)
~(SCIFA_SCASSR_TDFE | SCIFA_SCASSR_TEND));
}

-DEFINE_UART(scifa, "SCIFA");
+DEFINE_UART(scifa, "SCIFA",
+ JAILHOUSE_CON1_TYPE_SCIFA |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4);
diff --git a/inmates/lib/arm-common/uart-xuartps.c b/inmates/lib/arm-common/uart-xuartps.c
index 92de9ddd..f82af76a 100644
--- a/inmates/lib/arm-common/uart-xuartps.c
+++ b/inmates/lib/arm-common/uart-xuartps.c
@@ -57,4 +57,7 @@ static void uart_xuartps_write(struct uart_chip *chip, char c)
mmio_write32(chip->base + UART_FIFO, c);
}

-DEFINE_UART(xuartps, "XUARTPS");
+DEFINE_UART(xuartps, "XUARTPS",
+ JAILHOUSE_CON1_TYPE_XUARTPS |
+ JAILHOUSE_CON1_ACCESS_MMIO |
+ JAILHOUSE_CON1_REGDIST_4);
--
2.17.0

Ralf Ramsauer

unread,
May 14, 2018, 8:19:21 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
As mentioned before, copy the console to the communication region. Now
the inmates is able to take the console definition from there, without
having the need to define everything statically in mach.h

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
hypervisor/control.c | 1 +
include/jailhouse/hypercall.h | 6 +++++-
2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/hypervisor/control.c b/hypervisor/control.c
index 1025852f..7d320841 100644
--- a/hypervisor/control.c
+++ b/hypervisor/control.c
@@ -481,6 +481,7 @@ static int cell_create(struct per_cpu *cpu_data, unsigned long config_address)
sizeof(comm_region->signature));
comm_region->revision = COMM_REGION_ABI_REVISION;
comm_region->cell_state = JAILHOUSE_CELL_SHUT_DOWN;
+ comm_region->console = cell->config->console;

last = &root_cell;
while (last->next)
diff --git a/include/jailhouse/hypercall.h b/include/jailhouse/hypercall.h
index 8d53be9e..c813c47e 100644
--- a/include/jailhouse/hypercall.h
+++ b/include/jailhouse/hypercall.h
@@ -39,6 +39,8 @@
#ifndef _JAILHOUSE_HYPERCALL_H
#define _JAILHOUSE_HYPERCALL_H

+#include <jailhouse/console.h>
+
#define JAILHOUSE_HC_DISABLE 0
#define JAILHOUSE_HC_CELL_CREATE 1
#define JAILHOUSE_HC_CELL_START 2
@@ -106,7 +108,9 @@
volatile __u32 reply_from_cell; \
/** \privatesection */ \
volatile __u32 padding; \
- /** \publicsection */
+ /** \publicsection */ \
+ /** Debug console that may be accessed by the inmate */ \
+ struct jailhouse_console console;

#include <asm/jailhouse_hypercall.h>

--
2.17.0

Ralf Ramsauer

unread,
May 14, 2018, 8:19:21 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
On x86, we already use the communication region to pass platform
specific information.

On ARM, the version and location of the GIC is such an information. Use
the communication region to pass the location of GIC registers.

As this is a arm-common information, introduce
arm-common/asm/jailhouse_hypercall.h

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
hypervisor/arch/arm-common/control.c | 8 ++++
.../arch/arm-common/asm/jailhouse_hypercall.h | 43 +++++++++++++++++++
include/arch/arm/asm/jailhouse_hypercall.h | 3 ++
include/arch/arm64/asm/jailhouse_hypercall.h | 3 ++
4 files changed, 57 insertions(+)
create mode 100644 include/arch/arm-common/asm/jailhouse_hypercall.h

diff --git a/hypervisor/arch/arm-common/control.c b/hypervisor/arch/arm-common/control.c
index 9bf7e895..8b247ee1 100644
--- a/hypervisor/arch/arm-common/control.c
+++ b/hypervisor/arch/arm-common/control.c
@@ -195,6 +195,14 @@ bool arch_handle_phys_irq(struct per_cpu *cpu_data, u32 irqn,

int arch_cell_create(struct cell *cell)
{
+ struct jailhouse_comm_region *comm_region =
+ &cell->comm_page.comm_region;
+
+ comm_region->gic_version = system_config->platform_info.arm.gic_version;
+ comm_region->gicd_base = system_config->platform_info.arm.gicd_base;
+ comm_region->gicc_base = system_config->platform_info.arm.gicc_base;
+ comm_region->gicr_base = system_config->platform_info.arm.gicr_base;
+
return arm_paging_cell_init(cell);
}

diff --git a/include/arch/arm-common/asm/jailhouse_hypercall.h b/include/arch/arm-common/asm/jailhouse_hypercall.h
new file mode 100644
index 00000000..a4fb1360
--- /dev/null
+++ b/include/arch/arm-common/asm/jailhouse_hypercall.h
@@ -0,0 +1,43 @@
+#define COMM_REGION_COMMON_PLATFORM_INFO \
+ __u8 gic_version; \
+ __u64 gicd_base; \
+ __u64 gicc_base; \
+ __u64 gicr_base;
diff --git a/include/arch/arm/asm/jailhouse_hypercall.h b/include/arch/arm/asm/jailhouse_hypercall.h
index e4eca625..7b00f873 100644
--- a/include/arch/arm/asm/jailhouse_hypercall.h
+++ b/include/arch/arm/asm/jailhouse_hypercall.h
@@ -36,6 +36,8 @@
* THE POSSIBILITY OF SUCH DAMAGE.
*/

+#include "../arm-common/asm/jailhouse_hypercall.h"
+
#define JAILHOUSE_HVC_CODE 0x4a48

#define JAILHOUSE_CALL_INS ".arch_extension virt\n\t" \
@@ -56,6 +58,7 @@

struct jailhouse_comm_region {
COMM_REGION_GENERIC_HEADER;
+ COMM_REGION_COMMON_PLATFORM_INFO;
};

static inline __u32 jailhouse_call(__u32 num)
diff --git a/include/arch/arm64/asm/jailhouse_hypercall.h b/include/arch/arm64/asm/jailhouse_hypercall.h
index 86ce6716..5994e1a0 100644
--- a/include/arch/arm64/asm/jailhouse_hypercall.h
+++ b/include/arch/arm64/asm/jailhouse_hypercall.h
@@ -36,6 +36,8 @@
* THE POSSIBILITY OF SUCH DAMAGE.
*/

+#include "../arm-common/asm/jailhouse_hypercall.h"
+
#define JAILHOUSE_HVC_CODE 0x4a48

#define JAILHOUSE_CALL_INS "hvc #0x4a48"
@@ -54,6 +56,7 @@

struct jailhouse_comm_region {
COMM_REGION_GENERIC_HEADER;
+ COMM_REGION_COMMON_PLATFORM_INFO;
};

static inline __u64 jailhouse_call(__u64 num)
--
2.17.0

Ralf Ramsauer

unread,
May 14, 2018, 8:19:21 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
We will need this for determining the GIC redistributor for GICv3.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
inmates/lib/arm/include/asm/sysregs.h | 9 +++++++++
inmates/lib/arm64/include/asm/sysregs.h | 10 ++++++++++
2 files changed, 19 insertions(+)

diff --git a/inmates/lib/arm/include/asm/sysregs.h b/inmates/lib/arm/include/asm/sysregs.h
index 7c285923..81cc003f 100644
--- a/inmates/lib/arm/include/asm/sysregs.h
+++ b/inmates/lib/arm/include/asm/sysregs.h
@@ -45,6 +45,15 @@
#define CNTV_CTL_EL0 SYSREG_32(0, c14, c3, 1)
#define CNTPCT_EL0 SYSREG_64(0, c14)

+#define MPIDR_EL1 SYSREG_32(0, c0, c0, 5)
+
+#define MPIDR_LEVEL_BITS 8
+#define MPIDR_LEVEL_MASK ((1 << MPIDR_LEVEL_BITS) - 1)
+#define MPIDR_LEVEL_SHIFT(level) (MPIDR_LEVEL_BITS * (level))
+
+#define MPIDR_AFFINITY_LEVEL(mpidr, level) \
+ (((mpidr) >> (MPIDR_LEVEL_BITS * (level))) & MPIDR_LEVEL_MASK)
+
#define SYSREG_32(...) 32, __VA_ARGS__
#define SYSREG_64(...) 64, __VA_ARGS__

diff --git a/inmates/lib/arm64/include/asm/sysregs.h b/inmates/lib/arm64/include/asm/sysregs.h
index 0caea891..5661f540 100644
--- a/inmates/lib/arm64/include/asm/sysregs.h
+++ b/inmates/lib/arm64/include/asm/sysregs.h
@@ -44,6 +44,16 @@
#define __stringify_1(x...) #x
#define __stringify(x...) __stringify_1(x)

+#define MPIDR_LEVEL_BITS_SHIFT 3
+#define MPIDR_LEVEL_BITS (1 << MPIDR_LEVEL_BITS_SHIFT)
+#define MPIDR_LEVEL_MASK ((1 << MPIDR_LEVEL_BITS) - 1)
+
+#define MPIDR_LEVEL_SHIFT(level) \
+ (((1 << (level)) >> 1) << MPIDR_LEVEL_BITS_SHIFT)
+
+#define MPIDR_AFFINITY_LEVEL(mpidr, level) \
+ (((mpidr) >> MPIDR_LEVEL_SHIFT(level)) & MPIDR_LEVEL_MASK)
+
#define SYSREG_32(op1, crn, crm, op2) s3_##op1 ##_##crn ##_##crm ##_##op2

#define arm_write_sysreg(sysreg, val) \
--
2.17.0

Ralf Ramsauer

unread,
May 14, 2018, 8:19:22 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
inmates/lib/arm-common/gic-v2.c | 5 -----
inmates/lib/arm-common/gic-v3.c | 5 -----
inmates/lib/arm-common/gic.c | 15 +++++++++++----
inmates/lib/arm-common/include/gic.h | 2 --
4 files changed, 11 insertions(+), 16 deletions(-)

diff --git a/inmates/lib/arm-common/gic-v2.c b/inmates/lib/arm-common/gic-v2.c
index ab85fd27..51066fa9 100644
--- a/inmates/lib/arm-common/gic-v2.c
+++ b/inmates/lib/arm-common/gic-v2.c
@@ -36,7 +36,6 @@
* THE POSSIBILITY OF SUCH DAMAGE.
*/

-#include <mach.h>
#include <gic.h>

#define GICC_CTLR 0x0000
@@ -87,7 +86,3 @@ const struct gic gic_v2 = {
.write_eoi = gic_v2_write_eoi,
.read_ack = gic_v2_read_ack,
};
-
-#if GIC_VERSION == 2
-extern const struct gic gic __attribute__((alias("gic_v2")));
-#endif
diff --git a/inmates/lib/arm-common/gic-v3.c b/inmates/lib/arm-common/gic-v3.c
index 530374c6..7ae2ac82 100644
--- a/inmates/lib/arm-common/gic-v3.c
+++ b/inmates/lib/arm-common/gic-v3.c
@@ -37,7 +37,6 @@
*/

#include <asm/sysregs.h>
-#include <mach.h>
#include <gic.h>

static void *gicd_v3_base;
@@ -132,7 +131,3 @@ const struct gic gic_v3 = {
.write_eoi = gic_v3_write_eoi,
.read_ack = gic_v3_read_ack,
};
-
-#if GIC_VERSION == 3
-extern const struct gic gic __attribute__((alias("gic_v3")));
-#endif
diff --git a/inmates/lib/arm-common/gic.c b/inmates/lib/arm-common/gic.c
index 4c7a884f..405984f9 100644
--- a/inmates/lib/arm-common/gic.c
+++ b/inmates/lib/arm-common/gic.c
@@ -39,7 +39,11 @@
#include <inmate.h>
#include <gic.h>

+extern const struct gic gic_v2;
+extern const struct gic gic_v3;
+
static irq_handler_t irq_handler = (irq_handler_t)NULL;
+static const struct gic *gic = &gic_v2;

/* Replaces the weak reference in header.S */
void vector_irq(void)
@@ -47,20 +51,23 @@ void vector_irq(void)
u32 irqn;

while (1) {
- irqn = gic.read_ack();
+ irqn = gic->read_ack();
if (irqn == 0x3ff)
break;

if (irq_handler)
irq_handler(irqn);

- gic.write_eoi(irqn);
+ gic->write_eoi(irqn);
}
}

void gic_setup(irq_handler_t handler)
{
- gic.init();
+ if (comm_region->gic_version == 3)
+ gic = &gic_v3;
+
+ gic->init();

irq_handler = handler;

@@ -69,5 +76,5 @@ void gic_setup(irq_handler_t handler)

void gic_enable_irq(unsigned int irq)
{
- gic.enable(irq);
+ gic->enable(irq);
}
diff --git a/inmates/lib/arm-common/include/gic.h b/inmates/lib/arm-common/include/gic.h
index c96227b4..d1977af6 100644
--- a/inmates/lib/arm-common/include/gic.h
+++ b/inmates/lib/arm-common/include/gic.h
@@ -55,8 +55,6 @@ struct gic {
u32 (*read_ack)(void);
};

-extern const struct gic gic;
-
#endif /* !__ASSEMBLY__ */

#include <arch/gic.h>
--
2.17.0

Ralf Ramsauer

unread,
May 14, 2018, 8:19:22 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
Getting GICv3's redistributor might look a bit clumsy, but we will need
those stubs as soon as we allow to kick secondary CPUs on ARM via PSCI.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
inmates/lib/arm-common/gic-v2.c | 23 +++++++--------
inmates/lib/arm-common/gic-v3.c | 50 +++++++++++++++++++++++++++++----
2 files changed, 56 insertions(+), 17 deletions(-)

diff --git a/inmates/lib/arm-common/gic-v2.c b/inmates/lib/arm-common/gic-v2.c
index e2c271c3..ab85fd27 100644
--- a/inmates/lib/arm-common/gic-v2.c
+++ b/inmates/lib/arm-common/gic-v2.c
@@ -39,11 +39,6 @@
#include <mach.h>
#include <gic.h>

-#ifndef GICD_V2_BASE
-#define GICD_V2_BASE ((void *)-1)
-#define GICC_V2_BASE ((void *)-1)
-#endif
-
#define GICC_CTLR 0x0000
#define GICC_PMR 0x0004
#define GICC_IAR 0x000c
@@ -55,29 +50,35 @@

#define GICC_PMR_DEFAULT 0xf0

+static void *gicc_v2_base;
+static void *gicd_v2_base;
+
static void gic_v2_enable(unsigned int irqn)
{
- mmio_write32(GICD_V2_BASE + GICD_ISENABLER + ((irqn >> 3) & ~0x3),
+ mmio_write32(gicd_v2_base + GICD_ISENABLER + ((irqn >> 3) & ~0x3),
1 << (irqn & 0x1f));
}

static int gic_v2_init(void)
{
- mmio_write32(GICC_V2_BASE + GICC_CTLR, GICC_CTLR_GRPEN1);
- mmio_write32(GICC_V2_BASE + GICC_PMR, GICC_PMR_DEFAULT);
- mmio_write32(GICD_V2_BASE + GICD_CTLR, GICD_CTLR_ENABLE);
+ gicc_v2_base = (void*)(unsigned long)comm_region->gicc_base;
+ gicd_v2_base = (void*)(unsigned long)comm_region->gicd_base;
+
+ mmio_write32(gicc_v2_base + GICC_CTLR, GICC_CTLR_GRPEN1);
+ mmio_write32(gicc_v2_base + GICC_PMR, GICC_PMR_DEFAULT);
+ mmio_write32(gicd_v2_base + GICD_CTLR, GICD_CTLR_ENABLE);

return 0;
}

static void gic_v2_write_eoi(u32 irqn)
{
- mmio_write32(GICC_V2_BASE + GICC_EOIR, irqn);
+ mmio_write32(gicc_v2_base + GICC_EOIR, irqn);
}

static u32 gic_v2_read_ack(void)
{
- return mmio_read32(GICC_V2_BASE + GICC_IAR) & 0x3ff;
+ return mmio_read32(gicc_v2_base + GICC_IAR) & 0x3ff;
}

const struct gic gic_v2 = {
diff --git a/inmates/lib/arm-common/gic-v3.c b/inmates/lib/arm-common/gic-v3.c
index f9278f71..530374c6 100644
--- a/inmates/lib/arm-common/gic-v3.c
+++ b/inmates/lib/arm-common/gic-v3.c
@@ -40,14 +40,18 @@
#include <mach.h>
#include <gic.h>

-#ifndef GICD_V3_BASE
-#define GICD_V3_BASE ((void *)-1)
-#define GICR_V3_BASE ((void *)-1)
-#endif
+static void *gicd_v3_base;
+static void *gicr_v3_base;

+#define GICR_TYPER 0x0008
+#define GICR_TYPER_Last (1 << 4)
+#define GICR_PIDR2 0xffe8
#define GICR_SGI_BASE 0x10000
#define GICR_ISENABLER GICD_ISENABLER

+#define GICD_PIDR2_ARCH(pidr) (((pidr) & 0xf0) >> 4)
+#define GICR_PIDR2_ARCH GICD_PIDR2_ARCH
+
#define ICC_IAR1_EL1 SYSREG_32(0, c12, c12, 0)
#define ICC_EOIR1_EL1 SYSREG_32(0, c12, c12, 1)
#define ICC_PMR_EL1 SYSREG_32(0, c4, c6, 0)
@@ -59,15 +63,49 @@
static void gic_v3_enable(unsigned int irqn)
{
if (is_sgi_ppi(irqn))
- mmio_write32(GICR_V3_BASE + GICR_SGI_BASE + GICR_ISENABLER,
+ mmio_write32(gicr_v3_base + GICR_SGI_BASE + GICR_ISENABLER,
1 << irqn);
else if (is_spi(irqn))
- mmio_write32(GICD_V3_BASE + GICD_ISENABLER + irqn / 32,
+ mmio_write32(gicd_v3_base + GICD_ISENABLER + irqn / 32,
1 << (irqn % 32));
}

static int gic_v3_init(void)
{
+ void *redist_addr = (void*)(unsigned long)comm_region->gicr_base;
+ unsigned long mpidr;
+ void *gicr = NULL;
+ u64 typer;
+ u32 pidr, aff;
+
+ gicd_v3_base = (void*)(unsigned long)comm_region->gicd_base;
+
+ arm_read_sysreg(MPIDR_EL1, mpidr);
+ aff = (MPIDR_AFFINITY_LEVEL(mpidr, 3) << 24 |
+ MPIDR_AFFINITY_LEVEL(mpidr, 2) << 16 |
+ MPIDR_AFFINITY_LEVEL(mpidr, 1) << 8 |
+ MPIDR_AFFINITY_LEVEL(mpidr, 0));
+
+ /* Find redistributor */
+ do {
+ pidr = mmio_read32(redist_addr + GICR_PIDR2);
+ if (GICR_PIDR2_ARCH(pidr) != 3)
+ break;
+
+ typer = mmio_read64(redist_addr + GICR_TYPER);
+ if ((typer >> 32) == aff) {
+ gicr = redist_addr;
+ break;
+ }
+
+ redist_addr += 0x20000;
+ } while (!(typer & GICR_TYPER_Last));
+
+ if (!gicr)
+ return -1;
+
+ gicr_v3_base = gicr;
+
arm_write_sysreg(ICC_CTLR_EL1, 0);
arm_write_sysreg(ICC_PMR_EL1, 0xf0);
arm_write_sysreg(ICC_IGRPEN1_EL1, ICC_IGRPEN1_EN);
--
2.17.0

Ralf Ramsauer

unread,
May 14, 2018, 8:19:22 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
inmates/demos/arm/gic-demo.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/inmates/demos/arm/gic-demo.c b/inmates/demos/arm/gic-demo.c
index dbe48646..084ddc5e 100644
--- a/inmates/demos/arm/gic-demo.c
+++ b/inmates/demos/arm/gic-demo.c
@@ -12,7 +12,6 @@
* the COPYING file in the top-level directory.
*/

-#include <mach.h>
#include <inmate.h>

#define BEATS_PER_SEC 10
@@ -33,7 +32,7 @@ static void handle_IRQ(unsigned int irqn)
static u64 min_delta = ~0ULL, max_delta = 0;
u64 delta;

- if (irqn != TIMER_IRQ)
+ if (irqn != comm_region->timer_irq)
return;

delta = timer_get_ticks() - expected_ticks;
@@ -58,7 +57,7 @@ void inmate_main(void)
{
printk("Initializing the GIC...\n");
gic_setup(handle_IRQ);
- gic_enable_irq(TIMER_IRQ);
+ gic_enable_irq(comm_region->timer_irq);

printk("Initializing the timer...\n");
ticks_per_beat = timer_get_frequency() / BEATS_PER_SEC;
--
2.17.0

Ralf Ramsauer

unread,
May 14, 2018, 8:19:23 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
Header format changed. Increase the revision and align the tools.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
include/jailhouse/cell-config.h | 2 +-
tools/jailhouse-cell-linux | 4 ++--
tools/jailhouse-hardware-check | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/jailhouse/cell-config.h b/include/jailhouse/cell-config.h
index f06a334b..1745e1cc 100644
--- a/include/jailhouse/cell-config.h
+++ b/include/jailhouse/cell-config.h
@@ -45,7 +45,7 @@
* Incremented on any layout or semantic change of system or cell config.
* Also update HEADER_REVISION in tools.
*/
-#define JAILHOUSE_CONFIG_REVISION 9
+#define JAILHOUSE_CONFIG_REVISION 10

#define JAILHOUSE_CELL_NAME_MAXLEN 31

diff --git a/tools/jailhouse-cell-linux b/tools/jailhouse-cell-linux
index df9b9212..a2eb8dd0 100755
--- a/tools/jailhouse-cell-linux
+++ b/tools/jailhouse-cell-linux
@@ -565,8 +565,8 @@ class Irqchip:


class Config:
- _HEADER_FORMAT = '6sH32s4xIIIIIIIIIQ8x'
- _HEADER_REVISION = 9
+ _HEADER_FORMAT = '6sH32s4xIIIIIIIIIQ8x32x'
+ _HEADER_REVISION = 10

def __init__(self, config_file):
self.data = config_file.read()
diff --git a/tools/jailhouse-hardware-check b/tools/jailhouse-hardware-check
index 0ed119b3..9e7802fd 100755
--- a/tools/jailhouse-hardware-check
+++ b/tools/jailhouse-hardware-check
@@ -114,7 +114,7 @@ class Sysconfig:
X86_MAX_IOMMU_UNITS = 8
X86_IOMMU_SIZE = 20

- HEADER_REVISION = 9
+ HEADER_REVISION = 10
HEADER_FORMAT = '6sH'

def __init__(self, path):
--
2.17.0

Ralf Ramsauer

unread,
May 14, 2018, 8:19:23 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
We changed the ABI of the comm_region, so increase the ABI revision.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
include/jailhouse/hypercall.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/jailhouse/hypercall.h b/include/jailhouse/hypercall.h
index c813c47e..100d0606 100644
--- a/include/jailhouse/hypercall.h
+++ b/include/jailhouse/hypercall.h
@@ -92,7 +92,7 @@
#define JAILHOUSE_CELL_FAILED 3 /* terminal state */
#define JAILHOUSE_CELL_FAILED_COMM_REV 4 /* terminal state */

-#define COMM_REGION_ABI_REVISION 0
+#define COMM_REGION_ABI_REVISION 1
#define COMM_REGION_MAGIC "JHCOMM"

#define COMM_REGION_GENERIC_HEADER \
--
2.17.0

Ralf Ramsauer

unread,
May 14, 2018, 8:19:23 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
The timer irq number is also platform specific information. Store it in
the cell config and pass it to the communication region.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
configs/arm/bananapi.c | 1 +
configs/arm/emtrion-rzg1e.c | 1 +
configs/arm/emtrion-rzg1h.c | 1 +
configs/arm/emtrion-rzg1m.c | 1 +
configs/arm/jetson-tk1.c | 1 +
configs/arm/orangepi0.c | 1 +
configs/arm/vexpress.c | 1 +
configs/arm64/amd-seattle.c | 1 +
configs/arm64/espressobin.c | 1 +
configs/arm64/foundation-v8.c | 1 +
configs/arm64/hikey.c | 1 +
configs/arm64/imx8mq.c | 1 +
configs/arm64/jetson-tx1.c | 1 +
configs/arm64/jetson-tx2.c | 1 +
configs/arm64/qemu-arm64.c | 1 +
configs/arm64/zynqmp-zcu102.c | 1 +
hypervisor/arch/arm-common/control.c | 2 ++
include/arch/arm-common/asm/jailhouse_hypercall.h | 3 ++-
include/jailhouse/cell-config.h | 1 +
19 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/configs/arm/bananapi.c b/configs/arm/bananapi.c
index cb1d8a5e..7a0433eb 100644
--- a/configs/arm/bananapi.c
+++ b/configs/arm/bananapi.c
@@ -53,6 +53,7 @@ struct {
.gich_base = 0x01c84000,
.gicv_base = 0x01c86000,
.maintenance_irq = 25,
+ .timer_irq = 27,
},
},
.root_cell = {
diff --git a/configs/arm/emtrion-rzg1e.c b/configs/arm/emtrion-rzg1e.c
index b32c6935..4290cd7e 100644
--- a/configs/arm/emtrion-rzg1e.c
+++ b/configs/arm/emtrion-rzg1e.c
@@ -54,6 +54,7 @@ struct {
.gich_base = 0xf1004000,
.gicv_base = 0xf1006000,
.maintenance_irq = 25,
+ .timer_irq = 27,
},
},
.root_cell = {
diff --git a/configs/arm/emtrion-rzg1h.c b/configs/arm/emtrion-rzg1h.c
index b0b03065..2056d620 100644
--- a/configs/arm/emtrion-rzg1h.c
+++ b/configs/arm/emtrion-rzg1h.c
@@ -54,6 +54,7 @@ struct {
.gich_base = 0xf1004000,
.gicv_base = 0xf1006000,
.maintenance_irq = 25,
+ .timer_irq = 27,
},
},
.root_cell = {
diff --git a/configs/arm/emtrion-rzg1m.c b/configs/arm/emtrion-rzg1m.c
index 148e2f78..b2f3598c 100644
--- a/configs/arm/emtrion-rzg1m.c
+++ b/configs/arm/emtrion-rzg1m.c
@@ -54,6 +54,7 @@ struct {
.gich_base = 0xf1004000,
.gicv_base = 0xf1006000,
.maintenance_irq = 25,
+ .timer_irq = 27,
},
},
.root_cell = {
diff --git a/configs/arm/jetson-tk1.c b/configs/arm/jetson-tk1.c
index cc781ea8..cdfbe6ad 100644
--- a/configs/arm/jetson-tk1.c
+++ b/configs/arm/jetson-tk1.c
@@ -57,6 +57,7 @@ struct {
.gich_base = 0x50044000,
.gicv_base = 0x50046000,
.maintenance_irq = 25,
+ .timer_irq = 27,
},
},
.root_cell = {
diff --git a/configs/arm/orangepi0.c b/configs/arm/orangepi0.c
index 1e5c0f44..e2481f49 100644
--- a/configs/arm/orangepi0.c
+++ b/configs/arm/orangepi0.c
@@ -50,6 +50,7 @@ struct {
.gich_base = 0x01c84000,
.gicv_base = 0x01c86000,
.maintenance_irq = 25,
+ .timer_irq = 27,
},
},
.root_cell = {
diff --git a/configs/arm/vexpress.c b/configs/arm/vexpress.c
index b1a6a76b..5d3500f5 100644
--- a/configs/arm/vexpress.c
+++ b/configs/arm/vexpress.c
@@ -51,6 +51,7 @@ struct {
.gicv_base = 0x2c006000,
#endif
.maintenance_irq = 25,
+ .timer_irq = 27,
},
.root_cell = {
.name = "VExpress Linux",
diff --git a/configs/arm64/amd-seattle.c b/configs/arm64/amd-seattle.c
index 1f37ec8e..201572a1 100644
--- a/configs/arm64/amd-seattle.c
+++ b/configs/arm64/amd-seattle.c
@@ -49,6 +49,7 @@ struct {
.gich_base = 0xe1140000,
.gicv_base = 0xe116f000,
.maintenance_irq = 25,
+ .timer_irq = 27,
},
},
.root_cell = {
diff --git a/configs/arm64/espressobin.c b/configs/arm64/espressobin.c
index 83a6fee5..47be11e6 100644
--- a/configs/arm64/espressobin.c
+++ b/configs/arm64/espressobin.c
@@ -51,6 +51,7 @@ struct {
.gicd_base = 0xd1d00000,
.gicr_base = 0xd1d40000,
.maintenance_irq = 25,
+ .timer_irq = 27,
},
},
.root_cell = {
diff --git a/configs/arm64/foundation-v8.c b/configs/arm64/foundation-v8.c
index 8e7974a1..ad1dbd58 100644
--- a/configs/arm64/foundation-v8.c
+++ b/configs/arm64/foundation-v8.c
@@ -51,6 +51,7 @@ struct {
.gicv_base = 0x2c006000,
#endif
.maintenance_irq = 25,
+ .timer_irq = 27,
},
.root_cell = {
.name = "foundation-v8",
diff --git a/configs/arm64/hikey.c b/configs/arm64/hikey.c
index 86d677bd..f9d65d50 100644
--- a/configs/arm64/hikey.c
+++ b/configs/arm64/hikey.c
@@ -51,6 +51,7 @@ struct {
.gich_base = 0xf6804000,
.gicv_base = 0xf6806000,
.maintenance_irq = 25,
+ .timer_irq = 27,
},
},
.root_cell = {
diff --git a/configs/arm64/imx8mq.c b/configs/arm64/imx8mq.c
index 608e70b9..2d512198 100644
--- a/configs/arm64/imx8mq.c
+++ b/configs/arm64/imx8mq.c
@@ -44,6 +44,7 @@ struct {
.gicd_base = 0x38800000,
.gicr_base = 0x38880000,
.maintenance_irq = 25,
+ .timer_irq = 27,
},
},
.root_cell = {
diff --git a/configs/arm64/jetson-tx1.c b/configs/arm64/jetson-tx1.c
index a33fb9ca..b1a72c58 100644
--- a/configs/arm64/jetson-tx1.c
+++ b/configs/arm64/jetson-tx1.c
@@ -55,6 +55,7 @@ struct {
.gich_base = 0x50044000,
.gicv_base = 0x50046000,
.maintenance_irq = 25,
+ .timer_irq = 27,
}
},
.root_cell = {
diff --git a/configs/arm64/jetson-tx2.c b/configs/arm64/jetson-tx2.c
index 23503629..dc6871c0 100644
--- a/configs/arm64/jetson-tx2.c
+++ b/configs/arm64/jetson-tx2.c
@@ -53,6 +53,7 @@ struct {
.gicv_base = 0x03886000,
.gic_version = 2,
.maintenance_irq = 25,
+ .timer_irq = 27,
}
},
.root_cell = {
diff --git a/configs/arm64/qemu-arm64.c b/configs/arm64/qemu-arm64.c
index 295a156e..f94c7a34 100644
--- a/configs/arm64/qemu-arm64.c
+++ b/configs/arm64/qemu-arm64.c
@@ -51,6 +51,7 @@ struct {
.gicd_base = 0x08000000,
.gicr_base = 0x080a0000,
.maintenance_irq = 25,
+ .timer_irq = 27,
},
},
.root_cell = {
diff --git a/configs/arm64/zynqmp-zcu102.c b/configs/arm64/zynqmp-zcu102.c
index 9c7d49e2..40dcbff6 100644
--- a/configs/arm64/zynqmp-zcu102.c
+++ b/configs/arm64/zynqmp-zcu102.c
@@ -53,6 +53,7 @@ struct {
.gich_base = 0xf9040000,
.gicv_base = 0xf906f000,
.maintenance_irq = 25,
+ .timer_irq = 27,
},
},
.root_cell = {
diff --git a/hypervisor/arch/arm-common/control.c b/hypervisor/arch/arm-common/control.c
index 8b247ee1..18b52660 100644
--- a/hypervisor/arch/arm-common/control.c
+++ b/hypervisor/arch/arm-common/control.c
@@ -203,6 +203,8 @@ int arch_cell_create(struct cell *cell)
comm_region->gicc_base = system_config->platform_info.arm.gicc_base;
comm_region->gicr_base = system_config->platform_info.arm.gicr_base;

+ comm_region->timer_irq = system_config->platform_info.arm.timer_irq;
+
return arm_paging_cell_init(cell);
}

diff --git a/include/arch/arm-common/asm/jailhouse_hypercall.h b/include/arch/arm-common/asm/jailhouse_hypercall.h
index a4fb1360..5ff81391 100644
--- a/include/arch/arm-common/asm/jailhouse_hypercall.h
+++ b/include/arch/arm-common/asm/jailhouse_hypercall.h
@@ -40,4 +40,5 @@
__u8 gic_version; \
__u64 gicd_base; \
__u64 gicc_base; \
- __u64 gicr_base;
+ __u64 gicr_base; \
+ __u8 timer_irq;
diff --git a/include/jailhouse/cell-config.h b/include/jailhouse/cell-config.h
index 09a45a40..f06a334b 100644
--- a/include/jailhouse/cell-config.h
+++ b/include/jailhouse/cell-config.h
@@ -216,6 +216,7 @@ struct jailhouse_system {
} __attribute__((packed)) x86;
struct {
u8 maintenance_irq;
+ u8 timer_irq;
u8 gic_version;
u64 gicd_base;
u64 gicc_base;
--
2.17.0

Ralf Ramsauer

unread,
May 14, 2018, 8:19:23 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
Et voilĂ , we can delete mach.h.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
inmates/lib/arm/include/mach.h | 116 -----------------------------
inmates/lib/arm64/include/mach.h | 121 -------------------------------
2 files changed, 237 deletions(-)
delete mode 100644 inmates/lib/arm/include/mach.h
delete mode 100644 inmates/lib/arm64/include/mach.h

diff --git a/inmates/lib/arm/include/mach.h b/inmates/lib/arm/include/mach.h
deleted file mode 100644
index a35df626..00000000
--- a/inmates/lib/arm/include/mach.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * Jailhouse, a Linux-based partitioning hypervisor
- *
- * Copyright (c) ARM Limited, 2014
- * Copyright (c) Siemens AG, 2015-2017
- *
- * Authors:
- * Jan Kiszka <jan.k...@siemens.com>
- * Jean-Philippe Brucker <jean-phili...@arm.com>
- *
- * This work is licensed under the terms of the GNU GPL, version 2. See
- * the COPYING file in the top-level directory.
- *
- * Alternatively, you can use or redistribute this file under the following
- * BSD license:
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifdef CONFIG_MACH_JETSON_TK1
-#define CON_TYPE "8250"
-#define CON_BASE 0x70006300 /* UART D on tegra124, exposed to the DB9
- connector of the Jetson TK1 */
-/* Do not enable the clock in the inmate, as enabling the clock requires access
- * to the tegra-car (Clock and Reset Controller) */
-#define CON_CLOCK_REG 0
-#define CON_GATE_NR 0
-
-#define GIC_VERSION 2
-#define GICD_V2_BASE ((void *)0x50041000)
-#define GICC_V2_BASE ((void *)0x50042000)
-
-#elif defined(CONFIG_MACH_BANANAPI)
-#define CON_TYPE "8250"
-#define CON_BASE 0x01c29c00
-#define CON_DIVIDER 0x0d
-
-#define CON_CLOCK_REG 0x01c2006c
-#define CON_GATE_NR 23
-
-#define GIC_VERSION 2
-#define GICD_V2_BASE ((void *)0x01c81000)
-#define GICC_V2_BASE ((void *)0x01c82000)
-
-#elif defined(CONFIG_MACH_EMCON_RZG)
-#define CON_TYPE "HSCIF"
-#define CON_BASE 0xe6ee0000
-#define CON_DIVIDER 0x10
-
-#define CON_CLOCK_REG 0xe615014c
-#define CON_GATE_NR 15
-
-#define GIC_VERSION 2
-#define GICD_V2_BASE ((void *)0xf1001000)
-#define GICC_V2_BASE ((void *)0xf1002000)
-
-#elif defined(CONFIG_MACH_EMCON_RZG1H)
-#define CON_TYPE "SCIFA"
-#define CON_BASE 0xe6c40000
-#define CON_DIVIDER 0x1b
-
-#define CON_CLOCK_REG 0xe6150138
-#define CON_GATE_NR 4
-
-#define GIC_VERSION 2
-#define GICD_V2_BASE ((void *)0xf1001000)
-#define GICC_V2_BASE ((void *)0xf1002000)
-
-#elif defined(CONFIG_MACH_ORANGEPI0)
-#define CON_TYPE "8250"
-#define CON_BASE 0x01c28000
-
-#define GIC_VERSION 2
-#define GICD_V2_BASE ((void *)0x01c81000)
-#define GICC_V2_BASE ((void *)0x01c82000)
-
-#elif defined(CONFIG_MACH_VEXPRESS)
-#define CON_TYPE "PL011"
-#define CON_BASE 0x1c090000
-
-#define GIC_VERSION 2
-#define GICD_V2_BASE ((void *)0x2c001000)
-#define GICC_V2_BASE ((void *)0x2c002000)
-
-/*
-#define GIC_VERSION 3
-#define GICD_V3_BASE ((void *)0x2f000000)
-#define GICR_V3_BASE ((void *)0x2f100000)
-*/
-
-#endif
-
-#ifndef TIMER_IRQ
-#define TIMER_IRQ 27
-#endif
diff --git a/inmates/lib/arm64/include/mach.h b/inmates/lib/arm64/include/mach.h
deleted file mode 100644
index 498843c0..00000000
--- a/inmates/lib/arm64/include/mach.h
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * Jailhouse AArch64 support
- *
- * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH
- * Copyright (c) Siemens AG, 2016-2017
- *
- * Authors:
- * Antonios Motakis <antonios...@huawei.com>
- * Jan Kiszka <jan.k...@siemens.com>
- *
- * This work is licensed under the terms of the GNU GPL, version 2. See
- * the COPYING file in the top-level directory.
- *
- * Alternatively, you can use or redistribute this file under the following
- * BSD license:
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifdef CONFIG_MACH_AMD_SEATTLE
-#define CON_TYPE "PL011"
-#define CON_BASE 0xe1010000
-
-#define GIC_VERSION 2
-#define GICD_V2_BASE ((void *)0xe1110000)
-#define GICC_V2_BASE ((void *)0xe112f000)
-
-#elif defined(CONFIG_MACH_FOUNDATION_V8)
-#define CON_TYPE "PL011"
-#define CON_BASE 0x1c090000
-
-#define GIC_VERSION 2
-#define GICD_V2_BASE ((void *)0x2c001000)
-#define GICC_V2_BASE ((void *)0x2c002000)
-
-#elif defined(CONFIG_MACH_HIKEY)
-#define CON_TYPE "PL011"
-#define CON_BASE 0xf7113000
-
-#define GIC_VERSION 2
-#define GICD_V2_BASE ((void *)0xf6801000)
-#define GICC_V2_BASE ((void *)0xf6802000)
-
-#elif defined(CONFIG_MACH_JETSON_TX1)
-#define CON_TYPE "8250"
-#define CON_BASE 0x70006000
-
-#define GIC_VERSION 2
-#define GICD_V2_BASE ((void *)0x50041000)
-#define GICC_V2_BASE ((void *)0x50042000)
-
-#elif defined(CONFIG_MACH_JETSON_TX2)
-#define CON_TYPE "8250"
-#define CON_BASE 0x3100000
-
-#define GIC_VERSION 2
-#define GICD_V2_BASE ((void *)0x03881000)
-#define GICC_V2_BASE ((void *)0x03882000)
-
-#elif defined(CONFIG_MACH_ZYNQMP_ZCU102)
-#define CON_TYPE "XUARTPS"
-#define CON_BASE 0xff010000
-
-#define GIC_VERSION 2
-#define GICD_V2_BASE ((void *)0xf9010000)
-#define GICC_V2_BASE ((void *)0xf902f000)
-
-#elif defined(CONFIG_MACH_ESPRESSOBIN)
-#define CON_TYPE "MVEBU"
-#define CON_BASE 0xd0012000
-
-#define GIC_VERSION 3
-#define GICD_V3_BASE ((void *)0xd1d00000)
-#define GICR_V3_BASE ((void *)0xd1d60000) /* CPU 1 */
-
-#elif defined(CONFIG_MACH_QEMU_ARM64)
-#define CON_TYPE "PL011"
-#define CON_BASE 0x09000000
-
-#define GIC_VERSION 3
-#define GICD_V3_BASE ((void *)0x08000000)
-#define GICR_V3_BASE ((void *)0x08100000) /* CPU 3 */
-
-#elif defined(CONFIG_MACH_IMX8MQ)
-#define CON_TYPE "IMX-UART"
-#define CON_BASE 0x30860000
-
-#define GIC_VERSION 3
-#define GICD_V3_BASE ((void *)0x38800000)
-/*
- * Note: The GICR_V3_BASE address is core-specific.
- * Address is 0x38880000 + x * 2 * 64K
- */
-#define GICR_V3_BASE ((void *)0x388e0000) /* CPU 3 */
-
-#endif
-
-#ifndef TIMER_IRQ
-#define TIMER_IRQ 27
-#endif
--
2.17.0

Ralf Ramsauer

unread,
May 14, 2018, 8:19:23 AM5/14/18
to jailho...@googlegroups.com, Ralf Ramsauer
ARM inmates are now platform independant. This means, that config.h is
no strict requirement any longer.

Linker scripts for inmates include config.h to get the
CONFIG_INMATE_BASE parameter, if defined. Rather than include config.h
in the linker file, let the compiler include the file if it exists.

Signed-off-by: Ralf Ramsauer <ralf.r...@oth-regensburg.de>
---
inmates/Makefile | 7 ++++---
inmates/lib/arm/inmate.lds.S | 2 --
inmates/lib/arm64/inmate.lds.S | 2 --
3 files changed, 4 insertions(+), 7 deletions(-)

diff --git a/inmates/Makefile b/inmates/Makefile
index c36de629..dd4e8d13 100644
--- a/inmates/Makefile
+++ b/inmates/Makefile
@@ -23,6 +23,10 @@ ifeq ($(subst arm64,arm,$(SRCARCH)),arm)
INCLUDES += -I$(src)/../hypervisor/arch/arm-common/include
endif

+ifneq ($(wildcard $(INC_CONFIG_H)),)
+INCLUDES += -include $(INC_CONFIG_H)
+endif
+
LINUXINCLUDE := $(INCLUDES)
KBUILD_CFLAGS := -g -Os -Wall -Wstrict-prototypes -Wtype-limits \
-Wmissing-declarations -Wmissing-prototypes \
@@ -30,9 +34,6 @@ KBUILD_CFLAGS := -g -Os -Wall -Wstrict-prototypes -Wtype-limits \
-fno-common -fno-stack-protector -ffreestanding \
-ffunction-sections \
-D__LINUX_COMPILER_TYPES_H
-ifneq ($(wildcard $(INC_CONFIG_H)),)
-KBUILD_CFLAGS += -include $(INC_CONFIG_H)
-endif

OBJCOPYFLAGS := -O binary
LDFLAGS += --gc-sections -T
diff --git a/inmates/lib/arm/inmate.lds.S b/inmates/lib/arm/inmate.lds.S
index 6f64b5ed..8f70fbc4 100644
--- a/inmates/lib/arm/inmate.lds.S
+++ b/inmates/lib/arm/inmate.lds.S
@@ -38,8 +38,6 @@
* THE POSSIBILITY OF SUCH DAMAGE.
*/

-#include <jailhouse/config.h>
-
#ifndef CONFIG_INMATE_BASE
#define CONFIG_INMATE_BASE 0x0
#endif
diff --git a/inmates/lib/arm64/inmate.lds.S b/inmates/lib/arm64/inmate.lds.S
index a2db6ac3..71367a3f 100644
--- a/inmates/lib/arm64/inmate.lds.S
+++ b/inmates/lib/arm64/inmate.lds.S
@@ -36,8 +36,6 @@
* THE POSSIBILITY OF SUCH DAMAGE.
*/

-#include <jailhouse/config.h>
-
#ifndef CONFIG_INMATE_BASE
#define CONFIG_INMATE_BASE 0x0
#endif
--
2.17.0

Jan Kiszka

unread,
May 14, 2018, 11:49:19 AM5/14/18
to Ralf Ramsauer, jailho...@googlegroups.com
On 2018-05-14 14:18, Ralf Ramsauer wrote:
> Hi,
>
> analogously to x86, this series provides some platform information on
> ARM via the communication region.
>
> In sum, this series passes to inmates:
> - A struct jailhouse_debug_console to inmates on all architectures
> (including x86, but there it is not used yet)
> - arm: GIC (v3 and v4) register locations
> - arm: Platform Timer IRQ
>
> The nice thing is that we get rid of mach.h on ARM architectures, which
> makes inmates completely platform independant.
>
> Inmate command line options (e.g., con-type, con-divider, ...) may still
> override platform information.
>
> Tested on a Jetson TK1 and qemu-arm64.
>
> I converted this to a RFC series as there are still some things missing:
> - Documentation for new comm region ABI
> - Use the comm region's struct jailhouse_console on x86
> - Analogously to arm: rewrite x86's uart drivers, embed them in struct uart_chip
> - We then can (probably) consolidate both architecture's printk.c

What's the status of cache/mmu enabling?

Jan

--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux

Ralf Ramsauer

unread,
May 14, 2018, 12:19:27 PM5/14/18
to Jan Kiszka, jailho...@googlegroups.com
Cache/MMU enabling is unrelated to these patches, these patches will
work without MMU enabling. Inmates only read from the comm region.

However, I took your stub and played around with it. To get around
map_range() for the comm region, i mapped the comm region to 0x10000,
which will be id-mapped by the static page table.

MMU and D+I caches are enabled, but this doesn't seem to be enough.
Caches are highly configurable [1] on ARM, but I didn't have time to dig
deeper into that. And I'm not a cache expert, though.

Additionally, for the eventual fix, we will need a map_range() which
requires some sort of dynamic PT and isn't implemented yet.

Ralf

[1]
https://developer.arm.com/docs/ddi0329/latest/functional-overview/functional-operation/axi-master-and-slave-interfaces

Jan Kiszka

unread,
May 14, 2018, 12:44:34 PM5/14/18
to Ralf Ramsauer, jailho...@googlegroups.com
I don't find code that flushes dcaches...

We really have to solve that coherency issue before promoting the comm
region on ARM.

>
> However, I took your stub and played around with it. To get around
> map_range() for the comm region, i mapped the comm region to 0x10000,
> which will be id-mapped by the static page table.
>
> MMU and D+I caches are enabled, but this doesn't seem to be enough.
> Caches are highly configurable [1] on ARM, but I didn't have time to dig
> deeper into that. And I'm not a cache expert, though.
>
> Additionally, for the eventual fix, we will need a map_range() which
> requires some sort of dynamic PT and isn't implemented yet.

Understood, and the more I would like to avoid rushing forward without
having the full picture yet.

Jan

>
> Ralf
>
> [1]
> https://developer.arm.com/docs/ddi0329/latest/functional-overview/functional-operation/axi-master-and-slave-interfaces

Ralf Ramsauer

unread,
May 14, 2018, 2:30:10 PM5/14/18
to Jan Kiszka, jailho...@googlegroups.com
When exactly should dcaches be flushed? After setting up the comm region
entries?

>
> We really have to solve that coherency issue before promoting the comm
> region on ARM.
>
>>
>> However, I took your stub and played around with it. To get around
>> map_range() for the comm region, i mapped the comm region to 0x10000,
>> which will be id-mapped by the static page table.
>>
>> MMU and D+I caches are enabled, but this doesn't seem to be enough.
>> Caches are highly configurable [1] on ARM, but I didn't have time to dig
>> deeper into that. And I'm not a cache expert, though.
>>
>> Additionally, for the eventual fix, we will need a map_range() which
>> requires some sort of dynamic PT and isn't implemented yet.
>
> Understood, and the more I would like to avoid rushing forward without
> having the full picture yet.

Absolutely. That's the reason why I tagged it with RFC. (But we'll need
the MMU in any case, as there's still ivshmem)

Ralf
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