[siemens/jailhouse] 0f18a7: core: ivshmem: Move shared memory parameters into ...

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Jan 15, 2017, 3:08:09 AM1/15/17
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Branch: refs/heads/wip/ivshmem2
Home: https://github.com/siemens/jailhouse
Commit: 0f18a7a5f08c10551ec96aba2e555c882da3872b
https://github.com/siemens/jailhouse/commit/0f18a7a5f08c10551ec96aba2e555c882da3872b
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M hypervisor/include/jailhouse/ivshmem.h
M hypervisor/include/jailhouse/pci.h
M hypervisor/ivshmem.c

Log Message:
-----------
core: ivshmem: Move shared memory parameters into vendor specific capability

This gives us more flexibility in extending the parameters we expose via
the config space. The capability starts with its ID, the next pointer, a
one-byte length field (these parameters are mandated by the PCI spec),
then a one-byte flags field (currently RsvdZ), and finally the shared
memory region address and size. Proper specification of all this is work
in progress.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: 4aae22dc67f4ea60635c5c962f53ffba8c463e88
https://github.com/siemens/jailhouse/commit/4aae22dc67f4ea60635c5c962f53ffba8c463e88
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M hypervisor/arch/arm-common/ivshmem.c
M hypervisor/arch/x86/ivshmem.c
M hypervisor/include/jailhouse/ivshmem.h
M hypervisor/ivshmem.c

Log Message:
-----------
core: ivshmem: Move INTx control into PCI config space

This prepares for unprivileged access to the MMIO register space inside
cells. It uses the flags field of the new vendor capability.

To avoid affecting the arch_ivshmem_update_intx handler from further
changes in the enabling logic, pass the new state as parameter.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: 18aa88e3b4f333fdef4e407f2becb0c7d3dd20cd
https://github.com/siemens/jailhouse/commit/18aa88e3b4f333fdef4e407f2becb0c7d3dd20cd
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M hypervisor/ivshmem.c

Log Message:
-----------
core: ivshmem: Derive MMIO register region size from cell config

The BAR mask encodes the size of a PCI device resource. Use this to
allow a target-dependent setting via the cell configuration so that
alignment to the cell's page size become feasible. This will enable the
cell OS to map the MMIO region as a whole into user space.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: fdaf4ccb88015433b1b0f754a3678e491dc655c5
https://github.com/siemens/jailhouse/commit/fdaf4ccb88015433b1b0f754a3678e491dc655c5
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M hypervisor/ivshmem.c

Log Message:
-----------
core: ivshmem: Enable unprivileged MMIO register access

Make sure that unsupported accesses to the MMIO register region do not
raise immediate panic. We should rather ignored them. This allows the
cell OS to hand out the region to unprivileged users.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: 379a3a6309b32e5af5c48dcdbc7d7155748a0190
https://github.com/siemens/jailhouse/commit/379a3a6309b32e5af5c48dcdbc7d7155748a0190
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M configs/amd-seattle-linux-demo.c
M configs/amd-seattle.c
M configs/bananapi-linux-demo.c
M configs/bananapi.c
M configs/hikey-linux-demo.c
M configs/hikey.c
M configs/ivshmem-demo.c
M configs/jetson-tk1-linux-demo.c
M configs/jetson-tk1.c
M configs/linux-x86-demo.c
M configs/orangepi0-linux-demo.c
M configs/orangepi0.c
M configs/qemu-vm.c
M configs/zynqmp-zcu102-linux-demo-2.c
M configs/zynqmp-zcu102-linux-demo.c
M configs/zynqmp-zcu102.c

Log Message:
-----------
config: Adjust ivshmem MMIO region to 4K size

Required so that the cell OS can map the region as a whole to its user
space.

If a cell may use larger minimal page sizes, the mask for BAR 0 has to
be adjusted accordingly. For now we assume they are all on 4K.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: 75ca124ab6cf0598ea0f6fda6f3d794d344fcc75
https://github.com/siemens/jailhouse/commit/75ca124ab6cf0598ea0f6fda6f3d794d344fcc75
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M hypervisor/ivshmem.c

Log Message:
-----------
core: ivshmem: Pack MMIO registers

Reorder the layout and fill gaps that were left due to unsupported
registers of the original ivshmem device. We are breaking with that
design anyway.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: 8c0df6a79f18214314bde63be7e98f086e5590dc
https://github.com/siemens/jailhouse/commit/8c0df6a79f18214314bde63be7e98f086e5590dc
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M hypervisor/include/jailhouse/ivshmem.h
M hypervisor/ivshmem.c

Log Message:
-----------
core: ivshmem: Rename IVPOS register to ID

From user pespective, there is no specific "position" encoded into
"ivpos". It's just a unique identifier on an ivshmem link.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: e600a87aa4af2cba1b1c3d1e85b8baacf4e570ec
https://github.com/siemens/jailhouse/commit/e600a87aa4af2cba1b1c3d1e85b8baacf4e570ec
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M hypervisor/ivshmem.c

Log Message:
-----------
core: ivshmem: Rename ivshmem_data to ivshmem_link

Represents more clearly what the structure is about: meta data
describing the link between two ivshmem endpoints.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: 42c92673e3b1e055c304e2858baa3aed7d94ea00
https://github.com/siemens/jailhouse/commit/42c92673e3b1e055c304e2858baa3aed7d94ea00
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M hypervisor/include/jailhouse/ivshmem.h
M hypervisor/ivshmem.c

Log Message:
-----------
core: ivshmem: Introduce link pointer to ivshmem_endpoint

Will be used when moving the remote lock to link level.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: 0a8a588417f1eeac015315614051d6b10b251e1d
https://github.com/siemens/jailhouse/commit/0a8a588417f1eeac015315614051d6b10b251e1d
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M hypervisor/include/jailhouse/ivshmem.h
M hypervisor/ivshmem.c

Log Message:
-----------
core: ivshmem: Promote remote lock to a link level lock

This is required when synchronizing activities (see upcoming remote
state write-back) that require references to both sides: Taking both
remote locks would required lock nesting and creates deadlock risks. It
is simpler to validate that a single lock at link level is acquired and
released correctly.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: 51e1c5d0703f116bdb1b1b5ff23330eb7015c3be
https://github.com/siemens/jailhouse/commit/51e1c5d0703f116bdb1b1b5ff23330eb7015c3be
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M hypervisor/arch/arm-common/ivshmem.c
M hypervisor/arch/x86/ivshmem.c
M hypervisor/arch/x86/vtd.c
M hypervisor/include/jailhouse/ivshmem.h
M hypervisor/ivshmem.c
M hypervisor/pci.c

Log Message:
-----------
core: ivshmem: Reintroduce ivshmem_update_msix

This function consolidates the check for num_msix_vectors > 0 and
ivshmem_is_msix_masked, leaving arch_ivshmem_update_msix with less work.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: 9f5f940bd167a230d04969144d5fb784daccfc0b
https://github.com/siemens/jailhouse/commit/9f5f940bd167a230d04969144d5fb784daccfc0b
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M hypervisor/arch/arm-common/ivshmem.c
M hypervisor/ivshmem.c

Log Message:
-----------
core: ivshmem: Add PCI-conforming INTx mask

Simple enough to add, and newer PCI specs demand this feature anyway:
allow to mask the INTx line via the command register.

For this purpose, factor out ivshmem_update_intx that determines the
state of the line prior to calling arch_ivshmem_update_intx. It also
skips over this call in case num_msix_vectors is non-null, offloading
this check from the arch function.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: e0539b8d62ab539f9efa062c90a19fd86e8e341c
https://github.com/siemens/jailhouse/commit/e0539b8d62ab539f9efa062c90a19fd86e8e341c
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M hypervisor/arch/x86/ivshmem.c
M hypervisor/ivshmem.c

Log Message:
-----------
core: ivshmem: Move arch_ivshmem_update_msix/intx under link lock

This both ensure atomicity /wrt arch_ivshmem_trigger_interrupt and
provides a barrier so that no further interrupts are in flight (provided
the hardware does not delay IPI delivery) after returning from an
interrupt masking operation.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: 4c63169e0755417e3aa800f0a7c52c320af99fbb
https://github.com/siemens/jailhouse/commit/4c63169e0755417e3aa800f0a7c52c320af99fbb
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M hypervisor/include/jailhouse/ivshmem.h
M hypervisor/ivshmem.c

Log Message:
-----------
core: ivshmem: Implement remote state write-back to shared memory

Checking the remote state currently requires a MMIO register access
which implies a vmexit. As we only have one interrupt vector so far (and
there won't be more with INTx), this affects even the hot-path of
exchanging I/O-related events with the peer. Also when doing polling,
the check is unnecessary expensive.

Reduce the costs by writing state changes to the shared memory at a
location the peer can decide. This, of course, requires coordination
between both sides to avoid using the location also for different
purposes, but that is out of scope for the shared memory device.

Enabling or updating the write-back address triggers immediate setting
of the target memory so that the user will have the latest state
available when checking the field afterwards.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: c547868516ff531f11782c2a0aeffa4d792d242e
https://github.com/siemens/jailhouse/commit/c547868516ff531f11782c2a0aeffa4d792d242e
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M configs/amd-seattle-linux-demo.c
M configs/amd-seattle.c
M configs/bananapi-linux-demo.c
M configs/bananapi.c
M configs/hikey-linux-demo.c
M configs/hikey.c
M configs/ivshmem-demo.c
M configs/jetson-tk1-linux-demo.c
M configs/jetson-tk1.c
M configs/linux-x86-demo.c
M configs/orangepi0-linux-demo.c
M configs/orangepi0.c
M configs/qemu-vm.c
M configs/zynqmp-zcu102-linux-demo-2.c
M configs/zynqmp-zcu102-linux-demo.c
M configs/zynqmp-zcu102.c
M hypervisor/include/jailhouse/cell-config.h
M hypervisor/include/jailhouse/ivshmem.h
M hypervisor/ivshmem.c

Log Message:
-----------
core: ivshmem: Add support for unidirectional memory regions

Extend the ivshmem device to map up to 3 memory regions. Conceptually,
all regions are optional, thus can be empty but have to be listed as
such in the cell configuration. If present, the first region shall be
read/write for both sides. The second shall be read/write for the local
side and read-only for the remote. The third one shall be read-only
locally and read/writable for the remote. Thus, second and third region
need to be specified reversely in the configuration of both peers.

All three regions are reported via the vendor-specific capability of the
ivshmem device. The capability is extended accordingly.

For the shared-memory network devices, we only use the second and third
region, thus the unidirectional ones. Update the cell configurations
accordingly by splitting the existing one into two halves.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: 02a1acba774078a5c8ac047f050a85b416f96a21
https://github.com/siemens/jailhouse/commit/02a1acba774078a5c8ac047f050a85b416f96a21
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M hypervisor/ivshmem.c

Log Message:
-----------
core: ivshmem: Reindent defines

Pure styling, no functional changes.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: c219a317f3f25d6d6c6b753895db984ce537f04e
https://github.com/siemens/jailhouse/commit/c219a317f3f25d6d6c6b753895db984ce537f04e
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M hypervisor/arch/arm-common/include/asm/ivshmem.h
M hypervisor/arch/x86/include/asm/ivshmem.h
M scripts/header_check

Log Message:
-----------
core: Restrict asm/ivshmem.h to inclusion by jailhouse/ivshmem.h

The asm header will gain a dependency on the generic one and, thus,
should no longer be considered for direct inclusion. Adjust the header
check accordingly.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: af1e73e637d70c9ca6021393d4ba7331e580dc53
https://github.com/siemens/jailhouse/commit/af1e73e637d70c9ca6021393d4ba7331e580dc53
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M configs/amd-seattle-linux-demo.c
M configs/amd-seattle.c
M configs/ivshmem-demo.c
M configs/linux-x86-demo.c
M configs/qemu-vm.c
M hypervisor/arch/arm-common/include/asm/ivshmem.h
M hypervisor/arch/arm-common/ivshmem.c
M hypervisor/arch/x86/include/asm/ivshmem.h
M hypervisor/arch/x86/ivshmem.c
M hypervisor/arch/x86/vtd.c
M hypervisor/include/jailhouse/ivshmem.h
M hypervisor/ivshmem.c

Log Message:
-----------
core, configs: ivshmem: Add support for up to 16 MSI-X vectors

This allows ivshmem devices with MSI-X support to expose up to 16
(PCI_EMBEDDED_MSIX_VECTS) vectors to its users. The doorbell register is
now interpreting the written value as vector number. It is possible to
restrict the number of available vectors via the cell configuration. Out
of range writes to the doorbell register will simply be ignored.

In case the cell uses less than the exposed vectors, it is now important
to correctly mask them initially in the MSI-X table as the PCI spec
demands, or the hypervisor may find invalid vectors and complain.

With the number of vectors increasing, we also need to adjust the size
of the related resource region in the cell configs accordingly.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: 0a5912fca602084a99ee5a59b28915d5a6189588
https://github.com/siemens/jailhouse/commit/0a5912fca602084a99ee5a59b28915d5a6189588
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M hypervisor/include/jailhouse/pci.h
M hypervisor/ivshmem.c

Log Message:
-----------
core: ivshmem: Fold ivshmem_write_msix_control into caller

Using pci_msix_registers to model the update of the MSI-X control
register does not really simplify the code. Rather use a plain mask that
contains all modifiable bits, PCI_MSIX_CTRL_RW_MASK, and perform the
update in ivshmem_pci_cfg_write directly, analogously to the vendor
capability.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: baa21390b629b42a9a20c237ff173170671f67e0
https://github.com/siemens/jailhouse/commit/baa21390b629b42a9a20c237ff173170671f67e0
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
M configs/amd-seattle-linux-demo.c
M configs/amd-seattle.c
M configs/ivshmem-demo.c
M configs/linux-x86-demo.c
M configs/qemu-vm.c
M hypervisor/include/jailhouse/ivshmem.h
M hypervisor/ivshmem.c

Log Message:
-----------
core: ivshmem: Compress BAR usage

Move BAR 4 to BAR 2, closing the legacy gap. Pure cosmetic.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: 943bcc6f15b0d120e45be61ab03e9811ecae517d
https://github.com/siemens/jailhouse/commit/943bcc6f15b0d120e45be61ab03e9811ecae517d
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-01-14 (Sat, 14 Jan 2017)

Changed paths:
A Documentation/ivshmem-v2-specification.md

Log Message:
-----------
Documentation: Add specification of IVSHMEM v2 device


Compare: https://github.com/siemens/jailhouse/compare/fca8e0ed560a...943bcc6f15b0
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