[PATCH] inmates: arm: Fix GICv3 enabling

[Jan Kiszka]

From: Jan Kiszka <jan.k...@siemens.com>

Found by Coverity: Make sure we only process SGIs, PPIs and SPIs.
Furthermore, we have to select the GICD_ISENABLER register for SPIs
based on the interrupt number first and then write the correct bit
between 0 and 31.

Fixes: 9ee8e1418938 ("arm: basic inmates demos")

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
---

Positive effect of enabling the GICv3 for the CI runs.

inmates/lib/arm/gic-v3.c | 7 ++++---
inmates/lib/arm/include/gic.h | 1 +
2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/inmates/lib/arm/gic-v3.c b/inmates/lib/arm/gic-v3.c
index 2e85e82..ffc1151 100644
--- a/inmates/lib/arm/gic-v3.c
+++ b/inmates/lib/arm/gic-v3.c
@@ -27,11 +27,12 @@

void gic_enable(unsigned int irqn)
{
- if (is_spi(irqn))
- mmio_write32(GICD_BASE + GICD_ISENABLER, 1 << irqn);
- else
+ if (is_sgi_ppi(irqn))
mmio_write32(GICR_BASE + GICR_SGI_BASE + GICR_ISENABLER,
1 << irqn);
+ else if (is_spi(irqn))
+ mmio_write32(GICD_BASE + GICD_ISENABLER + irqn / 32,
+ 1 << (irqn % 32));
}

int gic_init(void)
diff --git a/inmates/lib/arm/include/gic.h b/inmates/lib/arm/include/gic.h
index 6a28e7d..96047e6 100644
--- a/inmates/lib/arm/include/gic.h
+++ b/inmates/lib/arm/include/gic.h
@@ -16,6 +16,7 @@

#define GICD_ISENABLER 0x0100

+#define is_sgi_ppi(irqn) ((irqn) < 32)
#define is_spi(irqn) ((irqn) > 31 && (irqn) < 1020)

#ifndef __ASSEMBLY__
--
2.1.4