[siemens/jailhouse] d9567d: hypervisor: Move GIC v3 to arm-common

[GitHub]

Branch: refs/heads/wip/gicv3-rework
Home: https://github.com/siemens/jailhouse
Commit: d9567de045fac0f10555a784c48892a3e9b09125
https://github.com/siemens/jailhouse/commit/d9567de045fac0f10555a784c48892a3e9b09125
Author: Nikhil Devshatwar' via Jailhouse <jailho...@googlegroups.com>
Date: 2017-07-23 (Sun, 23 Jul 2017)

Changed paths:
M hypervisor/arch/arm-common/Kbuild
A hypervisor/arch/arm-common/gic-v3.c
A hypervisor/arch/arm-common/include/asm/gic_v3.h
M hypervisor/arch/arm/Kbuild
R hypervisor/arch/arm/gic-v3.c
R hypervisor/arch/arm/include/asm/gic_v3.h

Log Message:
-----------
hypervisor: Move GIC v3 to arm-common

Signed-off-by: Nikhil Devshatwar <nikh...@ti.com>


Commit: fbeecafe6a899a85e7233eedeebc25b4ae6af375
https://github.com/siemens/jailhouse/commit/fbeecafe6a899a85e7233eedeebc25b4ae6af375
Author: Nikhil Devshatwar' via Jailhouse <jailho...@googlegroups.com>
Date: 2017-07-23 (Sun, 23 Jul 2017)

Changed paths:
M inmates/lib/arm-common/Makefile.lib
A inmates/lib/arm-common/gic-v3.c
M inmates/lib/arm/Makefile
R inmates/lib/arm/gic-v3.c

Log Message:
-----------
inmates: Move gic v3 to common

Signed-off-by: Nikhil Devshatwar <nikh...@ti.com>


Commit: d3ad5475bffff782ad1ce9523f22584a79b55779
https://github.com/siemens/jailhouse/commit/d3ad5475bffff782ad1ce9523f22584a79b55779
Author: Nikhil Devshatwar' via Jailhouse <jailho...@googlegroups.com>
Date: 2017-07-23 (Sun, 23 Jul 2017)

Changed paths:
M hypervisor/arch/arm-common/include/asm/gic_v3.h
M hypervisor/arch/arm64/include/asm/sysregs.h

Log Message:
-----------
hypervisor: Fix sysreg macro definitions

Getting compiler issues when using GIC V3 in 64bit mode
Update the sysreg macros to solve these compiler issues

Signed-off-by: Nikhil Devshatwar <nikh...@ti.com>


Commit: ec9ef55fb14c3bbae5513d4dfc9152e3c269ae6f
https://github.com/siemens/jailhouse/commit/ec9ef55fb14c3bbae5513d4dfc9152e3c269ae6f
Author: Nikhil Devshatwar' via Jailhouse <jailho...@googlegroups.com>
Date: 2017-07-23 (Sun, 23 Jul 2017)

Changed paths:
M hypervisor/arch/arm-common/gic-v3.c

Log Message:
-----------
hypervisor: Fix virt_id errors

virt_id is not available when working with GIC v3
It needs to be properly supported later
For now, disable using virt_id

Signed-off-by: Nikhil Devshatwar <nikh...@ti.com>


Commit: 37c1001e97cd9c52a2574b4249a729be4b568530
https://github.com/siemens/jailhouse/commit/37c1001e97cd9c52a2574b4249a729be4b568530
Author: Nikhil Devshatwar' via Jailhouse <jailho...@googlegroups.com>
Date: 2017-07-23 (Sun, 23 Jul 2017)

Changed paths:
M hypervisor/arch/arm-common/gic-v3.c

Log Message:
-----------
hypervisor: Correct cpu_id bitfield in GIC TYPER register

I am not sure if the code is wrong or the
config file does not correctly map the cpu_set

Currently, the cpu_id is passed as logical CPU number (0,1,2,3..)
But the TYPER register affinity is (0, 1, 100, 101...)

Correct this to look for a different bitfield in TYPER which
matches the logical numbering.


Commit: ba9a646e0f9be1ececba676ccfa40bc933c90ac3
https://github.com/siemens/jailhouse/commit/ba9a646e0f9be1ececba676ccfa40bc933c90ac3
Author: Nikhil Devshatwar' via Jailhouse <jailho...@googlegroups.com>
Date: 2017-07-23 (Sun, 23 Jul 2017)

Changed paths:
M hypervisor/arch/arm-common/gic-v3.c
M hypervisor/arch/arm-common/include/asm/gic.h

Log Message:
-----------
hypervisor: Fix IROUTER register access

Correct IROUTER base address
Using void pointer for IROUTER register address
Correct pointer arithmatic considering 32bit register per IRQ

Signed-off-by: Nikhil Devshatwar <nikh...@ti.com>


Commit: ba6bf199da33bd2cffa8d74f418f71a8a060b6d5
https://github.com/siemens/jailhouse/commit/ba6bf199da33bd2cffa8d74f418f71a8a060b6d5
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-07-23 (Sun, 23 Jul 2017)

Changed paths:
M hypervisor/arch/arm-common/include/asm/gic_v3.h

Log Message:
-----------
arm-common: Hack ICH_LR accessors for arm64 usage

BREAKS ARM!


Commit: 6be45097f7853d227fcb07a61a97d23f7159a4a8
https://github.com/siemens/jailhouse/commit/6be45097f7853d227fcb07a61a97d23f7159a4a8
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-07-23 (Sun, 23 Jul 2017)

Changed paths:
M hypervisor/arch/arm-common/Kbuild
M hypervisor/arch/arm-common/dbg-write.c
M hypervisor/arch/arm-common/include/asm/uart.h
A hypervisor/arch/arm-common/uart-mvebu.c
M hypervisor/include/jailhouse/cell-config.h

Log Message:
-----------
arm-common: Add support for Marvell UART

This one can be found in the Marvell Armada 3720 which is used by the
ESPRESSObin board.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: 58c9c17712de90d64da9226232cb1a241d65cd05
https://github.com/siemens/jailhouse/commit/58c9c17712de90d64da9226232cb1a241d65cd05
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-07-23 (Sun, 23 Jul 2017)

Changed paths:
M inmates/lib/arm-common/Makefile.lib
M inmates/lib/arm-common/include/uart.h
M inmates/lib/arm-common/printk.c
A inmates/lib/arm-common/uart-mvebu.c

Log Message:
-----------
inmates: arm: Add support Marvell UART

Analogously to the hypervisor, add a UART driver for Marvel UARTs as
found in the Armada 3720.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>


Commit: 005b0d14386b143c76eb012125292f5461c3bfa7
https://github.com/siemens/jailhouse/commit/005b0d14386b143c76eb012125292f5461c3bfa7
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2017-07-23 (Sun, 23 Jul 2017)

Changed paths:
A configs/espressobin.c
M inmates/lib/arm64/include/mach.h

Log Message:
-----------
configs, inmates: Add support for ESPRESSObin board

Add configs and inmate defaults for the Marvell Armada 3720-based
ESPRESSObin board.

TODO: Add inmate configs and device tree.


Compare: https://github.com/siemens/jailhouse/compare/d9567de045fa^...005b0d14386b

[Jan Kiszka]

Hi Nikhil,

On 2017-07-23 12:15, GitHub wrote:
> Branch: refs/heads/wip/gicv3-rework

FYI, this is my current staging branch for the ESPRESSObin. Works in
UP-mode so far. Will explode in a minute in Travis CI when building
GICv3 on 32-bit ARM...

Jan

[Nikhil Devshatwar]

Thanks Jan,

I can cherry pick patches and verify the changes.

Also, I'll repost the patch series with review comments incorporated

Nikhil D

[Jan Kiszka]

I didn't reviewed the other patches yet as they are mostly hacks. Let's
get things working on arm64 first, then factor out the differences to
arm properly so that both still build. Then repost.

Jan

[Jan Kiszka]

SMP and gic-demo now works on the ESPRESSObin, see updated patch queue.
Hack level increased further. It's now time to rethink the whole thing,
specifically /wrt virt-phys ID and GICR mapping.

Jan

[Nikhil Devshatwar]

On Sunday 23 July 2017 03:56 PM, Nikhil Devshatwar wrote:
> On Sunday 23 July 2017 03:48 PM, Jan Kiszka wrote:
>> Hi Nikhil,
>>
>> On 2017-07-23 12:15, GitHub wrote:
>>> Branch: refs/heads/wip/gicv3-rework
>> FYI, this is my current staging branch for the ESPRESSObin. Works in
>> UP-mode so far. Will explode in a minute in Travis CI when building
>> GICv3 on 32-bit ARM...
>>
>> Jan
>
> Thanks Jan,
>
> I can cherry pick patches and verify the changes.

Hello Jan,

I cherry-picked the patches and I am not able to bringup two cells.
I didn't find any patch which handles the SGI traps and handles them.
This is what I have done for now to let the SGIs go through via jailhouse.
http://pastebin.ubuntu.com/25324676/

But I see there is some better implementation at handle_sgir_access
hypervisor/arch/arm-common/irqchip.c:111

Let me know if this can be used instead of the hackery I have attempted.

Thanks & Regards,
Nikhil D

[Jan Kiszka]

Ooops, didn't push the final outcome. Just rebased over next and
force-updated.

I didn't compare to your version yet, but maybe you will spot the
difference.

Cheers,
Jan