[siemens/jailhouse] af7dd1: x86: vmx: Micro-cleanup in vcpu_vendor_cell_init
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Aug 28, 2015, 5:04:00 AM8/28/15
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Branch: refs/heads/coverity_scan
Home: https://github.com/siemens/jailhouse
Commit: af7dd103de91828080291a81d60b512d80c0ba43
https://github.com/siemens/jailhouse/commit/af7dd103de91828080291a81d60b512d80c0ba43
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2015-08-14 (Fri, 14 Aug 2015)
Changed paths:
M hypervisor/arch/x86/vmx.c
Log Message:
-----------
x86: vmx: Micro-cleanup in vcpu_vendor_cell_init
Return the error code directly instead of take the indirect route via
pre-initialized err variable. Avoids that some refactoring once destroys
this relationship.
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: 8bedcad0b49e3a6b7e6fd177c885b2c91f316009
https://github.com/siemens/jailhouse/commit/8bedcad0b49e3a6b7e6fd177c885b2c91f316009
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2015-08-14 (Fri, 14 Aug 2015)
Changed paths:
M hypervisor/arch/x86/include/asm/processor.h
M hypervisor/arch/x86/paging.c
M hypervisor/arch/x86/setup.c
M hypervisor/arch/x86/svm.c
M hypervisor/arch/x86/vcpu.c
M hypervisor/arch/x86/vmx.c
Log Message:
-----------
x86: Add sub-leaf selection parameter to cpuid_*
This allows to call cpuid also on specific sub-leaves. Will be used
first for CAT.
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: 77ad0dda3bbe897796c00e8007639248cebb3738
https://github.com/siemens/jailhouse/commit/77ad0dda3bbe897796c00e8007639248cebb3738
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M hypervisor/arch/x86/vmx.c
Log Message:
-----------
x86: vmx: Block write access to CAT MSRs
Make sure the cells cannot mess around with them, modifying the
configuration the hypervisor chose.
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: 3ceb4ae2e2afe5c345b4327d88f5c2baeec02212
https://github.com/siemens/jailhouse/commit/3ceb4ae2e2afe5c345b4327d88f5c2baeec02212
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M hypervisor/include/jailhouse/cell-config.h
M tools/jailhouse-cell-linux
Log Message:
-----------
core, tools: Introduce cache regions to the cell configuration
Allow to specify regions of caches so that the hypervisor can partition
their usage accordingly whenever the hardware supports this.
The specification of their start location and sizes depend on the
architecture specific partitioning support. So far, L1-L3 cache types
are definable (of which Intel's CAT will only support L3). As with
memory regions, caches are usually taken from the root cell on non-root
cell creation, but they can also be declared as shared with the root
cell.
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: 9d61b345a7285929295ca78ed6be6344eb6d90b5
https://github.com/siemens/jailhouse/commit/9d61b345a7285929295ca78ed6be6344eb6d90b5
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M hypervisor/arch/x86/Makefile
A hypervisor/arch/x86/cat-stubs.c
A hypervisor/arch/x86/cat.c
M hypervisor/arch/x86/control.c
A hypervisor/arch/x86/include/asm/cat.h
M hypervisor/arch/x86/include/asm/cell.h
M hypervisor/arch/x86/include/asm/percpu.h
M hypervisor/arch/x86/include/asm/processor.h
M hypervisor/arch/x86/setup.c
Log Message:
-----------
x86: Introduce Cache Allocation Technology support for Intel CPUs
CAT is a CPU feature first added to Xeon D and certain Xeon E5 v3
processors. It so far allows to specify access restrictions to the L3
cache, including complete isolation between different entities.
This adds CAT control to Jailhouse on a per-cell level. The user is free
to specify a contiguous access mask for each cell, use that mask
exclusively (typical case), share any overlaps with the root cell
(JAILHOUSE_CACHE_ROOTSHARED), or simply use the root cell mask. If
nothing else is specified, the root cell uses the full cache (until
non-root cells shrink it).
Due to the hardware-induced requirement to have a contiguous bitmask,
shrinking the root mask on cell creation and extending it again on
destruction is not trivial.
When creating a new cell, we may punch a whole into the root mask. In
that case, we also subtract the smaller remaining half from it.
When restoring the root mask on cell destruction, we choose a simple
algorithm that first collects all released bits in a combined mask, then
tries to merge that mask bit-wise with the current root cell mask. On
success we restart the freed mask walk to ensure that all contiguous
bits are merged.
A lot of complication, despite we already require explicit mask
allocation. Let's just hope that there is a noteworthy benefit in
restricting CAT bitmasks in hardware this way.
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: d2e022f26256011406478ea17ead06872bac3b9a
https://github.com/siemens/jailhouse/commit/d2e022f26256011406478ea17ead06872bac3b9a
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M configs/apic-demo.c
M configs/linux-x86-demo.c
M configs/tiny-demo.c
Log Message:
-----------
configs: Add cache region to x86 demo cells
Assuming we have more than 4 units of L3 cache on systems that support
L3 partitioning, assign the first unit (e.g. 1 MB on a Xeon D 1540) to
apic-demo, the second to tiny-demo and the succeeding 2 to the non-root
Linux config. The latter is supposed to improve the Linux cell latencies
while the former two are not (they are expected to stay in L1/L2 due to
their sizes) but serve as test cases for the partitioning management
logic.
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: cca5c5bc22c800d6ba4ee62e5a65903269778e6a
https://github.com/siemens/jailhouse/commit/cca5c5bc22c800d6ba4ee62e5a65903269778e6a
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M TODO.md
Log Message:
-----------
TODO: Remove CAT item
Feature is now available.
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: b51867353923dd30bdaf32af997a33b5c0e71658
https://github.com/siemens/jailhouse/commit/b51867353923dd30bdaf32af997a33b5c0e71658
Author: Ralf Ramsauer <ra...@ramses-pyramidenbau.de>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M configs/apic-demo.c
M configs/bananapi-gic-demo.c
M configs/bananapi-uart-demo.c
M configs/bananapi.c
M configs/e1000-demo.c
M configs/f2a88xm-hd3.c
M configs/h87i.c
M configs/imb-a180.c
M configs/ioapic-demo.c
M configs/ivshmem-demo.c
M configs/jetson-tk1-demo.c
M configs/jetson-tk1.c
M configs/linux-x86-demo.c
M configs/pci-demo.c
M configs/qemu-vm.c
M configs/smp-demo.c
M configs/tiny-demo.c
M configs/vexpress-gic-demo.c
M configs/vexpress-linux-demo.c
M configs/vexpress-uart-demo.c
M configs/vexpress.c
M driver/cell.c
M driver/main.c
M hypervisor/include/jailhouse/cell-config.h
M tools/jailhouse-cell-linux
M tools/root-cell-config.c.tmpl
Log Message:
-----------
hypervisor, driver: Added signature for .cell files
Inserted signature field in struct jailhouse_cell_desc and
jailhouse_system. Jailhouse kernel driver will refuse loading
a system configuration as a cell configuration et vice versa.
Signed-off-by: Ralf Ramsauer <ra...@ramses-pyramidenbau.de>
[Jan: also adjust Linux loader script]
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: e2196994d8c4e22a1a989e06a71ed90ab8a953ef
https://github.com/siemens/jailhouse/commit/e2196994d8c4e22a1a989e06a71ed90ab8a953ef
Author: Antonios Motakis <antonios...@huawei.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M hypervisor/printk.c
Log Message:
-----------
core: printk: include asm/bitops.h directly
Currently the implementation in hypervisor/printk.c assumes asm/bitops.h
will be included by asm/spinlock.h. Since this implementation is using
bitops directly, we include the right header file.
Signed-off-by: Antonios Motakis <antonios...@huawei.com>
[Jan: adjust to alphabetic ordering]
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: 1d8b79612ed22a92432520cc863c984c9b45a4e8
https://github.com/siemens/jailhouse/commit/1d8b79612ed22a92432520cc863c984c9b45a4e8
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M hypervisor/arch/arm/include/asm/spinlock.h
M hypervisor/arch/arm/mmio.c
M hypervisor/arch/x86/include/asm/spinlock.h
Log Message:
-----------
core: Clean up asm/bitops.h inclusions
No asm/spinlock.h header need it anymore. If we remove it, we need to
convert the implicit inclusion in arm/mmio.c into an explicit one.
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: 4585e16fd48d01a25dc2d1376abce7de2b802cfc
https://github.com/siemens/jailhouse/commit/4585e16fd48d01a25dc2d1376abce7de2b802cfc
Author: Antonios Motakis <antonios...@huawei.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M hypervisor/arch/arm/gic-common.c
Log Message:
-----------
core: arm: add missing include to gic-common.c
Add a missing include to gic-common.c
Signed-off-by: Antonios Motakis <antonios...@huawei.com>
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: 75e24ad1c0aee7636dd03899376a855fb055f1a0
https://github.com/siemens/jailhouse/commit/75e24ad1c0aee7636dd03899376a855fb055f1a0
Author: Antonios Motakis <antonios...@huawei.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M hypervisor/arch/arm/include/asm/irqchip.h
Log Message:
-----------
core: add missing include to irqchip.h
Add a missing include to irqchip.h
Signed-off-by: Antonios Motakis <antonios...@huawei.com>
[Jan: adjust to alphabetic ordering]
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: 997802fae91a7e2c4cbef6172562c033fef9a590
https://github.com/siemens/jailhouse/commit/997802fae91a7e2c4cbef6172562c033fef9a590
Author: Antonios Motakis <antonios...@huawei.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M hypervisor/include/jailhouse/control.h
Log Message:
-----------
core: add missing include to control.h
Add a missing include to hypervisor/includes/jailhouse/control.h
Signed-off-by: Antonios Motakis <antonios...@huawei.com>
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Compare: https://github.com/siemens/jailhouse/compare/dda4c03ff093...997802fae91a
Home: https://github.com/siemens/jailhouse
Commit: af7dd103de91828080291a81d60b512d80c0ba43
https://github.com/siemens/jailhouse/commit/af7dd103de91828080291a81d60b512d80c0ba43
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2015-08-14 (Fri, 14 Aug 2015)
Changed paths:
M hypervisor/arch/x86/vmx.c
Log Message:
-----------
x86: vmx: Micro-cleanup in vcpu_vendor_cell_init
Return the error code directly instead of take the indirect route via
pre-initialized err variable. Avoids that some refactoring once destroys
this relationship.
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: 8bedcad0b49e3a6b7e6fd177c885b2c91f316009
https://github.com/siemens/jailhouse/commit/8bedcad0b49e3a6b7e6fd177c885b2c91f316009
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2015-08-14 (Fri, 14 Aug 2015)
Changed paths:
M hypervisor/arch/x86/include/asm/processor.h
M hypervisor/arch/x86/paging.c
M hypervisor/arch/x86/setup.c
M hypervisor/arch/x86/svm.c
M hypervisor/arch/x86/vcpu.c
M hypervisor/arch/x86/vmx.c
Log Message:
-----------
x86: Add sub-leaf selection parameter to cpuid_*
This allows to call cpuid also on specific sub-leaves. Will be used
first for CAT.
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: 77ad0dda3bbe897796c00e8007639248cebb3738
https://github.com/siemens/jailhouse/commit/77ad0dda3bbe897796c00e8007639248cebb3738
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M hypervisor/arch/x86/vmx.c
Log Message:
-----------
x86: vmx: Block write access to CAT MSRs
Make sure the cells cannot mess around with them, modifying the
configuration the hypervisor chose.
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: 3ceb4ae2e2afe5c345b4327d88f5c2baeec02212
https://github.com/siemens/jailhouse/commit/3ceb4ae2e2afe5c345b4327d88f5c2baeec02212
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M hypervisor/include/jailhouse/cell-config.h
M tools/jailhouse-cell-linux
Log Message:
-----------
core, tools: Introduce cache regions to the cell configuration
Allow to specify regions of caches so that the hypervisor can partition
their usage accordingly whenever the hardware supports this.
The specification of their start location and sizes depend on the
architecture specific partitioning support. So far, L1-L3 cache types
are definable (of which Intel's CAT will only support L3). As with
memory regions, caches are usually taken from the root cell on non-root
cell creation, but they can also be declared as shared with the root
cell.
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: 9d61b345a7285929295ca78ed6be6344eb6d90b5
https://github.com/siemens/jailhouse/commit/9d61b345a7285929295ca78ed6be6344eb6d90b5
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M hypervisor/arch/x86/Makefile
A hypervisor/arch/x86/cat-stubs.c
A hypervisor/arch/x86/cat.c
M hypervisor/arch/x86/control.c
A hypervisor/arch/x86/include/asm/cat.h
M hypervisor/arch/x86/include/asm/cell.h
M hypervisor/arch/x86/include/asm/percpu.h
M hypervisor/arch/x86/include/asm/processor.h
M hypervisor/arch/x86/setup.c
Log Message:
-----------
x86: Introduce Cache Allocation Technology support for Intel CPUs
CAT is a CPU feature first added to Xeon D and certain Xeon E5 v3
processors. It so far allows to specify access restrictions to the L3
cache, including complete isolation between different entities.
This adds CAT control to Jailhouse on a per-cell level. The user is free
to specify a contiguous access mask for each cell, use that mask
exclusively (typical case), share any overlaps with the root cell
(JAILHOUSE_CACHE_ROOTSHARED), or simply use the root cell mask. If
nothing else is specified, the root cell uses the full cache (until
non-root cells shrink it).
Due to the hardware-induced requirement to have a contiguous bitmask,
shrinking the root mask on cell creation and extending it again on
destruction is not trivial.
When creating a new cell, we may punch a whole into the root mask. In
that case, we also subtract the smaller remaining half from it.
When restoring the root mask on cell destruction, we choose a simple
algorithm that first collects all released bits in a combined mask, then
tries to merge that mask bit-wise with the current root cell mask. On
success we restart the freed mask walk to ensure that all contiguous
bits are merged.
A lot of complication, despite we already require explicit mask
allocation. Let's just hope that there is a noteworthy benefit in
restricting CAT bitmasks in hardware this way.
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: d2e022f26256011406478ea17ead06872bac3b9a
https://github.com/siemens/jailhouse/commit/d2e022f26256011406478ea17ead06872bac3b9a
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M configs/apic-demo.c
M configs/linux-x86-demo.c
M configs/tiny-demo.c
Log Message:
-----------
configs: Add cache region to x86 demo cells
Assuming we have more than 4 units of L3 cache on systems that support
L3 partitioning, assign the first unit (e.g. 1 MB on a Xeon D 1540) to
apic-demo, the second to tiny-demo and the succeeding 2 to the non-root
Linux config. The latter is supposed to improve the Linux cell latencies
while the former two are not (they are expected to stay in L1/L2 due to
their sizes) but serve as test cases for the partitioning management
logic.
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: cca5c5bc22c800d6ba4ee62e5a65903269778e6a
https://github.com/siemens/jailhouse/commit/cca5c5bc22c800d6ba4ee62e5a65903269778e6a
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M TODO.md
Log Message:
-----------
TODO: Remove CAT item
Feature is now available.
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: b51867353923dd30bdaf32af997a33b5c0e71658
https://github.com/siemens/jailhouse/commit/b51867353923dd30bdaf32af997a33b5c0e71658
Author: Ralf Ramsauer <ra...@ramses-pyramidenbau.de>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M configs/apic-demo.c
M configs/bananapi-gic-demo.c
M configs/bananapi-uart-demo.c
M configs/bananapi.c
M configs/e1000-demo.c
M configs/f2a88xm-hd3.c
M configs/h87i.c
M configs/imb-a180.c
M configs/ioapic-demo.c
M configs/ivshmem-demo.c
M configs/jetson-tk1-demo.c
M configs/jetson-tk1.c
M configs/linux-x86-demo.c
M configs/pci-demo.c
M configs/qemu-vm.c
M configs/smp-demo.c
M configs/tiny-demo.c
M configs/vexpress-gic-demo.c
M configs/vexpress-linux-demo.c
M configs/vexpress-uart-demo.c
M configs/vexpress.c
M driver/cell.c
M driver/main.c
M hypervisor/include/jailhouse/cell-config.h
M tools/jailhouse-cell-linux
M tools/root-cell-config.c.tmpl
Log Message:
-----------
hypervisor, driver: Added signature for .cell files
Inserted signature field in struct jailhouse_cell_desc and
jailhouse_system. Jailhouse kernel driver will refuse loading
a system configuration as a cell configuration et vice versa.
Signed-off-by: Ralf Ramsauer <ra...@ramses-pyramidenbau.de>
[Jan: also adjust Linux loader script]
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: e2196994d8c4e22a1a989e06a71ed90ab8a953ef
https://github.com/siemens/jailhouse/commit/e2196994d8c4e22a1a989e06a71ed90ab8a953ef
Author: Antonios Motakis <antonios...@huawei.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M hypervisor/printk.c
Log Message:
-----------
core: printk: include asm/bitops.h directly
Currently the implementation in hypervisor/printk.c assumes asm/bitops.h
will be included by asm/spinlock.h. Since this implementation is using
bitops directly, we include the right header file.
Signed-off-by: Antonios Motakis <antonios...@huawei.com>
[Jan: adjust to alphabetic ordering]
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: 1d8b79612ed22a92432520cc863c984c9b45a4e8
https://github.com/siemens/jailhouse/commit/1d8b79612ed22a92432520cc863c984c9b45a4e8
Author: Jan Kiszka <jan.k...@siemens.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M hypervisor/arch/arm/include/asm/spinlock.h
M hypervisor/arch/arm/mmio.c
M hypervisor/arch/x86/include/asm/spinlock.h
Log Message:
-----------
core: Clean up asm/bitops.h inclusions
No asm/spinlock.h header need it anymore. If we remove it, we need to
convert the implicit inclusion in arm/mmio.c into an explicit one.
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: 4585e16fd48d01a25dc2d1376abce7de2b802cfc
https://github.com/siemens/jailhouse/commit/4585e16fd48d01a25dc2d1376abce7de2b802cfc
Author: Antonios Motakis <antonios...@huawei.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M hypervisor/arch/arm/gic-common.c
Log Message:
-----------
core: arm: add missing include to gic-common.c
Add a missing include to gic-common.c
Signed-off-by: Antonios Motakis <antonios...@huawei.com>
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: 75e24ad1c0aee7636dd03899376a855fb055f1a0
https://github.com/siemens/jailhouse/commit/75e24ad1c0aee7636dd03899376a855fb055f1a0
Author: Antonios Motakis <antonios...@huawei.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M hypervisor/arch/arm/include/asm/irqchip.h
Log Message:
-----------
core: add missing include to irqchip.h
Add a missing include to irqchip.h
Signed-off-by: Antonios Motakis <antonios...@huawei.com>
[Jan: adjust to alphabetic ordering]
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Commit: 997802fae91a7e2c4cbef6172562c033fef9a590
https://github.com/siemens/jailhouse/commit/997802fae91a7e2c4cbef6172562c033fef9a590
Author: Antonios Motakis <antonios...@huawei.com>
Date: 2015-08-28 (Fri, 28 Aug 2015)
Changed paths:
M hypervisor/include/jailhouse/control.h
Log Message:
-----------
core: add missing include to control.h
Add a missing include to hypervisor/includes/jailhouse/control.h
Signed-off-by: Antonios Motakis <antonios...@huawei.com>
Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
Compare: https://github.com/siemens/jailhouse/compare/dda4c03ff093...997802fae91a
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