[PATCH 1/8] arm, arm-common: Remove unneeded asm/setup.h inclusions

[Jan Kiszka]

From: Jan Kiszka <jan.k...@siemens.com>

Nothing in those files refers to the content of setup.h.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
---
hypervisor/arch/arm-common/gic-v2.c | 1 -
hypervisor/arch/arm-common/gic-v3.c | 1 -
hypervisor/arch/arm/mach-vexpress.c | 1 -
3 files changed, 3 deletions(-)

diff --git a/hypervisor/arch/arm-common/gic-v2.c b/hypervisor/arch/arm-common/gic-v2.c
index 3b9f7d1f..41c9b2b1 100644
--- a/hypervisor/arch/arm-common/gic-v2.c
+++ b/hypervisor/arch/arm-common/gic-v2.c
@@ -15,7 +15,6 @@
#include <asm/gic.h>
#include <asm/gic_v2.h>
#include <asm/irqchip.h>
-#include <asm/setup.h>

/* The GICv2 interface numbering does not necessarily match the logical map */
static u8 gicv2_target_cpu_map[8];
diff --git a/hypervisor/arch/arm-common/gic-v3.c b/hypervisor/arch/arm-common/gic-v3.c
index 2cc22be6..fdb9e1b1 100644
--- a/hypervisor/arch/arm-common/gic-v3.c
+++ b/hypervisor/arch/arm-common/gic-v3.c
@@ -19,7 +19,6 @@
#include <asm/gic.h>
#include <asm/gic_v3.h>
#include <asm/irqchip.h>
-#include <asm/setup.h>
#include <asm/sysregs.h>
#include <asm/traps.h>

diff --git a/hypervisor/arch/arm/mach-vexpress.c b/hypervisor/arch/arm/mach-vexpress.c
index 6a2af381..bb834b4e 100644
--- a/hypervisor/arch/arm/mach-vexpress.c
+++ b/hypervisor/arch/arm/mach-vexpress.c
@@ -16,7 +16,6 @@
#include <jailhouse/mmio.h>
#include <asm/control.h>
#include <asm/mach.h>
-#include <asm/setup.h>

#define SYSREGS_BASE 0x1c010000

--
2.12.3

[Jan Kiszka]

This reorganizes arm/arm64 code to have a better correlation between
headers and code modules. It also pulls assembly code for both initial
and hypervisor entry together. All in all, cosmetics for a better
structure.

Jan

Jan Kiszka (8):
arm, arm-common: Remove unneeded asm/setup.h inclusions
arm-common: Pull arm_*dcaches_flush into common header
arm: Move cpu_prepare_return_el1 out of header
arm: Move setup and hypervisor entry together
arm64: Reorganize code in entry.S
arm64: Move setup and hypervisor entry together
arm: Convert setup.h into mmu_hyp.h
arm-common: Rename setup-common.h to setup.h

hypervisor/arch/arm-common/gic-v2.c | 1 -
hypervisor/arch/arm-common/gic-v3.c | 1 -

hypervisor/arch/arm-common/include/asm/dcaches.h | 28 +++
.../include/asm/{setup-common.h => setup.h} | 0
hypervisor/arch/arm-common/setup.c | 2 +-
hypervisor/arch/arm/Kbuild | 2 +-
hypervisor/arch/arm/entry.S | 60 ++++++
hypervisor/arch/arm/exception.S | 72 -------
hypervisor/arch/arm/include/asm/control.h | 3 -
.../asm/setup-common.h => arm/include/asm/entry.h} | 11 +-
.../setup-common.h => arm/include/asm/mmu_hyp.h} | 10 +-
hypervisor/arch/arm/include/asm/paging.h | 9 +-
hypervisor/arch/arm/include/asm/setup.h | 39 ----
hypervisor/arch/arm/mach-vexpress.c | 1 -
hypervisor/arch/arm/mmu_hyp.c | 7 +-
hypervisor/arch/arm/setup.c | 18 +-
hypervisor/arch/arm64/Kbuild | 3 +-
hypervisor/arch/arm64/entry.S | 219 ++++++++++++++-------
hypervisor/arch/arm64/exception.S | 98 ---------
hypervisor/arch/arm64/include/asm/control.h | 3 -
.../arch/arm64/include/asm/{setup.h => entry.h} | 10 +-
hypervisor/arch/arm64/include/asm/paging.h | 10 +-
hypervisor/arch/arm64/setup.c | 2 +-
hypervisor/arch/arm64/traps.c | 1 +
24 files changed, 278 insertions(+), 332 deletions(-)
create mode 100644 hypervisor/arch/arm-common/include/asm/dcaches.h
copy hypervisor/arch/arm-common/include/asm/{setup-common.h => setup.h} (100%)
delete mode 100644 hypervisor/arch/arm/exception.S
copy hypervisor/arch/{arm-common/include/asm/setup-common.h => arm/include/asm/entry.h} (51%)
rename hypervisor/arch/{arm-common/include/asm/setup-common.h => arm/include/asm/mmu_hyp.h} (50%)
delete mode 100644 hypervisor/arch/arm/include/asm/setup.h
delete mode 100644 hypervisor/arch/arm64/exception.S
rename hypervisor/arch/arm64/include/asm/{setup.h => entry.h} (57%)

--
2.12.3

[Jan Kiszka]

From: Jan Kiszka <jan.k...@siemens.com>

While this split-up makes sense on x86 with the two different CPU
vendors, it's artificial on ARM. So move the hypervisor (exception)
entry over into entry.S and define a corresponding header that holds all
interfaces.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
---

hypervisor/arch/arm/Kbuild | 2 +-
hypervisor/arch/arm/entry.S | 60 ++++++++++++++++++++++++++
hypervisor/arch/arm/exception.S | 72 -------------------------------
hypervisor/arch/arm/include/asm/control.h | 1 -
hypervisor/arch/arm/include/asm/entry.h | 20 +++++++++
hypervisor/arch/arm/mmu_hyp.c | 5 +--
6 files changed, 82 insertions(+), 78 deletions(-)
delete mode 100644 hypervisor/arch/arm/exception.S
create mode 100644 hypervisor/arch/arm/include/asm/entry.h

diff --git a/hypervisor/arch/arm/Kbuild b/hypervisor/arch/arm/Kbuild
index 04e835c6..158759c1 100644
--- a/hypervisor/arch/arm/Kbuild
+++ b/hypervisor/arch/arm/Kbuild
@@ -17,7 +17,7 @@ KBUILD_AFLAGS := $(subst -include asm/unified.h,,$(KBUILD_AFLAGS))
always := built-in.o

obj-y := $(COMMON_OBJECTS)
-obj-y += entry.o exception.o setup.o control.o traps.o mmio.o lib.o
+obj-y += entry.o setup.o control.o traps.o mmio.o lib.o
obj-y += mmu_hyp.o caches.o mach-stubs.o

# in here we switch of the MMU and stuff, cant profile such code
diff --git a/hypervisor/arch/arm/entry.S b/hypervisor/arch/arm/entry.S
index 53469e80..7ea6895b 100644
--- a/hypervisor/arch/arm/entry.S
+++ b/hypervisor/arch/arm/entry.S
@@ -14,6 +14,8 @@
#include <asm/percpu.h>
#include <asm/processor.h>

+ .arch_extension virt
+
/* Entry point for Linux loader module on JAILHOUSE_ENABLE */
.text
.globl arch_entry
@@ -63,6 +65,7 @@ arch_entry:
pop {r1 - r12}
subs pc, lr, #0

+
.globl bootstrap_vectors
.align 5
bootstrap_vectors:
@@ -83,3 +86,60 @@ setup_el2:
mov sp, r1

bx lr
+
+
+ .globl hyp_vectors
+ .align 5
+hyp_vectors:
+ b .
+ b hyp_undef
+ b hyp_hvc
+ b hyp_pabt
+ b hyp_dabt
+ b hyp_trap
+ b hyp_irq
+ b hyp_fiq
+
+.macro handle_vmexit exit_reason
+ /* Fill the struct registers. Should comply with NUM_USR_REGS */
+ push {r0-r12, lr}
+ mov r0, #\exit_reason
+ b vmexit_common
+.endm
+
+hyp_undef:
+ handle_vmexit EXIT_REASON_UNDEF
+hyp_hvc:
+ handle_vmexit EXIT_REASON_HVC
+hyp_pabt:
+ handle_vmexit EXIT_REASON_PABT
+hyp_dabt:
+ handle_vmexit EXIT_REASON_DABT
+
+hyp_irq:
+ handle_vmexit EXIT_REASON_IRQ
+hyp_fiq:
+ handle_vmexit EXIT_REASON_FIQ
+hyp_trap:
+ handle_vmexit EXIT_REASON_TRAP
+
+vmexit_common:
+ push {r0}
+
+ arm_read_sysreg(TPIDR_EL2, r0)
+ mov r1, sp
+ bl arch_handle_exit
+
+
+ /*
+ * Because the hypervisor may call vmreturn to reset the stack,
+ * arch_handle_exit has to return with the guest registers in r0
+ */
+ .globl vmreturn
+vmreturn:
+ mov sp, r0
+ add sp, #4
+
+ /* Restore usr regs */
+ pop {r0-r12, lr}
+ eret
diff --git a/hypervisor/arch/arm/exception.S b/hypervisor/arch/arm/exception.S
deleted file mode 100644
index 8c0ce6a8..00000000
--- a/hypervisor/arch/arm/exception.S
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * Jailhouse, a Linux-based partitioning hypervisor
- *
- * Copyright (c) ARM Limited, 2014
- *
- * Authors:
- * Jean-Philippe Brucker <jean-phili...@arm.com>
- *
- * This work is licensed under the terms of the GNU GPL, version 2. See
- * the COPYING file in the top-level directory.
- */
-
-#include <asm/processor.h>
-#include <asm/sysregs.h>
-
- .arch_extension virt
-
- .text
- .globl hyp_vectors
- .align 5
-hyp_vectors:
- b .
- b hyp_undef
- b hyp_hvc
- b hyp_pabt
- b hyp_dabt
- b hyp_trap
- b hyp_irq
- b hyp_fiq
-
-.macro handle_vmexit exit_reason
- /* Fill the struct registers. Should comply with NUM_USR_REGS */
- push {r0-r12, lr}
- mov r0, #\exit_reason
- b vmexit_common
-.endm
-
-hyp_undef:
- handle_vmexit EXIT_REASON_UNDEF
-hyp_hvc:
- handle_vmexit EXIT_REASON_HVC
-hyp_pabt:
- handle_vmexit EXIT_REASON_PABT
-hyp_dabt:
- handle_vmexit EXIT_REASON_DABT
-
-hyp_irq:
- handle_vmexit EXIT_REASON_IRQ
-hyp_fiq:
- handle_vmexit EXIT_REASON_FIQ
-hyp_trap:
- handle_vmexit EXIT_REASON_TRAP
-
-vmexit_common:
- push {r0}
-
- arm_read_sysreg(TPIDR_EL2, r0)
- mov r1, sp
- bl arch_handle_exit
-
- /*
- * Because the hypervisor may call vmreturn to reset the stack,
- * arch_handle_exit has to return with the guest registers in r0
- */
- .globl vmreturn
-vmreturn:
- mov sp, r0
- add sp, #4
-
- /* Restore usr regs */
- pop {r0-r12, lr}
- eret
diff --git a/hypervisor/arch/arm/include/asm/control.h b/hypervisor/arch/arm/include/asm/control.h
index 481ca195..fd3bea03 100644
--- a/hypervisor/arch/arm/include/asm/control.h
+++ b/hypervisor/arch/arm/include/asm/control.h
@@ -36,7 +36,6 @@ void arch_shutdown_self(struct per_cpu *cpu_data);

unsigned int arm_cpu_by_mpidr(struct cell *cell, unsigned long mpidr);

-void __attribute__((noreturn)) vmreturn(struct registers *guest_regs);
void __attribute__((noreturn)) arch_shutdown_mmu(struct per_cpu *cpu_data);

void arm_cpu_reset(unsigned long pc);
diff --git a/hypervisor/arch/arm/include/asm/entry.h b/hypervisor/arch/arm/include/asm/entry.h
new file mode 100644
index 00000000..007a264d
--- /dev/null
+++ b/hypervisor/arch/arm/include/asm/entry.h
@@ -0,0 +1,20 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Copyright (c) ARM Limited, 2014
+ * Copyright (c) Siemens AG, 2017
+ *
+ * Authors:
+ * Jean-Philippe Brucker <jean-phili...@arm.com>
+ * Jan Kiszka <jan.k...@siemens.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <asm/processor.h>
+
+extern unsigned long bootstrap_vectors;
+extern unsigned long hyp_vectors;
+
+void __attribute__((noreturn)) vmreturn(struct registers *guest_regs);
diff --git a/hypervisor/arch/arm/mmu_hyp.c b/hypervisor/arch/arm/mmu_hyp.c
index 765160b6..aa58fbbb 100644
--- a/hypervisor/arch/arm/mmu_hyp.c
+++ b/hypervisor/arch/arm/mmu_hyp.c
@@ -12,7 +12,7 @@

#include <jailhouse/paging.h>
#include <jailhouse/printk.h>
-#include <asm/control.h>
+#include <asm/entry.h>
#include <asm/setup.h>
#include <asm/sysregs.h>

@@ -257,9 +257,6 @@ static void check_mmu_map(unsigned long virt_addr, unsigned long phys_addr)
*/
int switch_exception_level(struct per_cpu *cpu_data)
{
- extern unsigned long bootstrap_vectors;
- extern unsigned long hyp_vectors;
-
/* Save the virtual address of the phys2virt function for later */
phys2virt_t phys2virt = paging_phys2hvirt;
virt2phys_t virt2phys = paging_hvirt2phys;
--
2.12.3

[Jan Kiszka]

From: Jan Kiszka <jan.k...@siemens.com>

This inline function is just a local helper to mmu_hyp.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
---

hypervisor/arch/arm/include/asm/setup.h | 16 ----------------
hypervisor/arch/arm/setup.c | 16 ++++++++++++++++
2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/hypervisor/arch/arm/include/asm/setup.h b/hypervisor/arch/arm/include/asm/setup.h
index f555e4d3..a4d927c0 100644
--- a/hypervisor/arch/arm/include/asm/setup.h
+++ b/hypervisor/arch/arm/include/asm/setup.h
@@ -17,22 +17,6 @@

#ifndef __ASSEMBLY__

-static inline void __attribute__((always_inline))
-cpu_prepare_return_el1(struct per_cpu *cpu_data, int return_code)
-{
- cpu_data->linux_reg[0] = return_code;
-
- asm volatile (
- "msr sp_svc, %0\n\t"
- "msr elr_hyp, %1\n\t"
- "msr spsr_hyp, %2\n\t"
- :
- : "r" (cpu_data->linux_sp +
- (NUM_ENTRY_REGS * sizeof(unsigned long))),
- "r" (cpu_data->linux_ret),
- "r" (cpu_data->linux_flags));
-}
-
int switch_exception_level(struct per_cpu *cpu_data);

#endif /* !__ASSEMBLY__ */
diff --git a/hypervisor/arch/arm/setup.c b/hypervisor/arch/arm/setup.c
index ec260a11..997bf438 100644
--- a/hypervisor/arch/arm/setup.c
+++ b/hypervisor/arch/arm/setup.c
@@ -90,6 +90,22 @@ int arch_init_late(void)
return arm_init_late();
}

+static inline void __attribute__((always_inline))
+cpu_prepare_return_el1(struct per_cpu *cpu_data, int return_code)
+{
+ cpu_data->linux_reg[0] = return_code;
+
+ asm volatile (
+ "msr sp_svc, %0\n\t"
+ "msr elr_hyp, %1\n\t"
+ "msr spsr_hyp, %2\n\t"
+ :
+ : "r" (cpu_data->linux_sp +
+ (NUM_ENTRY_REGS * sizeof(unsigned long))),
+ "r" (cpu_data->linux_ret),
+ "r" (cpu_data->linux_flags));
+}
+
void __attribute__((noreturn)) arch_cpu_activate_vmm(struct per_cpu *cpu_data)
{
/* Return to the kernel */
--
2.12.3

[Jan Kiszka]

From: Jan Kiszka <jan.k...@siemens.com>

No need to declare those prototypes and the enum twice.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
---

hypervisor/arch/arm-common/include/asm/dcaches.h | 28 ++++++++++++++++++++++++
hypervisor/arch/arm/include/asm/paging.h | 9 +-------
hypervisor/arch/arm64/include/asm/paging.h | 10 +--------
3 files changed, 30 insertions(+), 17 deletions(-)
create mode 100644 hypervisor/arch/arm-common/include/asm/dcaches.h

diff --git a/hypervisor/arch/arm-common/include/asm/dcaches.h b/hypervisor/arch/arm-common/include/asm/dcaches.h
new file mode 100644
index 00000000..73c2722e
--- /dev/null
+++ b/hypervisor/arch/arm-common/include/asm/dcaches.h
@@ -0,0 +1,28 @@

+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Copyright (c) ARM Limited, 2014
+ * Copyright (c) Siemens AG, 2017
+ *
+ * Authors:
+ * Jean-Philippe Brucker <jean-phili...@arm.com>
+ * Jan Kiszka <jan.k...@siemens.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+

+#ifndef __ASSEMBLY__
+
+struct cell;
+
+enum dcache_flush {
+ DCACHE_CLEAN,
+ DCACHE_INVALIDATE,
+ DCACHE_CLEAN_AND_INVALIDATE,
+};
+
+void arm_dcaches_flush(void *addr, long size, enum dcache_flush flush);
+void arm_cell_dcaches_flush(struct cell *cell, enum dcache_flush flush);
+
+#endif /* !__ASSEMBLY__ */
diff --git a/hypervisor/arch/arm/include/asm/paging.h b/hypervisor/arch/arm/include/asm/paging.h
index e6116a21..a7e58e18 100644
--- a/hypervisor/arch/arm/include/asm/paging.h
+++ b/hypervisor/arch/arm/include/asm/paging.h
@@ -15,6 +15,7 @@

#include <jailhouse/types.h>
#include <jailhouse/utils.h>
+#include <asm/dcaches.h>
#include <asm/processor.h>
#include <asm/sysregs.h>

@@ -175,12 +176,6 @@ struct paging_structures;

typedef u64 *pt_entry_t;

-enum dcache_flush {
- DCACHE_CLEAN,
- DCACHE_INVALIDATE,
- DCACHE_CLEAN_AND_INVALIDATE,
-};
-
extern unsigned int cpu_parange;
extern unsigned int cache_line_size;

@@ -189,8 +184,6 @@ void arm_paging_cell_destroy(struct cell *cell);

void arm_paging_vcpu_init(struct paging_structures *pg_structs);

-void arm_dcaches_flush(void *addr, long size, enum dcache_flush flush);
-void arm_cell_dcaches_flush(struct cell *cell, enum dcache_flush flush);
void arm_dcaches_clean_by_sw(void);

static inline void arm_paging_vcpu_flush_tlbs(void)
diff --git a/hypervisor/arch/arm64/include/asm/paging.h b/hypervisor/arch/arm64/include/asm/paging.h
index 1d2ff061..0fe1429d 100644
--- a/hypervisor/arch/arm64/include/asm/paging.h
+++ b/hypervisor/arch/arm64/include/asm/paging.h
@@ -15,6 +15,7 @@

#include <jailhouse/types.h>
#include <jailhouse/utils.h>
+#include <asm/dcaches.h>
#include <asm/processor.h>
#include <asm/sysregs.h>

@@ -175,12 +176,6 @@ struct paging_structures;

typedef u64 *pt_entry_t;

-enum dcache_flush {
- DCACHE_CLEAN,
- DCACHE_INVALIDATE,
- DCACHE_CLEAN_AND_INVALIDATE,
-};
-
extern unsigned int cpu_parange;

/* return the bits supported for the physical address range for this
@@ -241,9 +236,6 @@ static inline unsigned int get_cpu_parange(void)
| (TCR_PS_CELL << TCR_PS_SHIFT) \
| VTCR_RES1)

-void arm_dcaches_flush(void *addr, long size, enum dcache_flush flush);
-void arm_cell_dcaches_flush(struct cell *cell, enum dcache_flush flush);
-
int arm_paging_cell_init(struct cell *cell);
void arm_paging_cell_destroy(struct cell *cell);

--
2.12.3

[Jan Kiszka]

From: Jan Kiszka <jan.k...@siemens.com>

Move the functions of the trampoline section to the end and put enabling
before shutdown. And bootstrap_vectors is not used outside of this
module.

No functional changes.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
---

hypervisor/arch/arm64/entry.S | 143 +++++++++++++++++++++---------------------
1 file changed, 71 insertions(+), 72 deletions(-)

diff --git a/hypervisor/arch/arm64/entry.S b/hypervisor/arch/arm64/entry.S
index 6f16b326..ff57c79e 100644
--- a/hypervisor/arch/arm64/entry.S
+++ b/hypervisor/arch/arm64/entry.S
@@ -165,77 +165,6 @@ el2_entry:
b .


- .pushsection .trampoline, "ax"
- .globl shutdown_el2
-shutdown_el2:
- /* x0: struct percpu* */
-
- /*
- * Disable the hypervisor MMU.
- *
- * Note: no data accesses must be done after turning MMU off unless the
- * target region has been flushed out of D-cache.
- */
- mrs x1, sctlr_el2
- ldr x2, =(SCTLR_M_BIT | SCTLR_C_BIT | SCTLR_I_BIT)
- bic x1, x1, x2
- msr sctlr_el2, x1
- isb
-
- msr mair_el2, xzr
- msr ttbr0_el2, xzr
- msr tcr_el2, xzr
- isb
-
- msr tpidr_el2, xzr
-
- /* Call vmreturn(guest_registers) */
- add x0, x0, #(PERCPU_STACK_END - 32 * 8)
- b vmreturn
-
-
- .globl enable_mmu_el2
-enable_mmu_el2:
- /*
- * x0: u64 ttbr0_el2
- */
-
- /* setup the MMU for EL2 hypervisor mappings */
- ldr x1, =DEFAULT_MAIR_EL2
- msr mair_el2, x1
-
- /* AARCH64_TODO: ARM architecture supports CPU clusters which could be
- * in separate inner shareable domains. At the same time: "The Inner
- * Shareable domain is expected to be the set of PEs controlled by
- * a single hypervisor or operating system." (see p. 93 of ARM ARM)
- * We should think what hw configuration we support by one instance of
- * the hypervisor and choose Inner or Outer sharable domain.
- */
- ldr x1, =(T0SZ(48) | (TCR_RGN_WB_WA << TCR_IRGN0_SHIFT) \
- | (TCR_RGN_WB_WA << TCR_ORGN0_SHIFT) \
- | (TCR_INNER_SHAREABLE << TCR_SH0_SHIFT) \
- | (PARANGE_48B << TCR_PS_SHIFT) \
- | TCR_EL2_RES1)
- msr tcr_el2, x1
-
- msr ttbr0_el2, x0
-
- isb
- tlbi alle2
- dsb nsh
-
- /* Enable MMU, allow cacheability for instructions and data */
- ldr x1, =(SCTLR_I_BIT | SCTLR_C_BIT | SCTLR_M_BIT | SCTLR_EL2_RES1)
- msr sctlr_el2, x1
-
- isb
- tlbi alle2
- dsb nsh
-
- ret
- .popsection
-
-
/*
* macros used by init_bootstrap_pt
*/
@@ -320,7 +249,6 @@ init_bootstrap_pt:
b \label
.endm

- .globl bootstrap_vectors
.align 11
bootstrap_vectors:
ventry .
@@ -342,3 +270,74 @@ bootstrap_vectors:
ventry .
ventry .
ventry .
+
+
+ .pushsection .trampoline, "ax"
+ .globl enable_mmu_el2
+enable_mmu_el2:
+ /*
+ * x0: u64 ttbr0_el2
+ */
+
+ /* setup the MMU for EL2 hypervisor mappings */
+ ldr x1, =DEFAULT_MAIR_EL2
+ msr mair_el2, x1
+
+ /* AARCH64_TODO: ARM architecture supports CPU clusters which could be
+ * in separate inner shareable domains. At the same time: "The Inner
+ * Shareable domain is expected to be the set of PEs controlled by
+ * a single hypervisor or operating system." (see p. 93 of ARM ARM)
+ * We should think what hw configuration we support by one instance of
+ * the hypervisor and choose Inner or Outer sharable domain.
+ */
+ ldr x1, =(T0SZ(48) | (TCR_RGN_WB_WA << TCR_IRGN0_SHIFT) \
+ | (TCR_RGN_WB_WA << TCR_ORGN0_SHIFT) \
+ | (TCR_INNER_SHAREABLE << TCR_SH0_SHIFT) \
+ | (PARANGE_48B << TCR_PS_SHIFT) \
+ | TCR_EL2_RES1)
+ msr tcr_el2, x1
+
+ msr ttbr0_el2, x0
+
+ isb
+ tlbi alle2
+ dsb nsh
+
+ /* Enable MMU, allow cacheability for instructions and data */
+ ldr x1, =(SCTLR_I_BIT | SCTLR_C_BIT | SCTLR_M_BIT | SCTLR_EL2_RES1)
+ msr sctlr_el2, x1
+
+ isb
+ tlbi alle2
+ dsb nsh
+
+ ret
+
+
+ .globl shutdown_el2
+shutdown_el2:
+ /* x0: struct percpu* */
+
+ /*
+ * Disable the hypervisor MMU.
+ *
+ * Note: no data accesses must be done after turning MMU off unless the
+ * target region has been flushed out of D-cache.
+ */
+ mrs x1, sctlr_el2
+ ldr x2, =(SCTLR_M_BIT | SCTLR_C_BIT | SCTLR_I_BIT)
+ bic x1, x1, x2
+ msr sctlr_el2, x1
+ isb
+
+ msr mair_el2, xzr
+ msr ttbr0_el2, xzr
+ msr tcr_el2, xzr
+ isb
+
+ msr tpidr_el2, xzr
+
+ /* Call vmreturn(guest_registers) */
+ add x0, x0, #(PERCPU_STACK_END - 32 * 8)
+ b vmreturn
+ .popsection
--
2.12.3

[Jan Kiszka]

From: Jan Kiszka <jan.k...@siemens.com>

This new header contains everything that mmu_hyp.c exports, while
setup.h suggested to be related to setup.c.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
---

hypervisor/arch/arm/include/asm/control.h | 2 --
hypervisor/arch/arm/include/asm/{setup.h => mmu_hyp.h} | 8 +-------
hypervisor/arch/arm/mmu_hyp.c | 2 +-
hypervisor/arch/arm/setup.c | 2 +-
4 files changed, 3 insertions(+), 11 deletions(-)
rename hypervisor/arch/arm/include/asm/{setup.h => mmu_hyp.h} (71%)

diff --git a/hypervisor/arch/arm/include/asm/control.h b/hypervisor/arch/arm/include/asm/control.h
index fd3bea03..0b7cb371 100644
--- a/hypervisor/arch/arm/include/asm/control.h
+++ b/hypervisor/arch/arm/include/asm/control.h
@@ -36,8 +36,6 @@ void arch_shutdown_self(struct per_cpu *cpu_data);

unsigned int arm_cpu_by_mpidr(struct cell *cell, unsigned long mpidr);

-void __attribute__((noreturn)) arch_shutdown_mmu(struct per_cpu *cpu_data);
-
void arm_cpu_reset(unsigned long pc);
void arm_cpu_park(void);
void arm_cpu_kick(unsigned int cpu_id);
diff --git a/hypervisor/arch/arm/include/asm/setup.h b/hypervisor/arch/arm/include/asm/mmu_hyp.h
similarity index 71%
rename from hypervisor/arch/arm/include/asm/setup.h
rename to hypervisor/arch/arm/include/asm/mmu_hyp.h
index a4d927c0..9a78ac4a 100644
--- a/hypervisor/arch/arm/include/asm/setup.h
+++ b/hypervisor/arch/arm/include/asm/mmu_hyp.h
@@ -10,14 +10,8 @@

* the COPYING file in the top-level directory.

*/

-#ifndef _JAILHOUSE_ASM_SETUP_H
-#define _JAILHOUSE_ASM_SETUP_H
-
#include <asm/percpu.h>

-#ifndef __ASSEMBLY__

-
int switch_exception_level(struct per_cpu *cpu_data);

-#endif /* !__ASSEMBLY__ */
-#endif /* !_JAILHOUSE_ASM_SETUP_H */
+void __attribute__((noreturn)) arch_shutdown_mmu(struct per_cpu *cpu_data);
diff --git a/hypervisor/arch/arm/mmu_hyp.c b/hypervisor/arch/arm/mmu_hyp.c
index aa58fbbb..5fd778a6 100644
--- a/hypervisor/arch/arm/mmu_hyp.c
+++ b/hypervisor/arch/arm/mmu_hyp.c
@@ -13,7 +13,7 @@
#include <jailhouse/paging.h>
#include <jailhouse/printk.h>
#include <asm/entry.h>
-#include <asm/setup.h>
+#include <asm/mmu_hyp.h>
#include <asm/sysregs.h>

/* This is only used if we use the new hyp-stub ABI that was introduced in
diff --git a/hypervisor/arch/arm/setup.c b/hypervisor/arch/arm/setup.c
index 997bf438..03a0b75a 100644
--- a/hypervisor/arch/arm/setup.c
+++ b/hypervisor/arch/arm/setup.c
@@ -16,7 +16,7 @@
#include <jailhouse/string.h>

#include <asm/control.h>
#include <asm/mach.h>
-#include <asm/setup.h>

+#include <asm/mmu_hyp.h>
#include <asm/setup-common.h>
#include <asm/sysregs.h>

--
2.12.3

[Jan Kiszka]

From: Jan Kiszka <jan.k...@siemens.com>

The namespace is now free, so let's use it.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
---

hypervisor/arch/arm-common/include/asm/{setup-common.h => setup.h} | 0
hypervisor/arch/arm-common/setup.c | 2 +-
hypervisor/arch/arm/setup.c | 2 +-
hypervisor/arch/arm64/setup.c | 2 +-
4 files changed, 3 insertions(+), 3 deletions(-)
rename hypervisor/arch/arm-common/include/asm/{setup-common.h => setup.h} (100%)

diff --git a/hypervisor/arch/arm-common/include/asm/setup-common.h b/hypervisor/arch/arm-common/include/asm/setup.h
similarity index 100%
rename from hypervisor/arch/arm-common/include/asm/setup-common.h
rename to hypervisor/arch/arm-common/include/asm/setup.h
diff --git a/hypervisor/arch/arm-common/setup.c b/hypervisor/arch/arm-common/setup.c
index 16b8ea4d..bb5dd6da 100644
--- a/hypervisor/arch/arm-common/setup.c
+++ b/hypervisor/arch/arm-common/setup.c
@@ -13,7 +13,7 @@
#include <jailhouse/control.h>
#include <jailhouse/paging.h>
#include <jailhouse/processor.h>
-#include <asm/setup-common.h>
+#include <asm/setup.h>

static u32 __attribute__((aligned(PAGE_SIZE))) parking_code[PAGE_SIZE / 4] = {
ARM_PARKING_CODE
diff --git a/hypervisor/arch/arm/setup.c b/hypervisor/arch/arm/setup.c
index 03a0b75a..c466ae1e 100644
--- a/hypervisor/arch/arm/setup.c
+++ b/hypervisor/arch/arm/setup.c
@@ -17,7 +17,7 @@
#include <asm/control.h>
#include <asm/mach.h>
#include <asm/mmu_hyp.h>
-#include <asm/setup-common.h>
+#include <asm/setup.h>
#include <asm/sysregs.h>

unsigned int cache_line_size;
diff --git a/hypervisor/arch/arm64/setup.c b/hypervisor/arch/arm64/setup.c
index f304a4e1..832c8b7f 100644
--- a/hypervisor/arch/arm64/setup.c
+++ b/hypervisor/arch/arm64/setup.c
@@ -18,7 +18,7 @@
#include <asm/control.h>
#include <asm/entry.h>
#include <asm/irqchip.h>
-#include <asm/setup-common.h>
+#include <asm/setup.h>

extern u8 __trampoline_start[];

--
2.12.3

[Jan Kiszka]

From: Jan Kiszka <jan.k...@siemens.com>

Same reasoning and some strategy as for arm: pull the exception code
into entry.S. This allows to shutdown_el2 to fall through to vmreturn.
asm/setup.h effectively becomes the new entry.h here.

Signed-off-by: Jan Kiszka <jan.k...@siemens.com>
---

hypervisor/arch/arm64/Kbuild | 3 +-
hypervisor/arch/arm64/entry.S | 80 +++++++++++++++++-
hypervisor/arch/arm64/exception.S | 98 ----------------------
hypervisor/arch/arm64/include/asm/control.h | 3 -
.../arch/arm64/include/asm/{setup.h => entry.h} | 10 +--

hypervisor/arch/arm64/setup.c | 2 +-
hypervisor/arch/arm64/traps.c | 1 +

7 files changed, 86 insertions(+), 111 deletions(-)

delete mode 100644 hypervisor/arch/arm64/exception.S
rename hypervisor/arch/arm64/include/asm/{setup.h => entry.h} (57%)

diff --git a/hypervisor/arch/arm64/Kbuild b/hypervisor/arch/arm64/Kbuild
index 91c2a912..26b9ff36 100644
--- a/hypervisor/arch/arm64/Kbuild
+++ b/hypervisor/arch/arm64/Kbuild
@@ -17,5 +17,4 @@ include $(src)/../arm-common/Kbuild

always := built-in.o

obj-y := $(COMMON_OBJECTS)

-obj-y += entry.o setup.o control.o mmio.o caches.o
-obj-y += exception.o traps.o
+obj-y += entry.o setup.o control.o mmio.o caches.o traps.o
diff --git a/hypervisor/arch/arm64/entry.S b/hypervisor/arch/arm64/entry.S
index ff57c79e..61c5dc49 100644
--- a/hypervisor/arch/arm64/entry.S
+++ b/hypervisor/arch/arm64/entry.S
@@ -272,6 +272,59 @@ bootstrap_vectors:
ventry .


+.macro handle_vmexit exit_reason
+ .align 7

+ /* Fill the struct registers. Should comply with NUM_USR_REGS */

+ stp x29, x30, [sp, #-16]!
+ stp x27, x28, [sp, #-16]!
+ stp x25, x26, [sp, #-16]!
+ stp x23, x24, [sp, #-16]!
+ stp x21, x22, [sp, #-16]!
+ stp x19, x20, [sp, #-16]!
+ stp x17, x18, [sp, #-16]!
+ stp x15, x16, [sp, #-16]!
+ stp x13, x14, [sp, #-16]!
+ stp x11, x12, [sp, #-16]!
+ stp x9, x10, [sp, #-16]!
+ stp x7, x8, [sp, #-16]!
+ stp x5, x6, [sp, #-16]!
+ stp x3, x4, [sp, #-16]!
+ stp x1, x2, [sp, #-16]!
+
+ mov x1, #\exit_reason
+ stp x1, x0, [sp, #-16]!
+
+ mov x29, xzr /* reset fp,lr */
+ mov x30, xzr
+ mrs x0, tpidr_el2
+ mov x1, sp
+ bl arch_handle_exit
+ b .
+.endm
+
+ .align 11
+hyp_vectors:
+ ventry .
+ ventry .
+ ventry .
+ ventry .
+
+ handle_vmexit EXIT_REASON_EL2_ABORT
+ ventry .
+ ventry .
+ ventry .
+
+ handle_vmexit EXIT_REASON_EL1_ABORT
+ handle_vmexit EXIT_REASON_EL1_IRQ
+ ventry .
+ ventry .
+
+ ventry .
+ ventry .
+ ventry .
+ ventry .

+
+
.pushsection .trampoline, "ax"

.globl enable_mmu_el2
enable_mmu_el2:
@@ -337,7 +390,30 @@ shutdown_el2:

msr tpidr_el2, xzr

- /* Call vmreturn(guest_registers) */

+ /* Prepare continuation as vmreturn(guest_registers). */

add x0, x0, #(PERCPU_STACK_END - 32 * 8)
- b vmreturn

+
+ /* Fall through to vmreturn */
+
+ .globl vmreturn
+vmreturn:
+ /* x0: struct registers* */
+ mov sp, x0
+ ldp x1, x0, [sp], #16 /* x1 is the exit_reason */
+ ldp x1, x2, [sp], #16
+ ldp x3, x4, [sp], #16
+ ldp x5, x6, [sp], #16
+ ldp x7, x8, [sp], #16
+ ldp x9, x10, [sp], #16
+ ldp x11, x12, [sp], #16
+ ldp x13, x14, [sp], #16
+ ldp x15, x16, [sp], #16
+ ldp x17, x18, [sp], #16
+ ldp x19, x20, [sp], #16
+ ldp x21, x22, [sp], #16
+ ldp x23, x24, [sp], #16
+ ldp x25, x26, [sp], #16
+ ldp x27, x28, [sp], #16
+ ldp x29, x30, [sp], #16
+ eret
.popsection
diff --git a/hypervisor/arch/arm64/exception.S b/hypervisor/arch/arm64/exception.S
deleted file mode 100644
index 3e5d8eb9..00000000
--- a/hypervisor/arch/arm64/exception.S
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- * Jailhouse AArch64 support
- *
- * Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH

- *
- * Authors:

- * Antonios Motakis <antonios...@huawei.com>

- *
- * This work is licensed under the terms of the GNU GPL, version 2. See
- * the COPYING file in the top-level directory.
- */
-
-#include <asm/processor.h>
-#include <asm/sysregs.h>
-

-.macro ventry label
- .align 7
- b \label
-.endm
-
-.macro handle_vmexit exit_reason
- .align 7

- /* Fill the struct registers. Should comply with NUM_USR_REGS */

- stp x29, x30, [sp, #-16]!
- stp x27, x28, [sp, #-16]!
- stp x25, x26, [sp, #-16]!
- stp x23, x24, [sp, #-16]!
- stp x21, x22, [sp, #-16]!
- stp x19, x20, [sp, #-16]!
- stp x17, x18, [sp, #-16]!
- stp x15, x16, [sp, #-16]!
- stp x13, x14, [sp, #-16]!
- stp x11, x12, [sp, #-16]!
- stp x9, x10, [sp, #-16]!
- stp x7, x8, [sp, #-16]!
- stp x5, x6, [sp, #-16]!
- stp x3, x4, [sp, #-16]!
- stp x1, x2, [sp, #-16]!
-
- mov x1, #\exit_reason
- stp x1, x0, [sp, #-16]!
-
- mov x29, xzr /* reset fp,lr */
- mov x30, xzr
- mrs x0, tpidr_el2
- mov x1, sp
- bl arch_handle_exit
- b .
-.endm

-
- .text
- .globl hyp_vectors

- .align 11
-hyp_vectors:
- ventry .
- ventry .
- ventry .
- ventry .
-
- handle_vmexit EXIT_REASON_EL2_ABORT
- ventry .
- ventry .
- ventry .
-
- handle_vmexit EXIT_REASON_EL1_ABORT
- handle_vmexit EXIT_REASON_EL1_IRQ
- ventry .
- ventry .
-
- ventry .
- ventry .
- ventry .
- ventry .
-
-
- .pushsection .trampoline, "ax"
- .globl vmreturn
-vmreturn:
- /* x0: struct registers* */
- mov sp, x0
- ldp x1, x0, [sp], #16 /* x1 is the exit_reason */
- ldp x1, x2, [sp], #16
- ldp x3, x4, [sp], #16
- ldp x5, x6, [sp], #16
- ldp x7, x8, [sp], #16
- ldp x9, x10, [sp], #16
- ldp x11, x12, [sp], #16
- ldp x13, x14, [sp], #16
- ldp x15, x16, [sp], #16
- ldp x17, x18, [sp], #16
- ldp x19, x20, [sp], #16
- ldp x21, x22, [sp], #16
- ldp x23, x24, [sp], #16
- ldp x25, x26, [sp], #16
- ldp x27, x28, [sp], #16
- ldp x29, x30, [sp], #16
- eret
- .popsection
diff --git a/hypervisor/arch/arm64/include/asm/control.h b/hypervisor/arch/arm64/include/asm/control.h
index 014c3d7a..904eb4ea 100644
--- a/hypervisor/arch/arm64/include/asm/control.h
+++ b/hypervisor/arch/arm64/include/asm/control.h
@@ -32,9 +32,6 @@ void arch_reset_self(struct per_cpu *cpu_data);

void arch_shutdown_self(struct per_cpu *cpu_data);
unsigned int arm_cpu_by_mpidr(struct cell *cell, unsigned long mpidr);

-void __attribute__((noreturn)) vmreturn(struct registers *guest_regs);
-void __attribute__((noreturn)) shutdown_el2(struct per_cpu *cpu_data);

-
void arm_cpu_reset(unsigned long pc);
void arm_cpu_park(void);
void arm_cpu_kick(unsigned int cpu_id);

diff --git a/hypervisor/arch/arm64/include/asm/setup.h b/hypervisor/arch/arm64/include/asm/entry.h
similarity index 57%
rename from hypervisor/arch/arm64/include/asm/setup.h
rename to hypervisor/arch/arm64/include/asm/entry.h
index 81161f85..0aa3a227 100644
--- a/hypervisor/arch/arm64/include/asm/setup.h
+++ b/hypervisor/arch/arm64/include/asm/entry.h
@@ -2,19 +2,19 @@
* Jailhouse AArch64 support
*
* Copyright (C) 2015 Huawei Technologies Duesseldorf GmbH

+ * Copyright (c) Siemens AG, 2017

*
* Authors:
* Antonios Motakis <antonios...@huawei.com>

+ * Jan Kiszka <jan.k...@siemens.com>

*

* This work is licensed under the terms of the GNU GPL, version 2. See

* the COPYING file in the top-level directory.
*/

-#ifndef _JAILHOUSE_ASM_SETUP_H
-#define _JAILHOUSE_ASM_SETUP_H
-

-#include <jailhouse/types.h>
+#include <asm/percpu.h>

void enable_mmu_el2(u64 ttbr0_el2);
+void __attribute__((noreturn)) shutdown_el2(struct per_cpu *cpu_data);

-#endif /* !_JAILHOUSE_ASM_SETUP_H */
+void __attribute__((noreturn)) vmreturn(struct registers *guest_regs);
diff --git a/hypervisor/arch/arm64/setup.c b/hypervisor/arch/arm64/setup.c
index e46f5bee..f304a4e1 100644
--- a/hypervisor/arch/arm64/setup.c
+++ b/hypervisor/arch/arm64/setup.c
@@ -16,8 +16,8 @@
#include <jailhouse/printk.h>
#include <jailhouse/processor.h>
#include <asm/control.h>
+#include <asm/entry.h>
#include <asm/irqchip.h>
-#include <asm/setup.h>
#include <asm/setup-common.h>

extern u8 __trampoline_start[];
diff --git a/hypervisor/arch/arm64/traps.c b/hypervisor/arch/arm64/traps.c
index 4a35d0d5..cd309233 100644
--- a/hypervisor/arch/arm64/traps.c
+++ b/hypervisor/arch/arm64/traps.c
@@ -14,6 +14,7 @@
#include <jailhouse/control.h>
#include <jailhouse/printk.h>
#include <asm/control.h>
+#include <asm/entry.h>
#include <asm/gic.h>
#include <asm/mmio.h>
#include <asm/psci.h>
--
2.12.3