punching from fortran in sim1130?

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Doug Wegscheid

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Apr 22, 2018, 2:05:49 PM4/22/18
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I am running the 2012 pre-compiled Windows version of the sim1130, and I am trying to punch cards from a Fortran program.

This program prints CONSOLE on the CONSOLE, seems to punch the " CARD PUNCH" card, print CONSOLE on the CONSOLE, prints the first switch setting on the console. Somehow, it then punches
// XEQ
// CPRNT
// * RETURNED FROM PROGRAM
// CEND


and then goes into a loop punching a *LOT* of blank cards.

Here is my job deck, and the script I use to run it is furthur down:

// JOB
// FOR
*one word integers
*list all
*iocs(card,typewriter)
**card punch test program
      write (1, 9996)
9996  format (8h console)
      write (2, 9997)
9997  format (11h card punch)
      write (1, 9996)
C      pause 1111
      do 100 i = 1, 16
        ii = i - 1
        CALL DATSW(II, J)
        write (1, 8888) ii, j
        write (2, 8888) ii, j
8888    format (7h switch, i3, 2h =, i2)
100   continue
      write (1, 9992)
9992  format (13h console done)
      write (2, 9991)
9991  format (8h cp done)
      call exit
      end
// CPRNT
// * about to XEQ
// CEND
// XEQ
// CPRNT
// * returned from program
// CEND


the script:

reset
detach prt
detach ptp
detach cp
delete %1.prt
delete %1.ptp
delete %1.cp

att dsk dms.dsk
att prt %1.prt
att cr %1.job
att ptp %1.ptp
att cp %1.cp
boot dsk

detach prt
detach ptp
detach cp

Richard Stofer

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Apr 22, 2018, 2:23:24 PM4/22/18
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I have never used CPRT CEND and I wonder what is happening to Working Storage – maybe nothing…

 

I would put the //XEQ right after the ‘end’ statement and skip the CPRT stuff just to test.

 

OR, I would save the WS to UA and execute it later as a named program.

 

I didn’t implement the punch on my FPGA version so I have no independent hardware for testing.

 

I guess I could try compiling to WS, use the CPRT/CEND cards and try to execute from WS.  Maybe later, I have a barbecue to get started.  I expect to overindulge in Miller Genuine Draft so maybe tomorrow.

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Doug Wegscheid

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Apr 22, 2018, 2:43:35 PM4/22/18
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That helped. dropped all the CPRT/CEND cards and my output is there. It's still looping like crazy after the end of my program and punching blank cards...

Don't understand if that's happening in my program, or after the call exit....

Eddy Quicksall

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Apr 22, 2018, 3:00:09 PM4/22/18
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I don’t remember CPRT or CEND. What do they do?

 

Eddy


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Doug Wegscheid

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Apr 22, 2018, 4:53:46 PM4/22/18
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// CPRINT

Makes the console printer the principal output device

// CEND

Ends console printer output and restores the primary printer as principal output device.

Eddy Quicksall

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Apr 23, 2018, 5:10:49 PM4/23/18
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Ahh, thanks. With Cytos that would be “sysout here” and “sysout p1403/p1132”.


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Doug Wegscheid

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Apr 23, 2018, 5:20:46 PM4/23/18
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CYTOS?

Eddy Quicksall

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Apr 23, 2018, 5:33:45 PM4/23/18
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That stands for Conversational Yale Terminal Operating System. It was written by Tim Mellon and is available with my 1130 emulator running TSO (Time Sharing Option for the IBM 1130) which I sent out a few years ago.

Eddy Quicksall

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Apr 23, 2018, 5:41:09 PM4/23/18
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Hmm, I had it in Dropbox but I see it is not there anymore. I’ll put it back.

 

Eddy

Eddy Quicksall

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Apr 23, 2018, 6:03:01 PM4/23/18
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My 1130 emulator plus CYTOS, TSO, EMU Fortran and more are here. https://www.dropbox.com/preview/1830%20release/Distrobution/Distrobution.rar?role=personal

Dave Wade

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Mar 5, 2021, 8:29:44 AM3/5/21
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Richard,
Is there a version of the FPGA code that works with faster CF Cards?
Dave

richard...@comcast.net

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Mar 5, 2021, 12:56:19 PM3/5/21
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I’m not aware of such a thing but it should be possible to try to get the current datasheets and more closely approach the timing limits.  It should also be possible to put a FIFO between the CPU and disk or mess around with the DMA channel to take out some cycles or give the disk the ability to transfer more than one word at a time.

 

Perhaps a higher clock speed would result in coming close to the CF timing limits.  Or at least some submultiple might be closer.

 

I basically got the component to work, chose CF cards that worked (and not all do) and left it at that.  I’m running about 125 times faster than the real machine so I figured I had gone far enough.  Doubling the clock to 100 MHz on the newer Artix A7s should be possible.  I left in the IO delays such that all input/output runs in 1130 time.  Brian warned me not to push it because there are certain assumptions made in the code about how long it will be before a completion interrupt occurs and the code expects to complete a certain number of instructions before that occurs.  I didn’t push it.

 

Speaking of intentional delays, it turns out that I have a 1ms access timer slowing the CF.

 

 

  process(Clk, LoadAccessTimer)

  begin

    if rising_edge(Clk) then

      if LoadAccessTimer = '1' then -- x"1F590" - 5 mS

--        AccessTimer <= x"061A8";  -- about 1 mS, assume 0 rotational delay

        AccessTimer <= x"00010";

      else

        if AccessTimer /= 0 then

          AccessTimer <= AccessTimer - 1;

        end if;

      end if;

    end if;

  end process;

 

I wonder what would happen if I eliminated this…

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