I'm not sure where you found "LOG2", but the only log base two in the
Verilog language itself is $clog2(), which is a system function. If
you found this in an example (including some in the Verilog LRM) it is
likely that it implies the existence of a function within the scope of
the current module that implements a log base 2. For most compilers
it is permitted to write:
reg [$clog2(LEN):0] r_cnt;
I have had problems with this code when using Xilinx tools, however
where I had to use a workaround function provided in one of their
answer records. As I recall, the original reason for the answer
record was that an older version of their tools implemented a natural
logarithm rather than log base 2. However even in newer tool versions
the above code would create errors, while using a function does not.
Example:
// Workaround to broken $clog2 function in ISE 13
// From Answer Record #44586
function integer clog2;
input integer value;
begin
value = value-1;
for (clog2=0; value>0; clog2=clog2+1)
value = value>>1;
end
endfunction
reg [clog2(LEN):0] r_cnt;
--
Gabor