Process variation in Cadence

[Shital Joshi]

Hi,
I am having problem in cadence running process variation. Here I am trying to run a schematic, which consists of two identical blocks (lets say block A and Block B). Each of these blocks gives me 1 bit output. What I am trying to achieve is due to process variations in each of the transistor, the block should give different output even though they are given the same input.
This is what I have done so far..
To incorporate a process variation, I have used Monte Carlo simulation. My monte carlo is running but each time, both of the blocks are giving me the same value. Moreover, I was thinking that each time when I run Monte Carlo, I should have different median (different distribution of the histogram), but I came to realize this is not how things work. So now my problem is basically two:
1)My blocks should give me different output each time I run the schematic simply because of process variation. However, I am getting same value.
2)My both blocks are giving the same output. It should give me different output.

I am thinking that my instance name are same. Does that make any difference while running Monte Carlo? Actually my block A and B is very huge (but totally same, I have just coped block A just below it and named this new block as block B). Also I have large number of such parallel blocks. Since it was practically not possible to create each block separately with large number of input pins, what I did is copies one block and pasted block one after another block. Thus each of these blocks are having the same instance name.

I even tried to used two model libraries (though the model libraries are same), thinking that the block A and Block B would consider different median and give me different output. But nothing is turning in my favor.

I would greatly appreciate if somebody can give me any hint on how to get the result, what I want.

Thanks
Shital