Cannot Netlist Verilog-A Model in Test Bench with Spectre/ADE/...

[Yuntao Liu]

ERROR (OSSHNL-116): Unable to descend into any of the views defined in the view list, 'spectre cmos_sch schematic', for the instance 'I2' in cell MemristorTest'. Either add one of these views to the library 'MemristorPUF', cell 'Memristor' or modify the view list to contain an existing view.

But in the schematic view of the test bench I can descend into the Verilog-A editor with no problem. Everything looks all right except that the netlist cannot be generated...

I am using Cadence IC 6.1.6. The library 'MemristorPUF' has 2 cells: Memristor (with veriloga and symbol views) and MemristorTest (with schematic view). I included a symbol of Memristor in MemristorTest schematic and can descend into the verilog code. However, when I launch Spectre or ADE, the netlist cannot be generated and the errors are the same, as shown above. The netlist.oa file exists in the veriloa folder of the cell 'Memristor'. The text editor looks very similar to the editors for schematic/symbol/layout where I can check & save with no problem.

Can anyone shed some light on this issue?

Thanks a lot,
Yuntao

[Yuntao Liu]

I somehow solved this issue by myself. The point is, if you open the 'si.env' file in the simulation directory, you should see "veriloga" in the simViewList line,like this:
simViewList = '("spectre" "cmos_sch" "cmos.sch" "schematic" "veriloga")
But the thing is it is useless to edit this file -- if you do (e.g. add "veriloga" into the parentheses), it will change back before it starts netlisting. So you have to run the simulation in a specific directory, although I am not sure of a general way to locate that directory...