Hello
How are you doing?
Please let me know If you have any consultants available for below position, please send me your consultants resumes to sy...@kaynestech.com
Verification Engineer with PCIe Gen3, Gen4 protocols:
Location: San Jose, CA
Duration: 1 year
· Minimum 5 years of experience working of SV and UVM methodology.
· Expertise in verification environment development, functional coverage, code coverage, Testplan development, testcase writing, gate sims and debugging.
· Expertise in PCIe Gen3, Gen4 protocols is a must
· Expertise in CXL (Compute express Link) is good to have
· Expertise in IP as well as SOC verification
· Perl/shell scripting is good to have
· C/C++ knowledge is good to have
Thanks and regards
Syed Gufran
Kaynes Technology Inc (USA)
Email: Syed@kaynestech.com
Website: https://www.kaynestechnology.net/en/