Need: Verification Engineer_CA

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syedg...@gmail.com

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Aug 24, 2021, 12:40:58 PM8/24/21
to gufr...@anlage.co.in

Hello

How are you doing?

Please let me know If you have any consultants available for the below position, please send me your consultants resumes to gufr...@anlage.co.in


Design Verification Engineer
Location: Mountain View, CA
Duration: 1 year

Job details:
• 7 -9 years of ASIC verification experience
• Experience in System Verilog and C programming
• Strong scripting skills (Ptyhon, Perl, Shell etc)
• Excellent hands-on experience with IP and and SOC verification
• Excellent debugging skills using VCS and Verdi
• Knowledge of UVM based testbench development in at least 2-3 projects
• Excellent communication skills
• Knowledge of protocols like SPI, UART, I2C, GPIO is a must.
• Knowledge of memory protocols like HBM is a plus
Embedded Engineer AND Android AND ADB AND Python AND Firmware AND Debugging

Best regards, 

Gufran Ali

Sr IT Recruiter

Anlage Infotech Inc.
Wyoming, US 82001 
www.anlage.co.in

   

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