8251 vs 8251a

[smb...@gmail.com]

Can someone remind me what exactly is the behavioral difference between these two ICs that causes trouble?

Thanks,

Scott

[Joseph Travis]

In the case of the H8-5, I believe it had to do with TxE operation however I don't recall the details.  I believe that Norberto modified the circuit on his version of the board to allow either the 8251 or 8251A to be used.

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[Joseph Travis]

Hi Scott,

I just realized you may be trying to use the H8-5 board with your H8-8008 CPU board.  If you are using a Heathkit H8-5 board, the tape I/O doesn't work correctly with an 8251A, it will only work with an 8251.  As I recall, using an 8251A, you are able LOAD from tape however you are unable to SAVE to tape.  TxE output from the tape USART is used to start a 5 second timer for the tape, once the time is up it signals DSR & CTS on the tape USART so data transmit can begin.  I don't remember all of the details but, once again, I believe Norberto modified his version of the board so it will work with either version of the USART.

Programming the 8251 is fairly straightforward however when using the 8251A, you should clear the command register twice prior to resetting the USART.  It's also good practice to clear RX by reading it after the USART is initialized.  Lastly, the USART used for the console uses DTR to enable interrupts on the H8-5.

I hope this information is helpful.  Good luck!

BR,

Joe

[smb...@gmail.com]

Yes and no. I am using it on an 8008, but not for the tape -- just for an alternative console. It's working fine and was straightforward to program. I just knew there were some differences noted between the 8251A and 8251 and wanted to make sure that I understood what they were. Thanks for the background on it.

Yes, I did have some issues with the reset sequence, and I have noticed that after reset it tends to let one character of gibberish slip through on the input, so I'll add a read of the receive register as well.

Scott

[Glenn Roberts]

I too am confused and feel this issue has never completely been run to ground (or perhaps it has but the details weren’t shared? Or I missed it?) It would be good to understand exactly what is causing the issue in terms of the specs for each chip.

It is worth reading Gregg Chandler’s 8251 and 8250 console initiation code in HDOS as he does extra reads and delays to make sure the UART is properly initialized. He posted about this here some years back.

Sent from my iPad

On Oct 3, 2023, at 1:59 AM, smb...@gmail.com <smb...@gmail.com> wrote:

Yes and no. I am using it on an 8008, but not for the tape -- just for an alternative console. It's working fine and was straightforward to program. I just knew there were some differences noted between the 8251A and 8251 and wanted to make sure that I understood what they were. Thanks for the background on it.

To view this discussion on the web visit https://groups.google.com/d/msgid/sebhc/9c9ef67b-91f1-482b-b3de-fdb8b019b671n%40googlegroups.com.

[smb...@gmail.com]

I did have to add some extra delay too. I probably independently stumbled on the same things as the HDOS initialization code... :) It would be good to compare.

Without a delay, I would end up with what looked like a framing issue on the terminal for the first sentence or so of output.

There's really a fair amount of wonkiness with the 8251.

Scott

[Terry Smedley]

This was from Norberto's H8-5 debugging last year:

"Norberto:

 

I think the difference between  these two parts is in the way the TXEmpty line is handled.   I’ve looked at the data sheets for both.  The OKI 82C51 sheet is hard to read - the English is translated.  I don’t have either part, but here’s my guess as to what’s happening:

 

CTS! controls the transmitter output for both chips.  If the external device sets CTS! high, nothing will be transmitted.  And you saw that with your jumper experiments.

 

The Intel sheet says that TXEmpty  goes low (required to start the tape player) whenever the CPU sends data and the transmitter is enabled.  The data sheet does not mention that TXEmpty requires CTS! low.  Looking at the ROM code, it’s clear that Heath expected TXEmpty to go low when a byte was written to the 8251 as long as the transmitter was enabled regardless of the state of CTS!

 

The OKI sheet, while a little hard to read, seems to imply that if a character is written to the 82C51 BEFORE CTS! goes low, that the TXEmpty line won’t change until CTS! does go low.  I think that was causing  the lockup with the 82C51 - the original Heath circuit had no way to force CTS! low until TXEmpty went low….and TXEmpty wouldn’t go low until CTS! was also low.

 

I need to look at the ROM code very carefully to see how it is checking status of the tape device.  If it looks at DSR! (only), then I think you might be able to tie CTS! low so that the 82C51 would set the TXEmpty low when the first character arrives, then the rest of that circuitry would manipulate only the DSR! line.   That would be an easy experiment I think - lift the CTS! pin, tie it to ground, and see what happens.

 

I’m pretty sure there’s nothing wrong with your circuit, but it might need some modification to work with the 82C51.  Would it be better to keep it true to the original and require an 8251, or modify it so that the readily available 82C51 could be used?  I haven’t looked yet, but can you even get 8251s today?

 

Looking over ROM code now …..

 

Terry"

[glenn.f...@gmail.com]

Here is the SCU (Setup Console USART) module from HDOS 2…. (attached)

 

• Glenn

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[glenn.f...@gmail.com]

thanks terry. So another piece of the puzzle but the overall picture is still a bit cloudy (at least for me).

 

• Glenn

 

 

 

From: se...@googlegroups.com <se...@googlegroups.com> On Behalf Of Terry Smedley
Sent: Tuesday, October 3, 2023 9:28 AM
To: SEBHC <se...@googlegroups.com>
Subject: Re: [sebhc] 8251 vs 8251a

 

This was from Norberto's H8-5 debugging last year:

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[norberto.collado koyado.com]

INS8251 or P8251 works fine with the original H8-5 board.

 

P8251A,8251A, 8251, or 82C51A will not work with the Heath H8-5 board.

 

All the above will work fine with the new H8-Z5 board.

 

Here is the issue:

 

"INS8251 - When data is in the transmit buffer it will drive TXE low, which will turn on the motor, and drive /CTS low (5 sec timer). Any other 8251/82C51 vendor - When data is in the transmit buffer it will "NOT" drive TXE low, unless /CTS is low first. So, the cassette motor will never turn on as /CTS is high waiting for TXE to bring it low."

 

 

Norberto

 

 

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[norberto.collado koyado.com]

Typo: P8251N works fine with the H8-5 board.

 

To view this discussion on the web visit https://groups.google.com/d/msgid/sebhc/SN6PR01MB385585E2B8C579BB8840E4CCF7CAA%40SN6PR01MB3855.prod.exchangelabs.com.

[norberto.collado koyado.com]

Typo: INS8251N works fine with the H8-5 board.

To view this discussion on the web visit https://groups.google.com/d/msgid/sebhc/SN6PR01MB38558454AA7FE5194ACA9015F7CAA%40SN6PR01MB3855.prod.exchangelabs.com.

[Joseph Travis]

So, would simply grounding /CTS solve the problem?

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[norberto.collado koyado.com]

Yes that should solved it.

 

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[Douglas Miller]

On the original equipment, the delay served to provide much-needed gap on the tape and allow the motor to get up to speed. With digital recording equipment, don't you still need the gap for playback? Otherwise, there's no separation between units on the "tape". Unless you always make sure to start a new "file" each time.

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[norberto.collado koyado.com]

Yes, this is correct!  /CTS will need to be separated from /DTR and the delay circuit will drive /DTR instead. Better to test on bench to be sure it works fine with the original Heath H8-5 board.

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From: se...@googlegroups.com <se...@googlegroups.com> on behalf of Douglas Miller <durga...@gmail.com>
Sent: Thursday, October 5, 2023 5:03:05 PM

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