Synthesize BOOMv3 with Verilog not System Verilog

[YeWen Li]

Hello, 

I have successfully generated System Verilog through the riscv-boom and chipyard documents, the system verilog is here: 

cd ${chipyard-home}/sim/verilator/

make CONFIG=LargeBoomConfig

But when I synthesized those files using Design Compiler, these files were reported as unsynthesizable errors. The errors are here:

Error:  ./src/BoomCore.sv:2499: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Error:  ./src/BoomCore.sv:2499: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Error:  ./src/BoomCore.sv:2510: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Error:  ./src/BoomCore.sv:2510: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Error:  ./src/BoomCore.sv:2620: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Error:  ./src/BoomCore.sv:2620: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Compiling source file ./src/BoomDuplicatedDataArray.sv
Compiling source file ./src/BoomFrontend.sv
Error:  ./src/BoomFrontend.sv:770: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Error:  ./src/BoomFrontend.sv:770: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Error:  ./src/BoomFrontend.sv:821: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Error:  ./src/BoomFrontend.sv:821: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Error:  ./src/BoomFrontend.sv:1086: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Error:  ./src/BoomFrontend.sv:1086: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Error:  ./src/BoomFrontend.sv:1099: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Error:  ./src/BoomFrontend.sv:1099: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Compiling source file ./src/BoomIOMSHR.sv
Compiling source file ./src/BoomMSHR.sv
Error:  ./src/BoomMSHR.sv:512: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Error:  ./src/BoomMSHR.sv:512: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Error:  ./src/BoomMSHR.sv:618: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Error:  ./src/BoomMSHR.sv:618: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Error:  ./src/BoomMSHR.sv:620: The construct 'multiple packed dimensions' is not supported in this language. (VER-720)
Error:  Too many errors; can't continue. (VER-40)
*** Presto compilation terminated with 21 errors. ***

How do I generate synthesizable Verilog code?

[Jerry Zhao]

You have to modify the CIRCT verilog emitter options to disallow generating the unsupported constructs. I suspect this is just a flag that needs to be added to where we invoke firtool in chipyard.

-Jerry

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