Using the WD1770 FDC

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Paulo Constantino

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Aug 16, 2024, 8:16:11 PM8/16/24
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Hi all.

I am using the wd1770 floppy controller chip.

However this chip is peculiar in that it does not have separate RD and WR lines for reading and writing to its registers. Instead it has a single line called RD/WR and it reads when that line is high and writes when it is low. But the action only happens on the falling edge of the CS pin.

I've tested it however and it will also write if CS is low to start with and then the RD/WR line is pulled low then high. But doing this this way means that if CS is low and RDWR is high then the data lines are in output mode and connected to the CPU bus which is also in output mode. This of course causes contention since outputs are connected together.  I thought about placing a resistor pack between the FDC data bus and the CPU bus to current limit this contention.


My CPU is like Intel and has separate RD and WR lines. How can I use this chip in a way that is acceptable given it has a single RDWR line instead?

What I did is connect the FDC's RD/WR line to my CPUs WR line so that the FDC is always reading mode unless the CPU is requesting write mode. And then if  CS is active and WR is active it writes otherwise it reads.

Is there a standard solution to this?

Brian Cockburn

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Aug 18, 2024, 8:55:45 PM8/18/24
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The Read Not Write line (pin 2 on the 1770) connects directly to the Read Not Write line on your 6502, 65C816, 6800, 6809, or 68000.  On the 2650 you'll have to invert the CPU's Write Not Read line with a 74HCT04.

Paulo Constantino

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Aug 18, 2024, 10:17:02 PM8/18/24
to Brian Cockburn, retro-comp
I am not using a 6502.  I am using a CPU that has separate RD and WR.

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Mark T

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Aug 19, 2024, 6:37:48 AM8/19/24
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Combine the read and write signals with and or nand gate for active low signals and include this in the chip select decoding.

Kevin Maier

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Aug 19, 2024, 10:17:02 PM8/19/24
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Note that the Commodore 1581 diskette drive used a WD1772 controller. With the 6502, all memory (which is I/O space as well) is sync'd to the CPU clock as well as the chip select and the single Read/Write line. The 6502 uses the CLK line to validate the R/W line for native 65xx devices. The WD177x is an oddball device in this regard, as there's only a chips select and the single R/W line. You can find the schematics for the 1581 as part of the service manual easily.

There's a problem with many of these Western Digital sourced controllers... and required that an odd macro was used in the 1581 source code to access the FDC. While this might have been fixed with later chips from WD, all versions of the source code continue to use this macro, which ensures the CPU address which selects the FDC is in a certain state, otherwise the chip will fail. I've tested the VLSI version of the 1772 which does not exhibit this problem, so at some point the flaw was fixed.

As you didn't state which CPU you're using, it's unclear if you'll need to also sync the Read and Write lines with a clock signal in addition to the decoded chip select, but something to be aware of.

Finally, Atari ended up making an enhanced version of the 1772 for their ST series of machines which will also work at double clock rates and support a 1.44MB drive (vs the standard 720KB drive). These are still available from Best Electronics.

I would recommend getting the VLSI 1772 version if possible (or the Atari Ajax controller) , as it has a better digital data separator and faster step rates which are a plus for the latter drives, which could take advantage of them. All of the details for the WD177x can be found in the Western Digital Storage Handbook, also easily found in PDF by searching online.

 Hope this helps, KM

Paulo Constantino

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Aug 19, 2024, 11:13:24 PM8/19/24
to Kevin Maier, retro-comp
Hi Kevin.

My CPU is homebrew.  I designed it and it has separate Rd and Wr controls.

I decided to go head and connect the CS of the WD1770 directly to the decoded CS for its address. 
So if the CPU address is the WD1770 one, then the WD1770 is selected,

After the CPU sets the address, it will pulse RD or WR. After pulsing them, CS goes back high.

This should work.  I tested it on a breadboard and I can perform writes via the WR pin as well by pulsing it low
while CS is low.  It works.  I dont need to keep the RD/W line low and then pulse CS low as the chip normally wants.



Brian Cockburn

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Aug 20, 2024, 8:08:05 PM8/20/24
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Maybe the WD1771 would be easier for you?  It has separate Read and Write strobes.

Paulo Constantino

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Aug 20, 2024, 8:10:47 PM8/20/24
to Brian Cockburn, retro-comp
No man. Just read what I wrote before and see if you can expect any problens. Do it! 

Eck! Notlisted

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Aug 26, 2024, 2:35:23 PM8/26/24
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Example of 1770 with Z80 is the AMPROLB+, the manuals for it are on line.
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