Z80-PC mainboard revision 2

[Rodney Knaap]

For those who are interested in my progress in this project, I can report that I have finished my design work of the second revision Z80-PC mainboard. It's my hope and intention to give a great classic CPU the circuits which it could have had back in the 1980s when IBM was finding the CPU for their new PC product. The Z80 really had a great potential, which was not really fully taken advantage of, pointing the industry towards Intel instead. I like computer history and love the old stories of those days, it's quite fascinating and many big things happened in a short time.

I will do some more checkups to verify with my lists and revision change notes, and then I will let JLCPCB make the PCB. Basically the Revision 2 design is ready.

I have completely redesigned the whole layout, ripping up all the traces, and moving most circuits off the PCB, and back onto it, in order to optimise and improve the placements further. I still placed a few ICs backwards though, I feel it's not such a big deal since there is a silkscreen showing all orientations clearly. Opinions may vary, that's okay, it's only a hobby project to learn from and develop code and new hardware on.

The issues I found while testing the first mainboard should all be corrected, the whole computer is to be verified of course, since there are many circuit changes.

The PCB is now a little bit larger, to fit the most common PCB mounting holes of ATX cases, and also to accommodate more space for the new additions.

- I have added a parallel printer port which functions the same as a classical LPT port on an XT PC. Not persé for printing, though it's possible, but in fact my motivation is primarily to one day try to get a connection working to a PC which runs "Intersvr.exe" from MS-DOS, to make an "interlnk" connection for transferring files between the Z80 PC and IBM compatible PC over their printer ports, and for possibly supporting other devices which are designed to operate on a standard parallel printer port. The LPT port is mapped to I/O ports E7, E8 and E9.

- I have added a second PPIDE interface which I found out is fully supported by ROMWBW, I have tested two PPIDE interfaces already using the Rev 1 mainboard.

- I have added the Realtek RTL8019AS ethernet chip as a footprint on the PCB, so it can optionally be soldered directly onto the PCB. There is still a connector for a daugterboard if needed.

- I have moved the GPU connector to a slot position by changing the whole layout, and this way the VGA connector should be able to go directly onto the GPU board and face the slot bracket.

In the future, I will probably also want to make a portable version of this computer, a kind of Z80 laptop PC, using the same design so both computers can share the same software between them.

I have a lot of plans, which will require to write new software to support them. Some are simple, others more complex. I think it will be a good way to build up the software design level in a similar way as the hardware design.

I will post updates here after I receive and build the Rev 2 mainboard, for those who are interested.

[Frank Roper]

Very nice, I’m interested, though soldering the surface part is not my specialty. I’d skip that.

--
You received this message because you are subscribed to the Google Groups "RC2014-Z80" group.
To unsubscribe from this group and stop receiving emails from it, send an email to rc2014-z80+...@googlegroups.com.
To view this discussion on the web, visit https://groups.google.com/d/msgid/rc2014-z80/e7e13b84-cca3-4cd1-a426-5ba7e0785347n%40googlegroups.com.

[karlab]

Hi Rodney

Very impressive work. It appears you have added so much functionality to the motherboard, making expansion ports obsolete.

Karl

[Rodney Knaap]

Thanks zxmaker,

Indeed I understand your concerns for soldering an SMD component. In the past I did service work on SMD component equipment so I was lucky to benefit from some good instructions how to handle SMD soldering and what are the right tools and materials.

The most important things are to use 0.35mm soldering wire, to properly drown the component in no-clean flux along the pins, using good magnification and light, and a needle point soldering iron. And I always solder a few corners first to position the part perfectly before continuing the soldering work. To accidentally solder a few pins together is actually no problem at all, that can be easily cured with flux and just "wiping" the needle point soldering tip along the pins, it will each time pick up a little bit of solder which you can clean off the tip until the pins come free from eachother.

Anyway, it is still a challange, you are right!

Hi Karl,

Thanks for your message! I did try to include everything useful I could possibly imagine on the PCB, you are absolutely right, and you would think it's already a lot!

The purpose of my project is really to enable a platform for developing hardware and software.

I tried to include many things which give the opportunity and motivation to develop code on it which is actually directly useful in adding useful functionality in software. That will be very rewarding to work on.

I have several software and hardware projects in mind to add to this PC:

- as I wrote, the interlnk/intersvr networking solution over parallel port "laplink" cable

- I want to develop a SNES controller interface for controlling games with as minimal CPU load necessary as possible, simply reading a port to reflect the pressed buttons, or possibly to enable interrupt IO.

- I implemented a very basic cassette interface which is a nice coding project to get started in writing code for streaming data onto a cassette tape and reading it back into the computer reliably. To me, a cassette tape is truly even more hardcore retro than a floppy drive! The challenge is making it work fast and reliable. I should add a speaker into the case to sound out the bleeps from the cassette I/O, great fun!

- I have plans for a GPU solution which is the most advanced coding project I am planning.

This GPU in my view is really a necessary step to try to make this Z80 PC a truly useful computer to support more advanced functions.

The possibilities are endless and exciting for coding, graphics functions, text mode display with adressable screen positions, windowing support, etc.

What else? I am still thinking about sound and music. The YM2149 is really a simple chip, I think there will be better solutions imaginable.

Perhaps an interface to connect Commodore IEC floppy drives.

In the future I may look at replacing the Z80 by a software core which can plug into the CPU bus connector, or by using an emulator which emulates the Z80, similar to the pistorm idea.

Another idea would be to enable emulation of various CPUs which can be switched in software, which enables more possibilities for running software on this PC and testing ported code.

This project was really fun to work on, especially thanks to the existing ROMWBW software base. I will do more studying of all the source code because I hope to expand it with compatible drivers for new stuff.

Thanks for your replies,

kind regards,

Rodney

Op vrijdag 10 juni 2022 om 21:29:35 UTC+2 schreef karlab:

[Frank Roper]

Hi Rodney

If I was to construct this, would there be such a way that the board may be built in stages and each stage tested as you went along with the build, rather than find out at the that the damn thing doesn’t work, a few years ago a built the hive board based on the propellor ic, the build was in stages with tests being ram before commencing with the remainder of its build, just an idea.

Regards

David - zxmaker

To view this discussion on the web, visit https://groups.google.com/d/msgid/rc2014-z80/aa66b6eb-330b-490e-8a2c-e6909a104b0cn%40googlegroups.com.

[Rodney Knaap]

Hi David,

Definately your idea is really good. I did the same when testing my first revision of this mainboard.

It's definately "simple" when looking at the schematic, you can start with the CPU, memory and IO buffers, 1 RAM and 1 ROM, and the chips to get ROMWBW going.

Also very useful is to wire the ROMWBW LEDs I have included in the design, which clearly indicate initialisation of ROMWBW paging and subsequent ROM and RAM access.

In fact, there are LED outputs to signal most of the computer functions directly from the hardware signals, such as IDE access, ACIA, floppy access, Z80 signals such as M1, /INT, and the ethernet link, RX, TX, etc which all indicate the operation of the Z80 and various circuits.

I look forward to wiring up all the LEDs to a nice front panel on my second revision build. Should be fun to see it in operation, booting, copying files from floppy to harddisk, etc.

I remember building my old pentium computers, and separately soldering and wiring up all the hard drives to their own activity LEDs on the front of the computer so I could see their operation separately.

That is really nice to have on a computer.

Basically, if you observe the component list exactly, it will be easy to get the computer working.

All component values are marked on the silkscreen as well, which even would not require a schematic to build it.

I already tested everything, building up the PCB can be done in stages, somewhat similar to plugging in modules.

Of course, that being said, this kind of PCB is not really a "beginner" project either, which can be seen when looking at the PCB's size.

It is a lot of work, and definately should only be attempted if the builder is sufficiently confident in such a project and has some experience in fault finding in computers if there is a problem.

It's useful to have a logic probe to establish the basics like clock pulse and Z80 operation signals.

Basically it is not really much different from building a RC2014 or similar other single board computers.

In fact, my first stage prototyping method using point to point wire soldering is much more of a challenge, recently I built my own design of XTIDE customized for an Amstrad PPC640, only to find some strange drive problems, which finally turned out to be a short circuit in my wire soldering, the first time this ever happened to me. I am past 50 now and my eyes are not as sharp as 20 years ago! I will learn next time to inspect my soldering work with a powerful magnification before spending hours of finding the problem, only to trace it back to a short!

I have been building micro computers from my own designs since the late 1990s so for me it's more easy to do, though I found debugging the first prototype stilll enough of a challenge, especially because I was trying out circuits which were at that stage still untested which created some uncertainty where to find the initial problems I experienced. It took me a while to find the problems, but with this second revision it's more tried and tested now.

One of the things I found out is that ROMWBW didn't work when decoding A3 to be "0" in the IO port mapping. Finally I simply dropped the evaluation of A3 which solved my problem. I just left it that way after that, it's only a few extra IO port numbers used up after all, and there are enough free ports available for numerous devices.

Kind regards,

Rodney

Op vrijdag 10 juni 2022 om 23:16:34 UTC+2 schreef zxm...@gmail.com:

[Rodney Knaap]

For those who are interested in this project:

The Z80-PC Revision 2 Mainboard PCBs have arrived today from JLCPCB, 3 days faster than expected.

I will assemble and test the mainboard very soon.

I will define a few building stages for more easy building and testing, starting from the minimal initial components which are required to verify that the computer is working.

I will create a few placement files which have the components marked in colour for each stage of assembly.

Everything is marked on the silkscreen, so it should be straight forward for someone with the required skills and experience.

Kind regards,

Rodney

Op zaterdag 11 juni 2022 om 00:08:54 UTC+2 schreef Rodney Knaap:

[Patrick Jackson]

Is there a tactical reason that the CPU was put on the bottom and the tms graphics chip was put in the center? Just intuitively, I see an ATX board, I picture the CPU in the center towards the top lol (also the sound chips not on the top)

[Rodney Knaap]

Hi Patrick, there was a tactical reason, to optimize the PCB layout lol.  This board is more like XT PCs, not the pentium 3 and higher ones. If only we had Z80s with that kind of horse power... But I think such a board would have a lot less "charming" appeal though.

I saw on the common IBM PC XT board layouts that often the CPU is at the top edge of the PCB even, which I saw some people were also a little surprised about. I am sure they had some good reasons though.

Actually, I like this layout much more than my first one, it condenses the memory related bus into a small area, and this leads up to the graphics adapter position, which will line up with the graphics cards slot this time. That saves me an onboard VGA connector as well, because now I can place it on the graphics board, and I got some room for the parallel printer port as well. By condensing memory related bus in one small area, the rest of the mainboard is open and free for I/O devices, which are an important reason to create this mainboard in the first place. I kept the IO shield area free for those related devices which connect to it. I just placed the TMS underneath the printer port to vertically line up the shared bus lines.

I still have a few square inches of PCB space available around the TMS and ATX power and reset circuits. I will not completely redo this PCB another time, but if I have a good reason, I may add a few extra circuits in the future though.

This time I paid 30 euro more shipping costs, however the PCBs still got some impact damage on one corner. I didn't notice the damage at first because I never expected that from such a high quality PCB company. I wish they had spent some of the money I paid extra on better packaging and protection! The total order cost was around 112 euro this time, compared to around 50 before.

Thanks for your message and interest Patrick!

Op maandag 20 juni 2022 om 17:41:33 UTC+2 schreef gindiamon...@gmail.com:

[Frank Roper]

Hi Rodney, thank you for taking my / your idea onboard, I look forward to building one myself.

Regards

David

To view this discussion on the web, visit https://groups.google.com/d/msgid/rc2014-z80/e5a3a74e-fd9a-41e1-9ad5-e006a003e38en%40googlegroups.com.

[Rodney Knaap]

Hi David,

Certainly, I see the merits of building in stages. I have this time built the PCB in stages to see what would be needed for each stage, since there are some gates in logic chips of different areas which are shared, additionally there are some areas which depend on eachother of course. I have got a rough plan and made photos of several stages to know which logic chips were needed to support each stage. I will work out some documentation for builders to support this. The first people who build my PCBs (I know there are some interested people already) can try out my descriptions.

Okay, I have been very busy doing the work of building and testing. I am happy to report that the design issues of the first revision are definately all gone in this issue.

I did have a small design matter where I didn't include a necessary pull down resistor on a 74LS06 gate which is connected with a 125 gate which is often floating. This 74LS06 to my surprise needed a resistor as low as 1k on its input to get the output to pull up high. I tried 4k7, but no luck. So be it.

The centronics printer port, I have been testing it by inserting the settings lines from the source code which was developed for the MBC type computers in ROMWBW with the correct centronics port numbers. At first I indeed saw the output device "cen" mentioned in the boot messages, but it was not 100% reliable to get it to display. After adding some pull-up resistor networks to various bus lines, the detection messages even stopped. I am not sure what the cause is, perhaps a timing issue, I have tried several types of logic ICs in the centronics LPT circuits but so far no luck. I have tried to OUT in Mbasic to the LPT ports, which works fine. Reading back also works, except that in port C there is an addition value of D5 to D7 bits reading high, which seems explainable because those bits are not used in port C. I am not sure how the detection routine works, outputting to port C and then reading back the values? Does anyone know this? If and when I have time, I will also look into this in more detail. It seems the port is working, since it can be manipulated directly with in and out commands.

I soldered the RTL8019AS ethernet chip, which is still a little tight fit on the footprint, even after enlarging it from the default footprint shape. I managed to gently bend the pin rows inward a little bit, which was enough to be able to solder them well. This is really not easy to do, and requires a needle tip soldering iron, lots of magnification and light, and no-clean flux and a tiny 0,35mm soldering wire. After heating the pad and the pin heating up, the soldering tin can be added to flow onto both of these. I got several pins soldered together on one side, which I could clear up with the soldering tip and brushing off on a sponge. One time, I cut down a soldering wick to very tin tip and gently brushed the pins from inward to outward, and it took off the solder much more easily. This is a cautious process, not to let the soldering wick stick to the pin and potentially bend it away. I used a high magnification goggles, but I want to one day buy a USB PC microscope, which allows much more careful work on small components.

This time, I decided to completely solder the PCB. I am only missing some 2N3906 transistors for the various system LED outputs, which are on their way here from China.

Later I will test many more things, such as adding IO cards, making a prototype GPU PCB, etc.

I already verified before that the IO expansion slots work well.

I will also try to get started on assembly coding which is new for me.

After I learn more and get more experience, I will study the ROMWBW source codes in much more detail.

There is much to learn from it.

My goal is that one day I understand it well enough that I can add new drivers to ROMWBW for various new devices on my Z80-PC.

Also I hope to find some MS-DOS source code which is suitable to adapt to the Z80-PC.

I want to do a lot of porting and also create new software, such as a similar program to NC and MC.

But this definately will only work on screen adressable CRT and VGA controllers.

After having this mainboard, it will become much  more accessible to develop things, which is my purpose.

Maybe I should first do more coding related to this centronics LPT port.

It can be used for many things, even connecting external devices, file transfers, etc.

After I get the building stage descriptions done, I will post them here.

Thanks to all people who have shown interest, it's nice to talk about my work on these prototypes with people who have similar interests.

Have a good weekend everyone,

kind regards,

Rodney

[Wayne Warthen]

On Friday, June 24, 2022 at 4:14:16 PM UTC-7 rodne...@gmail.com wrote:

The centronics printer port, I have been testing it by inserting the settings lines from the source code which was developed for the MBC type computers in ROMWBW with the correct centronics port numbers. At first I indeed saw the output device "cen" mentioned in the boot messages, but it was not 100% reliable to get it to display. After adding some pull-up resistor networks to various bus lines, the detection messages even stopped. I am not sure what the cause is, perhaps a timing issue, I have tried several types of logic ICs in the centronics LPT circuits but so far no luck. I have tried to OUT in Mbasic to the LPT ports, which works fine. Reading back also works, except that in port C there is an addition value of D5 to D7 bits reading high, which seems explainable because those bits are not used in port C. I am not sure how the detection routine works, outputting to port C and then reading back the values? Does anyone know this? If and when I have time, I will also look into this in more detail. It seems the port is working, since it can be manipulated directly with in and out commands.

The MBC Centronics module includes two status LEDs which are controlled by bit 6 & 7 of the third port of the board (port C).  The MBC circuit provides for the ability to "read back" the current values of the status bits.  The current detection routine uses this read back capability to detect the board.  It writes 0s to the status bits and reads them back, then it writes 1s to the status bits and reads them back.  The detection routine checks that the values of these two bits read back are the same as written.  I don't know if your circuit duplicates the status LED (w/ read back).  If it does not, then the current detection routine will probably not work, even though your actual Centronics interface is fine.

You may need to add a variant to the driver that allows you to detect the Centronics interface using a different mechanism.  Or, in your case, you might just want to assume it is there since it is part of the base system.  I am happy to help with adding a variant to the driver for your board.  My plate is too full to build one of your mainboards right now, but I can probably help modify the driver as needed.

Thanks,

Wayne

[Rodney Knaap]

Hi Wayne,

Thanks a lot for your reply and explanation. I see what you mean.

This LPT port on the mainboard follows exactly the function of the original IBM XT LPT port.

I did this to ensure that whatever hardware is connected could have the best chance of working.

I don't have status LED outputs on my circuits.

In future revisions I might include a LED output controlled by the /LPT_CS signal, which is my habit, I would prefer to let the hardware itself control status LEDs which I find helpful in hardware debugging.

Today I did some more research and found a FAQ by Zhahai Stewart about the IBM parallel port, which suggested a super easy mod to support PS/2 compatible bidirectional function on the LPT port.

http://www.sfu.ca/phys/430/datasheets/parport.html

This FAQ suggested that possibly IBM originally also may have intended a bidirectional port A, since this mod is super easy on the original circuits.

Since my version of the LPT port also supports this mod, I updated my design to include it.

It needs no extra components, only to connect port A latch /OE to output pin 15 of the 74LS174 instead of GND. 

If the unused port C output bit D5 of the 74LS174(U103 pin 15) goes high, this tristates the port A output latch and frees the LPT data pins to be able to accept input which can be read in from port A via the feedback transceiver U106.

I could study the source codes (I have already looked at it for a while) and attempt to add the variant driver, however if you have the time to help me, I would appreciate that.

I really don't want to mess up your organised scheme of drivers by doing something non-standard and afterwards requiring your help to modify it another time.

If you have the time to do it, I will certainly try to learn more about it by looking at how you did it.

Could this driver be called "LPT"? Or would that pose a problem or conflict somewhere?

Like LPT1 for the first port, if that's possible.

Please find the schematic in my attachment, I made a separate PDF of the LPT circuits so it's more clear to see the functionality.

In that LPT FAQ document I also read this about the detection of an LPT port being present by an IBM compatible PC:

" The BIOS detects these ports by writing 0xAA to the Data Out register (at I/O address Base+0), reading the Data Feedback register (same address), and deciding there is a port installed if it reads 0xAA"

Perhaps we could do the same?

Kind regards,

Rodney

Op zaterdag 25 juni 2022 om 03:28:27 UTC+2 schreef wwar...@gmail.com:

[Wayne Warthen]

Hi Rodney,

On Saturday, June 25, 2022 at 8:09:30 AM UTC-7 rodne...@gmail.com wrote:

I could study the source codes (I have already looked at it for a while) and attempt to add the variant driver, however if you have the time to help me, I would appreciate that.

No problem.  I may need a couple days to get to this, but will definitely get it done.

Could this driver be called "LPT"? Or would that pose a problem or conflict somewhere?

Like LPT1 for the first port, if that's possible.

I think LPT is a much better name for the driver than the current name of CEN.  I will make this change at the same time that I add the driver variant.

Please find the schematic in my attachment, I made a separate PDF of the LPT circuits so it's more clear to see the functionality.

I see it, thanks.

 

In that LPT FAQ document I also read this about the detection of an LPT port being present by an IBM compatible PC:

" The BIOS detects these ports by writing 0xAA to the Data Out register (at I/O address Base+0), reading the Data Feedback register (same address), and deciding there is a port installed if it reads 0xAA"

Perhaps we could do the same?

Yes.  I will need to make sure that Port C, bit 5 is set correctly during the test, but not a problem.

I will ping you when I have something ready.

-Wayne

[Wayne Warthen]

Hi Rodney,

I have just checked in a set of changes that are intended to make the RomWBW Centronics driver compatible with your hardware.  I was able to modify the existing hardware detection routine so that it should be compatible with any IBM-style Centronics interface.  Additionally, as discussed, I have changed the name of the driver from CEN to LPT.  RomWBW v3.1.1-pre.175 has the changes.

Note that you will still need to set the config variable LPT0BASE to the base port I/O address of your hardware.  I did not wind up creating a new variant of the driver because I was able to make the driver more generic (using your suggestion for the hardware detection routine).

At your convenience, please let me know if this works for you.

Thanks,

Wayne

[Rodney Knaap]

Hi Wayne,

I have tested the changes in the driver and it works now.

Thanks a lot for this update!

I got some messages when compiling the ROM that "Label must pre-exist for SET".

So I added these lines in cfg_rcz80.asm:

LPTENABLE     .EQU    FALSE      ; LPT: ENABLE CENTRONICS PRINTER DRIVER (LPT.ASM)
LPTCNT        .EQU    1          ; LPT: NUMBER OF CHIPS TO DETECT (1-2)
LPT0BASE      .EQU    $E4        ; LPT 0: REGISTERS BASE ADR
LPT1BASE      .EQU    $E8        ; LPT 1: REGISTERS BASE ADR
;

(the TABs are replaced by spaces here so it's not tabbed correctly, I spaced it out to allign the lines)

I am not sure if this is correct in this way, but it allowed me to compile the ROM and test it.

I have reserved base port E8 for LPT1 if a builder likes to add an extra LPT on an adapter card.

Here are the boot messages:

RomWBW HBIOS v3.1.1-pre.176, 2022-06-27

RC2014 Z80 @ 7.372MHz
0 MEM W/S, 1 I/O W/S, INT MODE 1, Z2 MMU
512KB ROM, 512KB RAM
ROM VERIFY: 00 00 00 00 PASS

AY: MODE=MSX IO=0xA0
ACIA0: IO=0x80 ACIA MODE=115200,8,N,1
LPT0: IO=0xE4 IBM
DSRTC: MODE=STD IO=0xC0 Sat 2000-01-01 00:00:03 CHARGE=OFF
TMS: MODE=RCKBD IO=0x98
KBD: IO=0xE0
MD: UNITS=2 ROMDISK=384KB RAMDISK=256KB
FD: MODE=RCWDC IO=0x50 UNITS=2
PPIDE: IO=0x20
PPIDE0: NO MEDIA
PPIDE1: NO MEDIA
PPIDE: IO=0x24
PPIDE2: NO MEDIA
PPIDE3: NO MEDIA

Unit        Device      Type              Capacity/Mode
----------  ----------  ----------------  --------------------
Char 0      ACIA0:      RS-232            115200,8,N,1
Char 1      LPT0:       Parallel          Output
Char 2      TERM0:      Terminal          Video 0,ANSI
Disk 0      MD0:        RAM Disk          256KB,LBA
Disk 1      MD1:        ROM Disk          384KB,LBA
Disk 2      FD0:        Floppy Disk       3.5",DS/HD,CHS
Disk 3      FD1:        Floppy Disk       3.5",DS/HD,CHS
Disk 4      PPIDE0:     Hard Disk         --
Disk 5      PPIDE1:     Hard Disk         --
Disk 6      PPIDE2:     Hard Disk         --
Disk 7      PPIDE3:     Hard Disk         --
Video 0     TMS0:       CRT               Text,40x24
Sound 0     SND0:       AY-3-8910         3+1 CHANNELS


RC2014 Boot Loader

Boot [H=Help]:

Very nice touch to see IBM printed in the detection line, I like it!

I tested the mainboard without any drives attached, outside of the case, which is why there is no IDE drive showing here.

I have been working a lot on my documentation this weekend, it's getting along, and I still have many more things to include.

When it's finished I will post a copy here.

I have defined a number of stages to build up and test the mainboard.

With this ROM, all building stages can be tested.

When adding more RAM ICs, the memory settings can be changed and updated in the ROM.

Thanks for all your work Wayne!

Kind regards,

Rodney

Op zondag 26 juni 2022 om 23:53:48 UTC+2 schreef wwar...@gmail.com:

[Wayne Warthen]

On Monday, June 27, 2022 at 3:44:30 AM UTC-7 rodne...@gmail.com wrote:

I have tested the changes in the driver and it works now.

Thanks a lot for this update!

Excellent. 

I got some messages when compiling the ROM that "Label must pre-exist for SET".

Sorry, I missed some entries in some of the base config files.  I have checked in fixes for this. 

 

Very nice touch to see IBM printed in the detection line, I like it!

Yeah, the circuit is basically the IBM PC standard.

Thanks,

Wayne

[Patrick Jackson]

Hey, I'd hate to see this project fail. Do you need a hand with hardware in any way?