Lenovo G505s with Coreboot and Qubes R4-rc3 fails to boot

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Blooorp

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Dec 26, 2017, 4:26:10 PM12/26/17
to qubes-users
I installed Qubes with Encryption on my laptop, all looked fine exept for a popup saying that my hardware doesn't support Interrupt Remapping, which shouldn't fail my install.

Then on first boot, after I enter my password, the graphical loading screen appears for a few seconds, black screen, a series of console outputs(too fast to grasp much of it, tho I noticed a "kernel panic - not syncing: fatal exception" and back to boot.

The same happened at each boot, sometimes it didn't even ask me for my password and failed the same way. I reinstalled Qubes without encryption but the same happened.

I tried to reboot without my wifi card or without the "iommu=no-igfx" parameter in the GRUB boot menu but no result.

Any idea what may be happening?
Any way to save the boot logs? I tried making journalctl persistent and export the files with the troubleshooting tool from the installation media, but nothing was saved.

I'm pretty much using the same machine with the same coreboot build and the same version of Qubes than Awokd but he doesn't have this issue.

Thanks in advance :)

Blooorp

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Dec 26, 2017, 5:45:45 PM12/26/17
to qubes-users
Some additional input I forgot to add : I have the version of the G505s with integrated HD 8650G + discrete R5 M230 graphics.

Blooorp

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Dec 27, 2017, 11:11:53 AM12/27/17
to qubes-users
Le mardi 26 décembre 2017 22:26:10 UTC+1, Blooorp a écrit :
Some more error data I gathered from coreinfo's Bootlog :

Failed to enable LTR for dev = PCI: 01:00.0
Failed to enable LTR for dev = PCI: 02:00.0
...
I2C: 01:50 missing read_resources
I2C: 01:51 missing read_resources
PNP: 00ff.1 missing read_resources
...
Warning: Can't write PCI_INTR 0xC00/0xC01 registers because 'mainboard_picr_data' or 'mainboard_intr_data' tables are NULL
Warning: Can't write PCI IRQ assignments because 'mainboard_pirq_data' structure does not exist
...
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
...
Manufacturer: ef
SF: Detected W25Q32 with sector size 0x1000, total 0x400000
ASSERTION ERROR: file 'src/drivers/spi/spi_flash.c', line 425
ASSERTION ERROR: file 'src/drivers/spi/spi_flash.c', line 425
ASSERTION ERROR: file 'src/drivers/spi/spi_flash.c', line 425
ASSERTION ERROR: file 'src/drivers/spi/spi_flash.c', line 425
Manufacturer: ef
SF: Detected W25Q32 with sector size 0x1000, total 0x400000
ASSERTION ERROR: file 'src/drivers/spi/spi_flash.c', line 425
ASSERTION ERROR: file 'src/drivers/spi/spi_flash.c', line 425
ASSERTION ERROR: file 'src/drivers/spi/spi_flash.c', line 425
ASSERTION ERROR: file 'src/drivers/spi/spi_flash.c', line 425
ASSERTION ERROR: file 'src/drivers/amd/agesa/state_machine.c', line 309
...
EEPROM not found
EEPROM not found
EEPROM not found
EEPROM not found
EEPROM not found
EEPROM not found
EEPROM not found
...
I2C: 01:50 (unknown)
I2C: 01:51 (unknown)
...
APIC: 11 (unknown)
APIC: 12 (unknown)
APIC: 13 (unknown)
PCI: 01:00.0 (unknown)
PCI: 02:00.0 (unknown)
PNP: 00ff.0 (unknown)


"..." are parts I didn't write down as they didn't show any obvious errors(even tho I'm bad at seeing them) and it would take me a loooong time to write down the full log as I can't export it as far as I know, if you need any more information from it, I can write down any part missing.

Output of "cbfstool coreboot.rom print" after I added the optionrom for the R5 M230 discrete graphic card :
Name Offset Type Size Comp
cbfs master header 0x0 cbfs header 32 none
fallback/ramstage 0x80 stage 129247 none
config 0x1f9c0 raw 263 none
revision 0x1fb00 raw 582 none
payload_revision 0x1fd80 raw 239 none
apu/amdfw 0x1fec0 raw 131072 none
fallback/romstage 0x3ff00 stage 320556 none
cmos_layout.bin 0x8e3c0 cmos_layout 1164 none
pci1002,990b.rom 0x8e8c0 optionrom 61952 none
fallback/postcar 0x9db40 stage 13268 none
fallback/dsdt.aml 0xa0f80 raw 9435 none
img/coreinfo 0xa34c0 payload 102712 none
img/nvramcui 0xbc640 payload 141628 none
fallback/payload 0xdefc0 payload 67370 none
payload_config 0xef740 raw 1611 none
pci1002,6665.rom 0xefe00 optionrom 32768 none
(empty) 0xf7e80 null 3112984 none
s3nv 0x3efec0 raw 32768 none
(empty) 0x3f7f00 null 31192 none
bootblock 0x3ff900 bootblock 1424 none


I will share my coreboot .config, full make output and my coreboot.rom.
.config
coreboot.rom
make_output

Tai...@gmx.com

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Dec 27, 2017, 1:05:40 PM12/27/17
to Blooorp, qubes-users
What version of coreboot are you using, they are removing AGESA from the
latest versions due to some dumb choices by the leadership.

I would use v4.6, it is what I use.

Blooorp

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Dec 27, 2017, 2:36:31 PM12/27/17
to qubes-users
I use 4.6 too, it's the current version.
(to be precise : 4.6-2477-g6ab3edac3c-dirty)

I ran the 3.1 live USB and installed 3.2, what I could get out of them (they all failed to start) :

Live 3.1 :
mce: Unable to init device /dev/mcelog (rc: -16)
radeon 000:04:00:0: Invalid ROM contents
radeon 000:04:00:0: Invalid ROM contents
[drm:radeon_get_bios] *ERROR* Unable to locate a BIOS ROM
radeon 000:04:00:0: Fatal error during GPU init
[TTM] Memory type 3 has not been initialized
SQUASHFS error: squashfs_read_data failed to read block 0x5cb75d68
SQUASHFS error: Unable to read data cache entry [0x5cb75d68]
SQUASHFS error: Unable to read page, block 0x5cb75d68, size af0
SQUASHFS error: Unable to read data cache entry [0x5cb75d68]
SQUASHFS error: Unable to read page, block 0x5cb75d68, size af0
EXT4-fs error (device dm-0): ext4_find_entry:1289: inode #41642: comm plymouthd: reading directory lblock 0
(Hangs at the Qubes graphical loading screen, with loading bar full.)

3.2 (Install looked fine) :
Hangs at "Booting from Hard Disk..." in SeaBIOS on every try

Some more information about 4.0 rc3 :
[ FAILED ] Failed to start Load Kernel Modules.
...
[ OK ] Reached target Basic System.
(Hangs for about 10secs, followed by 5s of black screen)
BUG: Unable to handle NULL pointer dereference at (null)
(followed by a lot of output likely concerning the error and quickly back to boot)
Sadly too much output and disappearing too fast for me to get anything out of it if all I can do is read and type to export it. Tried Ctrl+S/Ctrl+Q to "pause" it but nope, also checked that the laptop should not reboot in case of kernel panic but it still does...

awokd

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Dec 27, 2017, 5:30:51 PM12/27/17
to Tai...@gmx.com, Blooorp, qubes-users
On Wed, December 27, 2017 6:05 pm, Tai...@gmx.com wrote:
> What version of coreboot are you using, they are removing AGESA from the
> latest versions due to some dumb choices by the leadership.

I'm not sure that's accurate. From the thread on the Coreboot mailing list
a few months ago, it sounded to me like they had been considering it, but
someone did the work necessary to keep them alive.

And Blooorp, you might want to try that mailing list too if you are still
stuck! Would be more there who'd know about Coreboot specific issues.



qma ster

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Dec 29, 2017, 4:57:44 PM12/29/17
to qubes-users
Tuesday, 28 December 2017 , 4:30:51 UTC+6 awokd wrote:
The complete "trying-to-kill-AGESA-boards" story:

1) At the end of 2015 some coreboot devs didn't like AGESA and its' "long" compilation times, and because of that + maybe some other personal/financial reasons : they wanted to quietly move AGESA boards from the main coreboot to some separate soon-to-be-abandoned-for-death branch, or even remove it completely!

For example: https://mail.coreboot.org/pipermail/coreboot/2015-November/080578.html - "[coreboot] A case for branching AGESA"

But, thanks to Vladimir Shipovalov raising the heated discussion threads like this - https://mail.coreboot.org/pipermail/coreboot/2015-November/080637.html - "[coreboot] Removal of AGESA - to be or NOT to be? A story of G505S" - and thanks to the kind developers who supported his side, we all dodged a 'rotting code' bullet !

2) Second attempt has been made by the Google people, who want to set up the higher standards for coreboot sources - e.g. by removing all the boards which didn't support EARLY_CBMEM_INIT ---> which included AGESA boards like G505S:

https://mail.coreboot.org/pipermail/coreboot/2017-May/084255.html - "[coreboot] Platform / Chip removals after upcoming releases"

Huge thanks to Kyösti Mälkki and everyone who financially supported his work, he brought that EARLY_CBMEM_INIT feature to many boards and now the majority of AGESA boards - including G505S - are safe again. But we should never relax:

Carefully watch the coreboot mailing lists - so that, when a threat of G505S removal appears again - we will be able to address this threat in a timely manner, not just by modifying the source code to fix the "not matching the standard" issues - but also starting the big discussions to show that a huge amount of people TRULY CARE about AGESA boards and wouldn't let a silent removal happen. And, if "introducing a standard" means dropping half of coreboot supported boards, maybe we could argue that this standard shouldn't be introduced?

If you can't contribute by source, contribute by your support voice ;)

The next potential danger is:

* After the 4.8 release, and with every release after that, platforms that
have not been updated in the board-status repository within the previous
year will be removed

You need to learn how to submit a board status, and also re-test coreboot building at least one-two months, so that - if some commit suddenly breaks coreboot - we'll be able to quickly find that commit and do something with that offending code before the other parts of repository started to really depend on it

Best regards,
Ivan Ivanov

awokd

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Dec 29, 2017, 5:11:40 PM12/29/17
to qma ster, qubes-users
On Fri, December 29, 2017 9:57 pm, qma ster wrote:

> The complete "trying-to-kill-AGESA-boards" story:

Thank you for the background, and for your nice work with Mike on the GPUs!


Ivan Ivanov

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Dec 29, 2017, 5:50:49 PM12/29/17
to aw...@danwin1210.me, qubes...@googlegroups.com
awokd, Thank you very much for your microcode research ;)

Please remind me, which version of G505S do you have:
integrated /// integrated + HD 8570M /// integrated + R5 M230 ?

Last time we experimented with Mike, we were 100% sure we extracted vgabios'es
correctly, in the best possible way, but - maybe because of unstable
AMDGPU at Linux -
we couldn't get our discrete GPUs working at this time, no matter what
we tried :P

If you have integrated + one of the discretes:
do you have a discrete GPU working when you are using two vgabios'es ?
If yes, at what Linux distro and what kernel, your software setup?

I'm going to re-test it soon with a more stable kernel, probably
something like 4.14.8
at Void Linux: excellent not-systemd distro which is stable while
having very modern packages

Not Qubes OS, because at Qubes its very difficult to test any GPU,
this OS isn't for gaming ;-)
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Tai...@gmx.com

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Dec 29, 2017, 5:57:36 PM12/29/17
to qma ster, qubes-users
I am glad there are still some good people in the coreboot community.

Thanks for the info, yeah I have put up a stink about it many times but
it seemed like no one cared. I have been moderated from the list many
times for complaining about the direction the project is going in
(corporate controlled, only unobtainable intel dev boards supported due
to absurd standards etc) and all the shady money people like purism
censoring developers (they even tried to get someone fired from google
from posting a simple fact about their products on the coreboot blog)
and constantly badgering the FSF to try and get them to ruin the RYF
standard.

I assume purism is behind the requests to remove half the useful
coreboot boards - it makes financial sense for them to do this and they
certainly have the low morals required for it.

awokd

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Dec 29, 2017, 6:26:34 PM12/29/17
to Ivan Ivanov, aw...@danwin1210.me, qubes...@googlegroups.com
On Fri, December 29, 2017 10:50 pm, Ivan Ivanov wrote:
> awokd, Thank you very much for your microcode research ;)
>
> Please remind me, which version of G505S do you have:
> integrated /// integrated + HD 8570M /// integrated + R5 M230 ?

Mine's the integrated. Blooorp turned out to have the integrated + R5
M230. We managed to get his working with Qubes 4.0 by adding
xen-pciback.hide(04:00.0) to the dom0 command line in GRUB so it wouldn't
attempt to initialize the M230 at all. That's why his kept crashing.

> Last time we experimented with Mike, we were 100% sure we extracted
> vgabios'es correctly, in the best possible way, but - maybe because of
> unstable AMDGPU at Linux -
> we couldn't get our discrete GPUs working at this time, no matter what we
> tried :P

> If you have integrated + one of the discretes:
> do you have a discrete GPU working when you are using two vgabios'es ? If
> yes, at what Linux distro and what kernel, your software setup?
>
> I'm going to re-test it soon with a more stable kernel, probably
> something like 4.14.8 at Void Linux: excellent not-systemd distro which is
> stable while having very modern packages
>
> Not Qubes OS, because at Qubes its very difficult to test any GPU,
> this OS isn't for gaming ;-)

We troubleshot his in a similar way but with Stretch. If you load the
firmware-amd-graphics package it gave us some helpful output. In this case
it seemed like it was missing the blob (signature 0x0000 instead of what
it wanted) so we just hid it. I'm curious too to see if it would work
properly with one but unfortunately can't try on mine!


Ivan Ivanov

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Dec 29, 2017, 6:32:32 PM12/29/17
to Tai...@gmx.com, qubes...@googlegroups.com
Yes, I am also very disappointed in purism, and its still unclear for
me why they went the Intel road, when - at 2013 - they could have
created a more freedom-respecting equivalent of G505S, instead of
yet-another-Intel-laptop-with-ME-crapware..... but deep in the heart i
still hope they'd use their (a bit fraudulently earned) money for a
good cause - e.g. if they would create a truly libre laptop based at
not-ME/PSP cpu

Taiidan, same questions to you (if your G505S has a discrete graphics):
do you have a discrete graphics working with two vgabios'es, and if
yes - at what setup?

Great idea is to stockpile the G505S and its spare replacement parts /
IC components , so that - if your current one breaks - you had a more
than one replacement. Lenovo tells that the average lifespan of G505S
laptop is 4 years - and, while it could survive longer in the caring
hands - it would really help if you have the replacement G505S / G505S
motherboards / major components of G505S motherboard like the spare
KB9012QF A3 controllers and southbridge, Especially the KB9012's -
they are very cheap, and at the same time - vulnerable to voltage
spikes, so if you have unstable electricity at house and your power
adapter wouldn't block a spike - KB9012 could easily die. AliExpress
is your friend... :P

awokd

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Dec 29, 2017, 6:40:05 PM12/29/17
to Ivan Ivanov, tai...@gmx.com, qubes...@googlegroups.com
On Fri, December 29, 2017 11:32 pm, Ivan Ivanov wrote:
> 2017-12-30 1:57 GMT+03:00 Tai...@gmx.com <Tai...@gmx.com>:
>
> Yes, I am also very disappointed in purism, and its still unclear for
> me why they went the Intel road, when - at 2013 - they could have created a
> more freedom-respecting equivalent of G505S, instead of

This was hashed over in the Coreboot mailing list recently, see
https://mail-archive.com/core...@coreboot.org/msg50746.html. To be
honest, I'm kind of tired of hearing about Purism now. ;) I think people
have made their positions clear.



Ivan Ivanov

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Dec 29, 2017, 6:56:05 PM12/29/17
to aw...@danwin1210.me, qubes...@googlegroups.com
Maybe its just a driver which can't find a blob - by itself the GPU
should have this blob loaded on it by coreboot.
https://bugs.freedesktop.org/show_bug.cgi?id=101473
Alex Deucher says that "Invalid PCI ROM header signature: expecting
0xaa55, got 0x0000" message can be ignored

BTW this "0x0000" issue is not G505S specific, seems T400s also has it
- https://lists.gnu.org/archive/html/libreboot/2016-05/msg00050.html
There aren't many coreboot supported laptops with dual GPU perhaps
thats why its not fixed yet

Also, maybe it could be possible to somehow pass a copy of that
vgabios blob from GRUB to a Linux kernel, so that its' driver detects
this blob.
If i'm not mistaken i've seen the people trying it for their Mac Pro
(similar problem but got another value, maybe 0xffff), forgot how its
ended though

The research about GPUs is not over, we are going to continue it soon ;)

Tai...@gmx.com

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Dec 29, 2017, 7:20:12 PM12/29/17
to aw...@danwin1210.me, Ivan Ivanov, qubes...@googlegroups.com
:<
I only make so much noise because no one else is doing so - they have
strangely universal positive coverage in the mainstream tech media and
the real facts and downsides are never mentioned or investigated - not
to mention that the real libre products like TALOS 2 and Novena get
little to no press for some reason.

I respect your opinion, but there are still so many laymen who think
that "LibreM" means "Libre" (the purism goons say it doesn't and that
its not their fault people are confused) so I feel as though I must
continue.

awokd

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Dec 29, 2017, 8:45:32 PM12/29/17
to Ivan Ivanov, aw...@danwin1210.me, qubes...@googlegroups.com
On Fri, December 29, 2017 11:56 pm, Ivan Ivanov wrote:
> Maybe its just a driver which can't find a blob - by itself the GPU
> should have this blob loaded on it by coreboot.
> https://bugs.freedesktop.org/show_bug.cgi?id=101473
> Alex Deucher says that "Invalid PCI ROM header signature: expecting
> 0xaa55, got 0x0000" message can be ignored
>
>
> BTW this "0x0000" issue is not G505S specific, seems T400s also has it
> - https://lists.gnu.org/archive/html/libreboot/2016-05/msg00050.html

There were other issues with it too, like at one point the IRQ was set to
255 and it always an <unassigned> memory region. Hard to troubleshoot
without having it in front of you.

> There aren't many coreboot supported laptops with dual GPU perhaps
> thats why its not fixed yet

Probably this.

> Also, maybe it could be possible to somehow pass a copy of that
> vgabios blob from GRUB to a Linux kernel, so that its' driver detects this
> blob. If i'm not mistaken i've seen the people trying it for their Mac Pro
> (similar problem but got another value, maybe 0xffff), forgot how its
> ended though
>
> The research about GPUs is not over, we are going to continue it soon ;)

Looking forward to it!


Ivan Ivanov

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Dec 30, 2017, 4:16:35 AM12/30/17
to Tai...@gmx.com, awokd, qubes...@googlegroups.com
Thank you very much! Luckily, when the people search, your posts and
posts like this are among the top results:
https://libreboot.org/faq.html#will-the-purism-laptops-be-supported
"There are severe privacy, security and freedom issues with these
laptops, due to the Intel chipsets that they use"
Hopefully the majority of their buyers realize that they are getting a
typical Intel laptop with coreboot preinstalled,
which is not the "Ultimate Freedom Machine" and actually not much
better than Sandy/Ivy Bridge thinkpads...

Meanwhile, let me to spam this again ;)
" Great idea is to stockpile the G505S and its spare replacement parts
/ IC components , so that - if your current one breaks - you had a
more than one replacement.
Lenovo tells that the average lifespan of G505S laptop is 4 years -
and, while it could survive longer in the caring hands - it would
really help if you have the replacement G505S / G505S motherboards /
major components of G505S motherboard like the spare KB9012QF A3
controllers and southbridge.
Especially the KB9012's - they are very cheap, and at the same time -
vulnerable to voltage spikes, so if you have unstable electricity at
house and your power adapter wouldn't block a spike - KB9012 could
easily die. AliExpress is your friend... :P "

Mike is good at writing wiki pages like these:
http://dangerousprototypes.com/docs/Flashing_a_BIOS_chip_with_Bus_Pirate
http://dangerousprototypes.com/docs/Flashing_KB9012_with_Bus_Pirate
http://dangerousprototypes.com/docs/Compal_POST_diagnostic_card
http://dangerousprototypes.com/docs/Compal_POST_diagnostic_card_-_Additional
Maybe together we could create a new page for us all, describing the
G505S components and their part numbers.
I will ask him about it soon

Unlike the libreboot-supported laptops, which are good but have a slow
hardware ( Core 2 Duo / 4 GB RAM ),
G505S ia a quad core beast with 16 GB RAM possible -----> and at the
same time not Intel ME / PSP !
Could take many years before we see another laptop with such a great
performance / freedom ratio,
so it makes a total sense to turn it into Long Term Support laptop for
you and your freedom caring friends.

And, if you accidentally get too many G505S - their value should only
rise in the future, could re-sell.
Just hope we wouldn't inflate the prices for each other at those auctions ;-)

Happy coming New Year :)
Ivan

Emil Novik

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Jan 5, 2018, 6:19:55 PM1/5/18
to qubes...@googlegroups.com

Does any G505s owner ever tried to put more than 16Go ram in it?
The limit is meant to be 16Go but some laptops can use more than officially supported, wondering if the G505s is one of these.

Would be nice to run 32Go ram on it for Qubes !

---
Emil Novik





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awokd

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Jan 5, 2018, 7:01:18 PM1/5/18
to Emil Novik, qubes...@googlegroups.com
On Fri, January 5, 2018 11:19 pm, 'Emil Novik' via qubes-users wrote:
> Does any G505s owner ever tried to put more than 16Go ram in it?
> The limit is meant to be 16Go but some laptops can use more than
> officially supported, wondering if the G505s is one of these.
>
> Would be nice to run 32Go ram on it for Qubes !

I think the max supported DIMM size is 8GB. Taiidan is the guru, hopefully
he knows!

Tai...@gmx.com

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Jan 6, 2018, 4:27:45 PM1/6/18
to aw...@danwin1210.me, Emil Novik, qubes...@googlegroups.com
I highly doubt it can support more than 16GB although considering the
desktop version of that CPU can support 16GB DIMM's it is worth asking
about on the coreboot mailinglist.

Ivan Ivanov

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Jan 6, 2018, 5:37:18 PM1/6/18
to qubes...@googlegroups.com, Tai...@gmx.com, awokd
I believe, something like this could be reliably determined only by experiment.
but 16 GB DDR3 SO-DIMMs are very expensive - especially now,
when the RAM prices hiked and 4 GB of DDR3 now costs like 8 GB :P
Currently it makes much more sense to get extra coreboot supported hardware
(e.g. some spare G505S laptops) rather than more RAM...

Do you live in a country with favorable customer laws?
Could you order a couple of 16 GB memory modules, test them,
and if they don't work (or if you simply don't need that much memory)
return them to seller without additional costs to you? such as repack fee

Best regards,
Ivan Ivanov
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Tai...@gmx.com

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Jan 6, 2018, 6:03:23 PM1/6/18
to aw...@danwin1210.me, qubes...@googlegroups.com

On 12/29/2017 08:21 PM, awokd wrote:

I appreciate your enthusiasm for the AMD products.
Nah I don't like AMD due to PSP - it is simply that they added it much later than intel did ME so the pre-PSP AMD stuff is still fast enough to be useful which is why I recommend it for those who require x86-64.

My only CPU enthusiasm is for POWER (and thus TALOS 2)
It was actually one of
your posts along with several other people's that convinced me to get the
G505s. But there might be more effective ways of communicating your
concerns with Purism than frequently repeating it to the same groups of
people. :) You mention tech media for example, have you contacted them?
I have many times, sometimes I receive a reply but it never goes anywhere :[
I assume they receive so many emails they simply ignore mine.
Or
how about writing a fact-based expose (make sure it doesn't seem like a
rant) and submitting it or blogging it somewhere? I'm no PR guy though, so
maybe those aren't good ideas.
No they are :3 its just that the tech media only cares about shiny appley type products not stuff made for real work.

Mike Banon

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Mar 8, 2018, 6:19:54 AM3/8/18
to aw...@danwin1210.me, Ivan Ivanov, tai...@gmx.com, ech...@free.fr, Emil Novik, Emil Novik, qubes...@googlegroups.com
Hi awokd,

> I looked around the wiki; should I make a G505s Project page?

I created a new page and will be working on it soon:
http://dangerousprototypes.com/docs/Lenovo_G505S_hacking . You could
edit it too, just create a new account at the DangerousPrototypes
forums and you can use the same account to create/edit the wiki pages

> Doesn't quite seem to fit with the other projects in there. Or I
> could start a new thread in their project logs forum, perhaps.

I told in the introduction what is making this laptop so different
from 9000+ others. All this could be called a "hacking project" which
matches a topic and spirit of the DangerousPrototypes. Although, maybe
its' a good idea not to spam the forums with a link to this article,
at least until its' complete ;) Let's just silently work on our stuff,
using the DP wiki as a great host for our work. I am already very
familiar with its' wiki format after writing some long articles there,
so it'd be more convenient for me to just continue writing at DP and
without thinking of GitHub "commits" and "pull requests" ! You are
welcome to join ;)

> Please see also
https://www.mail-archive.com/core...@coreboot.org/msg50948.html

Thank you for this summary, it will be definitely useful when I'd try
to commit this by myself

> The main sticking point for me with Coreboot commits was their real
> name policy. I could just make up a plausible sounding one, but I don't
> see why they arbitrarily require it- kind of offends me really.
> ...
> I spoke with a friend who's willing to put a name
> to the commits so I can work with him to get stuff through,
> just might be a bit delayed.

Luckily you do not need to somehow confirm the name under which you
are sending the commits. How could they verify if your name is real or
not? And what is a real name at all? :) Theoretically you could change
your "real name" daily and it does not have to match your "document
name" - a name under which the government knows you

> I'm happy to help develop patches at my beginner level as long as the work won't go to waste. Is there an open source GUI IDE you can recommend for Coreboot? Grep and gedit are only getting me so far...

Its' possible to use kdiff3 and meld to easily compare the sources in
GUI mode (useful when you're doing many changes), okteta as GUI hex
editor, and many other great tools you maybe haven't heard about ;)
The official GUI IDE for coreboot does not exist, but you could be
using your own " GUI IDE " which would be just a combination of all
those great utilities

Best wishes,
Mike Banon<div class="gmail_extra"><br><div class="gmail_quote">On
Tue, Mar 6, 2018 at 12:17 PM, awokd <span dir="ltr">&lt;<a
href="mailto:aw...@danwin1210.me"
target="_blank">aw...@danwin1210.me</a>&gt;</span>
wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0
.8ex;border-left:1px #ccc solid;padding-left:1ex"><span class="">On
Mon, March 5, 2018 10:53 am, awokd wrote:<br>
<br>
&gt; The main sticking point for me with Coreboot commits was their
real name<br>
&gt; policy.<br>
<br>
</span>Thanks for trying with your post to Coreboot mailing list, Taiidan.<br>
Figures it's the damn lawyers. I spoke with a friend who's willing to put<br>
a name to the commits so I can work with him to get stuff through, just<br>
might be a bit delayed.<br>
<br>
<br>
</blockquote></div><br></div>

awokd

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Mar 8, 2018, 7:18:39 AM3/8/18
to Mike Banon, aw...@danwin1210.me, Ivan Ivanov, tai...@gmx.com, ech...@free.fr, Emil Novik, Emil Novik, qubes...@googlegroups.com
On Thu, March 8, 2018 11:19 am, Mike Banon wrote:
> Hi awokd,
>
>
>> I looked around the wiki; should I make a G505s Project page?
>>
>
> I created a new page and will be working on it soon:
> http://dangerousprototypes.com/docs/Lenovo_G505S_hacking . You could
> edit it too, just create a new account at the DangerousPrototypes forums
> and you can use the same account to create/edit the wiki pages

Thank you, I definitely will; just wasn't sure where best to place it!

>> The main sticking point for me with Coreboot commits was their real
>> name policy.

I'm OK on this aspect now- have a workaround.

> Its' possible to use kdiff3 and meld to easily compare the sources in
> GUI mode (useful when you're doing many changes), okteta as GUI hex
> editor, and many other great tools you maybe haven't heard about ;) The
> official GUI IDE for coreboot does not exist, but you could be using your
> own " GUI IDE " which would be just a combination of all those great
> utilities

Thanks, will check those out. Even something that lets me hover over some
constant and it pops up the value from the .h or lets me select an
expression like CONSTANT >> 4 and it shows me what that evaluates to would
save me so much time!


Mike Banon

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Apr 9, 2018, 4:03:37 PM4/9/18
to aw...@danwin1210.me, qma ster, Tai...@gmx.com, ech...@free.fr, Emil Novik, Emil Novik, qubesth...@gmail.com, qubes...@googlegroups.com
> Mind if I send that
> http://dangerousprototypes.com/docs/Lenovo_G505S_hacking link out to the
> qubes-users list in reply to an email there? I can hold off if you prefer,
> I agree it's a bit rough right now. :)

No problem, maybe someone from us would have time to complete this, one day

On Sun, Apr 1, 2018 at 2:06 PM, awokd <aw...@danwin1210.me> wrote:
> On Wed, March 14, 2018 11:01 pm, Mike Banon wrote:
>> Hi awokd,
>>
>>
>> Thank you for your incoming notes! Sorry for the lack of edits from my
>> side, I'm also preparing the materials - just doing it locally at the
>> moment...
>>
>> Please also answer my new e-mail, would like to know your opinion
>>
>>
>> Best regards,
>> Mike
>
> Mind if I send that
> http://dangerousprototypes.com/docs/Lenovo_G505S_hacking link out to the
> qubes-users list in reply to an email there? I can hold off if you prefer,
> I agree it's a bit rough right now. :)
>
>

Mike Banon

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Jun 11, 2018, 11:39:32 AM6/11/18
to aw...@danwin1210.me, qma ster, Tai...@gmx.com, ech...@free.fr, Emil Novik, Emil Novik, qubesth...@gmail.com, qubes...@googlegroups.com
Dear awokd, regarding your wiki instruction (
http://dangerousprototypes.com/docs/Lenovo_G505S_hacking ) : please
tell, is it working for this microcode file recently uploaded by AMD
guy: https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/amd-ucode
, size 7876 bytes, upload date 2018-05-25 . In particular, " dd
skip=5284 " - is it still working or another skip value is needed?
(and how did you get this 5284 number for the first time?) . Also, are
the values from EquivalenceTables still valid or a change is needed?

Best regards,
Mike Banon

awokd

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Jun 12, 2018, 12:12:29 PM6/12/18
to Mike Banon, aw...@danwin1210.me, qma ster, tai...@gmx.com, ech...@free.fr, Emil Novik, Emil Novik, qubesth...@gmail.com, qubes...@googlegroups.com
On Mon, June 11, 2018 3:39 pm, Mike Banon wrote:
> Dear awokd, regarding your wiki instruction (
> http://dangerousprototypes.com/docs/Lenovo_G505S_hacking ) : please
> tell, is it working for this microcode file recently uploaded by AMD guy:
> https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.g
> it/tree/amd-ucode , size 7876 bytes, upload date 2018-05-25 . In
> particular, " dd skip=5284 " - is it still working or another skip value
> is needed? (and how did you get this 5284 number for the first time?) .
> Also, are
> the values from EquivalenceTables still valid or a change is needed?

Hopefully you get this; gmail blocked my email provider...

No, those steps won't work as is for that ucode file. The one in Linux
packages like 3 or 4 different ucodes together into one file. I figured
out where to skip by searching for the date code in reverse byte order and
the header info. If that ucode file is only for our G505s, you might not
need to skip at all.

The EquivalenceTables should remain the same.


Mike Banon

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Jun 12, 2018, 7:41:35 PM6/12/18
to aw...@danwin1210.me, qma ster, tai...@gmx.com, ech...@free.fr, Emil Novik, Emil Novik, qubesth...@gmail.com, qubes...@googlegroups.com
Thank you very much for reply! Do you have an idea regarding how a new
command (for the extraction of "G505S u-code" from that new u-code
file) would look like? I will try to follow your instructions -
searching for a header - but, since I've never done that before, I'm
curious about your version of that command, to double check

P.S. I'm still receiving your letters (also would change e-mail
provider in the near future hopefully) . Also noticed your new message
inside that Bus Pirate thread at dangerousprototypes forums, would
reply something soon

awokd

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Jun 13, 2018, 4:40:30 AM6/13/18
to Mike Banon, aw...@danwin1210.me, qma ster, tai...@gmx.com, ech...@free.fr, Emil Novik, Emil Novik, qubesth...@gmail.com, qubes...@googlegroups.com
On Tue, June 12, 2018 11:41 pm, Mike Banon wrote:
> Thank you very much for reply! Do you have an idea regarding how a new
> command (for the extraction of "G505S u-code" from that new u-code
> file) would look like? I will try to follow your instructions -
> searching for a header - but, since I've never done that before, I'm
> curious about your version of that command, to double check
>
> P.S. I'm still receiving your letters (also would change e-mail
> provider in the near future hopefully) . Also noticed your new message
> inside that Bus Pirate thread at dangerousprototypes forums, would
> reply something soon

On my last reply, I didn't realize you had cc'd in the Qubes group. Might
be best to take this discussion over to Coreboot's mailing list since it's
not Qubes specific.

I'm wondering if all you have to do is convert that entire ucode into hex;
might be no need to skip anything? Thanks for the heads up on the new
version, I'll take a look too.


mattheww...@gmail.com

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Jun 20, 2018, 1:38:18 AM6/20/18
to qubes-users
On Tuesday, 26 December 2017 16:26:10 UTC-5, Blooorp wrote:
> I installed Qubes with Encryption on my laptop, all looked fine exept for a popup saying that my hardware doesn't support Interrupt Remapping, which shouldn't fail my install.
>
> Then on first boot, after I enter my password, the graphical loading screen appears for a few seconds, black screen, a series of console outputs(too fast to grasp much of it, tho I noticed a "kernel panic - not syncing: fatal exception" and back to boot.
>
> The same happened at each boot, sometimes it didn't even ask me for my password and failed the same way. I reinstalled Qubes without encryption but the same happened.
>
> I tried to reboot without my wifi card or without the "iommu=no-igfx" parameter in the GRUB boot menu but no result.
>
> Any idea what may be happening?
> Any way to save the boot logs? I tried making journalctl persistent and export the files with the troubleshooting tool from the installation media, but nothing was saved.
>
> I'm pretty much using the same machine with the same coreboot build and the same version of Qubes than Awokd but he doesn't have this issue.
>
> Thanks in advance :)

Hi!

This seems like a pretty active, general thread full of G505s users, so I thought I'd drop by. My G505s came in the mail today: I'm one of those dumb windows users who realized the error of their ways, working to slowly scrub the microsoft out of my life. (also the Comp Eng student who built the world's crappiest CPU)

My G505s is one of those A10s with the fancy radeon discrete graphics. It also came with 8GB of RAM and a 1TB drive I will promptly fill with zeros.

I'm new to the ways of linux, but I know my way around well enough to get stuff done. I'm eager to help out with the maintenance and support of the G505s any way I can, which I expect will probably involve playing the guinea pig for a while. (good thing ebay has a lot of spare parts, boards included :D)

Stuff I'm considering:
-hunting for rowhammer-proof DDR3 (I have a candidate 8GB SODIMM in mind, current personal record with google's test is 24h+ of single sided hammering followed by a power outage, and 9h45 of single sided hammering followed by a bit flip; ECC and non ECC DDR2 respectively)
-syncing the latest commits and testing that nothing explodes, if that needs to be recorded
-may try (core)booting the G505s with an A8, since those pop up on ebay more often than the A10 variant, and I think I can stomach the cost in the interests of science if people are intrigued
-testing out any attempts to get discrete graphics working, since I've got the nicer of the two available GPUs
-testing attempts to improve other stuff (does ACPI still need work? I get the feeling the wiki's out of date)

My daily driver laptop will probably continue to be a PoS (piece of sh*t) HP laptop with win8.1 (newer and supposedly slower than a G505s, PSP included :/) for the foreseeable future, so I'm not too worried about bricking the G505s once-in-a-while. Don't worry, I have a nice centos 7 desktop with no PSP and full Spectre mitigation (so far, thanks to chicken bits) for the real work.

Anyhoo, that's my introduction. I'll probably have more to say later this week when I can actually get the darn thing out of the box it shipped in.

If anyone has any getting started advice, I'd love to hear it. (beyond buying an ath9k) I plan on documenting the experience, since I figure having a nice, illustrated step-by-step blog will help raise awareness about the G505s.

-Matt

Tai...@gmx.com

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Jun 20, 2018, 9:26:36 PM6/20/18
to qubes...@googlegroups.com
On 06/20/2018 01:38 AM, mattheww...@gmail.com wrote:
> On Tuesday, 26 December 2017 16:26:10 UTC-5, Blooorp wrote:
>> I installed Qubes with Encryption on my laptop, all looked fine exept for a popup saying that my hardware doesn't support Interrupt Remapping, which shouldn't fail my install.

It does support it.

Your problem is the lack of microcode updates, search previous posts in
this thread for infos.

>>
>> Then on first boot, after I enter my password, the graphical loading screen appears for a few seconds, black screen, a series of console outputs(too fast to grasp much of it, tho I noticed a "kernel panic - not syncing: fatal exception" and back to boot.
>>
>> The same happened at each boot, sometimes it didn't even ask me for my password and failed the same way. I reinstalled Qubes without encryption but the same happened.
>>
>> I tried to reboot without my wifi card or without the "iommu=no-igfx" parameter in the GRUB boot menu but no result.

nogfx is for old intel junk laptops, again see above.

>>
>> Any idea what may be happening?
>> Any way to save the boot logs? I tried making journalctl persistent and export the files with the troubleshooting tool from the installation media, but nothing was saved.
>>
>> I'm pretty much using the same machine with the same coreboot build and the same version of Qubes than Awokd but he doesn't have this issue.

As he installed the microcode updates (after my prodding :D)

>>
>> Thanks in advance :)
>
> Hi!
>
> This seems like a pretty active, general thread full of G505s users, so I thought I'd drop by. My G505s came in the mail today: I'm one of those dumb windows users who realized the error of their ways, working to slowly scrub the microsoft out of my life. (also the Comp Eng student who built the world's crappiest CPU)
>
> My G505s is one of those A10s with the fancy radeon discrete graphics. It also came with 8GB of RAM and a 1TB drive I will promptly fill with zeros.

It supports 16GB FYI.

>
> I'm new to the ways of linux, but I know my way around well enough to get stuff done. I'm eager to help out with the maintenance and support of the G505s any way I can, which I expect will probably involve playing the guinea pig for a while. (good thing ebay has a lot of spare parts, boards included :D)
>
> Stuff I'm considering:
> -hunting for rowhammer-proof DDR3 (I have a candidate 8GB SODIMM in mind, current personal record with google's test is 24h+ of single sided hammering followed by a power outage, and 9h45 of single sided hammering followed by a bit flip; ECC and non ECC DDR2 respectively)

Installing coreboot will help you here as it *should* increase the
refresh rate

> -syncing the latest commits and testing that nothing explodes, if that needs to be recorded
> -may try (core)booting the G505s with an A8, since those pop up on ebay more often than the A10 variant, and I think I can stomach the cost in the interests of science if people are intrigued

Why not coreboot your faster and better A10? It is very easy and we are
happy to help!

> -testing out any attempts to get discrete graphics working, since I've got the nicer of the two available GPUs
> -testing attempts to improve other stuff (does ACPI still need work? I get the feeling the wiki's out of date)

With coreboot everything works, and 4.0 runs great.
>
> My daily driver laptop will probably continue to be a PoS (piece of sh*t) HP laptop with win8.1 (newer and supposedly slower than a G505s, PSP included :/) for the foreseeable future, so I'm not too worried about bricking the G505s once-in-a-while. Don't worry, I have a nice centos 7 desktop with no PSP and full Spectre mitigation (so far, thanks to chicken bits) for the real work.
>
> Anyhoo, that's my introduction. I'll probably have more to say later this week when I can actually get the darn thing out of the box it shipped in.
>
> If anyone has any getting started advice, I'd love to hear it. (beyond buying an ath9k) I plan on documenting the experience, since I figure having a nice, illustrated step-by-step blog will help raise awareness about the G505s.

I am/we are very pleased you made the right choice :D and bought the
genuine article instead of a fake libre laptop.

Tai...@gmx.com

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Jun 20, 2018, 9:27:16 PM6/20/18
to qubes...@googlegroups.com
Hey anyone figured out the deal with fam16 microcode updates for
spectre? Where they at! AMD coughed up the fam15h where is the rest?

mattheww...@gmail.com

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Jun 23, 2018, 5:59:21 PM6/23/18
to qubes-users
> > Hi!
> >
> > This seems like a pretty active, general thread full of G505s users, so I thought I'd drop by. My G505s came in the mail today: I'm one of those dumb windows users who realized the error of their ways, working to slowly scrub the microsoft out of my life. (also the Comp Eng student who built the world's crappiest CPU)
> >
> > My G505s is one of those A10s with the fancy radeon discrete graphics. It also came with 8GB of RAM and a 1TB drive I will promptly fill with zeros.
>
> It supports 16GB FYI.

Yep. I'll be making the upgrade soon. :)
The crappy newer HP I have maxes out at 8.

> > I'm new to the ways of linux, but I know my way around well enough to get stuff done. I'm eager to help out with the maintenance and support of the G505s any way I can, which I expect will probably involve playing the guinea pig for a while. (good thing ebay has a lot of spare parts, boards included :D)
> >
> > Stuff I'm considering:
> > -hunting for rowhammer-proof DDR3 (I have a candidate 8GB SODIMM in mind, current personal record with google's test is 24h+ of single sided hammering followed by a power outage, and 9h45 of single sided hammering followed by a bit flip; ECC and non ECC DDR2 respectively)
>
> Installing coreboot will help you here as it *should* increase the
> refresh rate

That's good to know. I'm planning on testing out some DDR3 from hynix though, since I found exactly *one* DDR3 SODIMM they make/made which (supposedly) has an unlimited MAC. (maximum activation count, at least according to some table someone compiled from datasheets that are no longer accessible).

I figure people who are concerned about rowhammer will find the results interesting, good or bad. (especially since we've seen two remote exploits for rowhammer in the last month or so, one which only requires getting about 800 megabits of carefully crafted packets through the network adapter)

Will report back with results as soon as I can get my hands on it.

> > -syncing the latest commits and testing that nothing explodes, if that needs to be recorded
> > -may try (core)booting the G505s with an A8, since those pop up on ebay more often than the A10 variant, and I think I can stomach the cost in the interests of science if people are intrigued
>
> Why not coreboot your faster and better A10? It is very easy and we are
> happy to help!

I should clarify: I do have the A10 model, but I would like to swap the CPU to an A8 to test coreboot on that, since A8 models show up more often on ebay and some people might want to try coreboot with that. (I don't know why they wouldn't buy an A10 and swap it, but whatever)

> > -testing out any attempts to get discrete graphics working, since I've got the nicer of the two available GPUs
> > -testing attempts to improve other stuff (does ACPI still need work? I get the feeling the wiki's out of date)
>
> With coreboot everything works, and 4.0 runs great.

Are you referring specifically to ACPI, or this stupid dual GPU stuff?

From what I've seen, somebody tried running coreboot on a version of the G505s with a discrete GPU, but had to disable the associated PCI device or coreboot would print pages of debug info an crash. I don't know whether they included a VGA BIOS for it. (I'm not 100% sure how/if coreboot supports multiple VGA BIOSs)

That being said, even if it did boot with both GPUs and both VGA BIOSs, the two appear to run in crossfire, with no connection between the discrete GPU and the screen. There doesn't seem to be any real support in linux for crossfire but I guess you could use the discrete GPU to hardware-accelerate various tasks.

By the sound of it, coreboot doesn't have to do anything to support it like switching a video multiplexer, since it sounds like crossfire transfers data of the PCI bus, but I'm no expert. (well, aside from turning it on and off like the stock BIOS can)

Sadly, (well, probably good for coreboot compatibility) after going over the G505s I got shipped, it seems the ebay seller sent me the version with just the APU, no discrete GPU. I wouldn't entirely discount buying a spare motherboard with it, since they're floating around for not *too* much money, but only if somebody really wants to test/work on getting the discrete GPU working (preferably with a use case in mind). Not in the immediate future though.

> > My daily driver laptop will probably continue to be a PoS (piece of sh*t) HP laptop with win8.1 (newer and supposedly slower than a G505s, PSP included :/) for the foreseeable future, so I'm not too worried about bricking the G505s once-in-a-while. Don't worry, I have a nice centos 7 desktop with no PSP and full Spectre mitigation (so far, thanks to chicken bits) for the real work.
> >
> > Anyhoo, that's my introduction. I'll probably have more to say later this week when I can actually get the darn thing out of the box it shipped in.
> >
> > If anyone has any getting started advice, I'd love to hear it. (beyond buying an ath9k) I plan on documenting the experience, since I figure having a nice, illustrated step-by-step blog will help raise awareness about the G505s.
>
> I am/we are very pleased you made the right choice :D and bought the
> genuine article instead of a fake libre laptop.

I considered it, but I have a fair bit of skepticism how well anyone can "fix" the IME at this stage, even google, so I didn't research further.

Removing modules with the ME_Cleaner is nice, but you can't remove the BUP module (bring-up) and there is a known remote code execution vulnerability against the IME itself (positive technologies) that uses a buffer overflow in the BUP. It's been patched by intel, but that means getting new IME firmware and re-cleaning it.

-Matt

Ivan Ivanov

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Jun 24, 2018, 5:31:55 AM6/24/18
to qubes...@googlegroups.com, Andrew B, Emil Novik, awokd, Matt B, Tai...@gmx.com, Asterysk, Emil Novik, Zoran Stojsavljevic, ech...@free.fr, qubesth...@gmail.com, river1...@gmail.com, tri...@hackingthe.net, Mike Banon
Good day, Matt! Here is a big reply to your messages:

> My daily driver laptop will probably continue to be a PoS (piece of sh*t) HP laptop with win8.1 (newer and supposedly slower than a G505s, PSP included :/) for the foreseeable future, so I'm not too worried about bricking the G505s once-in-a-while. Don't worry, I have a nice centos 7 desktop with no PSP and full Spectre mitigation (so far, thanks to chicken bits) for the real work

flashrom support is bad at Windows, so need to either dual boot or
maybe run some Linux LiveCD to temporarily install a flashrom to your
RAM. And of course you'll need Linux in any case to compile a
coreboot, which requires a plenty of space to be built, so a permanent
installation of Linux is recommended. Its great you already have a
good desktop without PSP to reflash a BIOS of your coreboot laptop,
because who knows if these ME/PSP backdoors could be used to
stealthily modify a coreboot image while its flashed and trick
flashrom to make sure the verification passes. First time I've flashed
a coreboot laptop I've used an ancient AMD-based PC, yes it had a
proprietary BIOS but it wasnt UEFI at least (the huge majority of
modern PCs have UEFI installed, and so its a primary target of
attacks, pretty vulnerable because of its extensible architecture -
should be quite easy to add a backdoor'ed module even without
requiring the full UEFI sources to rebuild from scratch)

I hope you already read these two manuals:
http://dangerousprototypes.com/docs/Flashing_a_BIOS_chip_with_Bus_Pirate
, and http://dangerousprototypes.com/docs/Flashing_KB9012_with_Bus_Pirate
- although these instructions have been written with Bus Pirate
programmer in mind, they are almost the same for a cheap $2 CH341A USB
SPI programmer which is also supported by open-source flashrom
flashing tool, just the connectivity is slightly different and
slightly different flashrom command (given at the end of the article)

First manual will help you to replace G505S proprietary BIOS with
coreboot , without soldering - just using SOIC8 test clip and
flashrom-supported USB programmer. Second manual (if you care enough)
shows how to flash a firmware of KB9012 controller, also without
soldering any cables to your motherboard. At the moment we do not have
an open-source firmware replacement for the proprietary KB9012
firmware (its still being developed, and last time I checked it could
only blink some LEDs, could not start up a laptop), but at least you
could flash a "clean" proprietary KB9012 firmware binary - with the
serial numbers removed. You could get it here:
https://github.com/g505s-opensource-researcher/g505s-proprietary/tree/master/clean_binaries
. flashrom fully supports KB9012 flashing with any supported
programmer, including CH341A, although compared to BIOS flashing its a
very slow flashing - almost 1 hour to flash those 128KB XD Although
this manual is greatly detailed so there shouldn't be any problems,
please note that without a flashed KB9012 firmware the laptop can't
boot, so you need to make sure you're able to complete this process
till the end

If you don't want to teardown your G505S every time you need to
reflash a coreboot BIOS, after you teardown this laptop for the first
time you could cut a "small window" in plastic laptop case, to make it
possible to attach SOIC8 test clip through this window. Could use
either a cheap not-for-food knife (plastic is good and its difficult
to cut it with unheated, so you heat knife's end with gaslighter and
then quickly cut while its hot, could cut up to 1cm each time) or a
soldering iron with an iron tip which you dont value (because it will
be covered in plastic afterwards and too difficult to clean). Here is
a G505S underneath photo with "lines to cut" displayed -
https://imgur.com/7hl4QvB / https://i.imgur.com/7hl4QvB.png . It can
not be done while a laptop is assembled, not only because you'd risk
dropping the hot plastic on the motherboard, also its possible to
damage a flex cable of led board

Some people have also reported that, after they hardware flash a
coreboot once, later they could do a software coreboot firmware
upgrade, but this has been glitchy for me the only time I tried it a
couple of years ago, maybe it already works good but I'm already
pretty used to the hardware flashing :)

> came with 8GB of RAM

Possible to upgrade to 16GB, like Taiidan said, but not all 16 GB kits
are made equal. The best 16GB SO-DIMM kits (Crucial Ballistix Sport
and Patriot Viper) are 1600MHz CL9 9-9-9-24 timings, with nice
aluminium radiator plates glued on their chips. Kingston's HyperX
similar kit is 1600MHz 9-9-9-27, slightly slower. At the same time,
there are slightly cheaper "value ram kits" that are 1600MHz CL11, and
could not work on CL9 faster than 1333MHz. 1600/1333 = 20% speed
difference, although the real world difference will be smaller, but in
any case I recommend to go for any of these "gamer sodimm kits" before
they disappear from the market. Just avoid Corsair's Vengeance if
possible (although they're 1600MHz 9-9-9-24) because it seems they
have higher-than-average failure rate (gone through two bad kits that
had a couple of memtest errors and eventually got refund but wasted
much time)

> hunting for rowhammer-proof DDR3

Regarding the Crucial/Patriot/Kingston kits: I don't know if any these
"gamer kits" are rowhammer proof, and don't know how to test them for
that. Also I doubt there could be some revolutionary technology that
e.g. makes Patriot rowhammer proof while e.g. Crucial is vulnerable;
haven't removed the radiator to check what memory chips are installed
(its glued pretty well, and would be difficult to attach it back) but
I'm quite sure they are similar technology and either all vulnerable
or all safe. So, just choose a fast 1600MHz CAS latency 9-9-9-24 kit

> I'm planning on testing out some DDR3 from hynix though, since I found exactly *one* DDR3 SODIMM they make/made which (supposedly) has an unlimited MAC

I haven't seen any RAM from Hunix that is faster than 1600MHz CL11 or
1333MHz CL9, so if you'd get it you could have up to 20% lower
performance compared to 1600MHz CL9. Also it would suck if even this
Hunix is still vulnerable

> may try (core)booting the G505s with an A8

Does not worth it IMHO, since you could get A10-5750M CPU separately
from AliExpress for about $50 with free shipping (the CPU is not
soldered and could be easily replaced). Although its cheaper and
safer/easier to get G505S with A10 already preinstalled. Having G505S
with A10 either preinstalled or manually upgraded later - would be not
just a faster laptop, but also its more efficient if our hardware
configs are similar - to better concentrate our efforts

But if you still want to get with A8, I think there were two types of
A8 found at various G505S versions: one is A8-4500M (Trinity
architecture) and another is A8-5550M (newer Richland architecture,
like A10-5750M). I think that A8-5550M is just a slower version of
A10-5750M and would be minimal work (if any), meanwhile for Trinity
A8-4500M it could be more difficult. Also, there could be a different
VGABIOS ROM required for A8's internal GPU to work

Getting A10 separately is always a bit of risk because CPU pins are
fragile - so need to get it from experienced seller that already sells
many other AMD CPUs and knows he should pack them very good to avoid
the bent pins. Got two or three CPUs in such way and they are fully
OK, while my friend's CPU arrived with slightly misaligned pins but
luckily still fits to a socket after some very careful installation
efforts. For the extra safety, need to capture on video the whole
unpacking process and showing the CPU pins instantly after extracting
it from a package, so if the pins are seriously damaged you could get
a full refund from seller, maybe even without returning a CPU so you
could try to carefully fix the badly bent pins and get a free CPU if
you'd succeed (I know some pros are even able to solder the torn out
pins back to their place, although its very very difficult)

> Sadly, (well, probably good for coreboot compatibility) after going over the G505s I got shipped, it seems the ebay seller sent me the version with just the APU, no discrete GPU. I wouldn't entirely discount buying a spare motherboard with it

For the coreboot compatibility it doesnt matter if you have a discrete
GPU or not, if a coreboot/Linux software support for it is broken -
its simply unused, but even in this case there is a benefit of having
G505S with discrete GPU - better cooling system: G505S with discrete
has two heatpipes instead of one, and because I'm not using a discrete
GPU with broken software support, my CPU has like 1.5 heatpipes
instead of just 1 :) By the way, if your G505S doesn't have a discrete
GPU, it is not enough just to buy a motherboard with discrete - you
also need to buy another cooling system (with two heatpipes and
heatsink for a discrete GPU chip), otherwise it would either shutdown
from discrete GPU overheating or that GPU chip would burn out

How have you checked that your laptop doesn't have a discrete GPU ?
Did you removed a plastic panel like at my photo above, and noticed
there is no discrete GPU with heatsink, just the empty place? (thats
the most reliable way) If really no discrete GPU, take a photo of
underneath and get a partial refund from a seller because this laptop
is not "as-advertised", while keeping a laptop to yourself of course

> testing out any attempts to get discrete graphics working, since I've got the nicer of the two available GPUs

Check out g505s-atombios repository here -
https://github.com/g505s-opensource-researcher , it contains the
correct VGABIOS ROMs that are required to make both the integrated and
discrete GPUs working, and it was quite hard to get them (could not
just extract from proprietary BIOS, because they are stored
not-initialized there and that proprietary BIOS is patching them while
booting to make them working; more details how we got them are written
at repository's README)

However, even with these blobs I've been unable to make a discrete
GPUs working. I am not sure if there was a Linux issue (at my last
time of testing the Linux kernel got an open-source support for these
GPUs only recently and it could've been buggy) or coreboot issue (only
a few coreboot laptops have a discrete AMD card, so it hasnt been
tested much, and - while a coreboot loads VGABIOS ROM for integrated
GPU fine, it could be that it either doesn't load a VGABIOS ROM for
discrete GPU at all - despite I've added it with a command - or loads
it incorrectly)

> somebody tried running coreboot on a version of the G505s with a discrete GPU, but had to disable the associated PCI device or coreboot would print pages of debug info an crash. I don't know whether they included a VGA BIOS for it. (I'm not 100% sure how/if coreboot supports multiple VGA BIOSs)

Of course we have also included a discrete VGA BIOS while trying that.
While building a coreboot you could include only one VGABIOS, but
after you have finished building a ROM you could put a second VGA BIOS
inside of it, using a command like

./util/cbfstool/cbfstool $COREBOOT_ROM_PATH add -f $VGABIOS_PATH -n
pci****,****.rom -t optionrom

(taken from this README -
https://github.com/g505s-opensource-researcher/g505s-atombios , pls
note there is a small typo (lack of one "\" line break) at the end of
script published at coreboot mailing list, while inside the repository
there's a good version)

> That being said, even if it did boot with both GPUs and both VGA BIOSs, the two appear to run in crossfire, with no connection between the discrete GPU and the screen. There doesn't seem to be any real support in linux for crossfire but I guess you could use the discrete GPU to hardware-accelerate various tasks.

Yes, although there was a Linux crossfire support, at least at the old
proprietary drivers that worked with Ubuntu 14.04.4 last, it was
tricky to get it working and only a few games had the application
profiles for this support. The performance of integrated and discrete
GPUs are the same at this laptop; however, since discrete GPU has its'
own RAM directly attached to it, if it will be possible to offload the
graphical computations to a discrete GPU (e.g. DRI_PRIME=1) your
laptop should be faster just because your integrated GPU wouldn't be
consuming the CPU RAM's bandwidth with its graphics computation work,
also - when integrated GPU inside CPU is almost unused, that CPU could
be running slightly cooler. These are the real reasons why we are
still wasting some time to try getting discrete GPU to work when we're
bored :)

> ath9k

Don't know if you've noticed, there are different modules at ath9k
family and looks like AR9462 is the best of them (fully supported by
open source drivers and there is 2.4GHz + 5GHz + a buggy Bluetooth xD
) . By the way, I hope that you care not just about G505S but also
about the WiFi routers. Better to get a router supported by LibreCMC -
https://librecmc.org/index.html - its a fork of OpenWRT / LEDE made
for the routers that do not require any closed-source binaries to run
(and thats why like just 10 routers are supported) . List of supported
routers: https://gogs.librecmc.org/libreCMC/libreCMC/src/v1.4/docs/Supported_Hardware.md
, recommend TP-Link TL-WR841N / TL-WR841ND ("ND" is the same but with
detachable antennas). Just need to make sure the hardware revision is
for example v9 (guaranteed to work without blobs) and e.g. not v13
because v13 has a totally different CPU (shitty Mediatek) and could
not run without blobs. To learn a hardware revision, you could either
look on a box near a bar code, or underneath a router (also near a bar
code), there should be something like V9.2 where v9 is hardware
revision and .2 is most likely just indicating a version of
preinstalled proprietary firmware

If any other questions I'll be happy to help

Best regards,
Ivan Ivanov
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hansjur...@gmail.com

unread,
Nov 1, 2018, 1:39:34 PM11/1/18
to qubes-users
Hi All,

I thought that I share with the g505s+Coreboot+QubesOS users that I finally managed to enable and use the dGPUs on the g505s boards. When mentioning boards, I mean, that both variants with its respective VBIOSes: dGPU=1002,6663 (ATI HD 8570M, Sun-Pro) and the dGPU=1002,6665 (ATI R5 M230, Jet-Pro) are working under Ubuntu Linux or Qubes 4.0 (no Windows testing was done or planned). I can now use the DRI_PRIME env. variable to offload rendering to the dGPU. In Qubes as far as I know - the dom0 X driver can only provide 2D acceleration to the AppVMs, also the dGPU seems slower than the APU GPU (glxgears in its original window size: ca. 1500 vs. ca. 2500 fps), but it is still better to use the dedicated 2GB Ram of the dGPU...

One remark: SI_support is not enabled by default in the amdgpu module in the latest stock 4.14-74 dom0 kernel, therefore you will have to create a custom kernel with this feature enabled, if you intended to use the radeon module for the APU GPU (no amdgpu support...) and the newer amdgpu for the dGPU.

Problem statement: the dGPU was not initiated correctly and was not enabled by the radeon or amdgpu kernel module, VFCT header was corrupt/truncated (effectively was not corrupt, but only VFCT for the APU/iGPU was only present). Trying to init the dGPU device through Oprom initialization failed all my attempts. This was true whether using Coreboot+GRUB or using Coreboot+Seabios, regardless of kernel version 4.x.

Solution in short: Modify Coreboot, that the VFCT table is only created for the dGPU so it can be used by either the radeon or amdgpu KMS driver.

Solution in more details:
CB 4.8 latest, with SB latest 1.11.2
I modified the IO address & the pci device ID in APU GPU Vbios file (even though IO address change to 0x3000 might not required).
I modified the IO address in the dGPU VBIOS files to the actual Coreboot/kernel provided (0x1000) address
both prepared VBIOSes were put into CBFS
for Coreboot config: std g505s build, but both run oprom & load oprom was enabled (native mode), also display was FB 1024x768 16.8M color 8:8:8, legacy VGA → this provides console output even if eg. GRUB is the payload).
Main payload Seabios (compiled as elf separately)
I had to add my SPI chip driver for EN25QH32=0x7016 to CB
I patched CB with version 0600111F AMD Fam 15h microcode (even though this was later recalled by AMD to n-1 version 06001119). Nevertheless, Spectre V2 RSB and IBPB mitigations are thus enabled.
I enabled pci 00:02.0 for dGPU in devicetree → this causes pci resource allocation problems, because the 256M address window of the dGPU conficts with the APU GPU VRAM memory window (originally 512M). Solution: I decreased the UMA size in buildopts.c to 256M (0x1000) and patched amd_mtrr.c, function setup_bsp_ramtop, to bring TOM down by 256M (0x10000000). So now the APU GPU has 256 M @0xd0000000 and the dGPU has 256M from 0xe0000000. → there could be other solutions, but I’m not expert in rearranging the memory layout used by CB
I modified pci_device.c, function pci_dev_init to only enable pci_rom_probe and pci_rom load for the dGPU pci device (no oprom exec needed for PCI_CLASS_DISPLAY_OTHER).
I modified pci_rom.c,
◦ so the VBIOS of the dGPU is copied to 0xd0000 from CBFS (..check_initialized..)
◦ and pci_rom_write_acpi_tables only run for PCI_CLASS_DEVICE_OTHER → dGPU (ACPI fill is done from the previously prepared 0xd0000 address)

Remark1: there could be one VFCT table with both VBIOSes present, but the APU GPU VBIOS is fully working via Oprom exec only (there are kernel warnings)
Remark2: in the stock bios additional ACPI tables are present (SSDT, DSDT) which contain VGA related methods and descriptions therefore, the VFCT table itself (in EFI mode) is a lot smaller ca. 20K (vs. 65k). These additional ACPI extentions allow eg. vga_switcheroo to work under Ubuntu in stock BIOS. For CB currently only offloading seems to work...

Well, I’m not a coding expert, this is the reason I didn’t include patches. My goal was to describe a working solution, and someone with proper coding skills and the possibility to submit official patches for CB can get this committed.

BR,
HJK

Matt B

unread,
Nov 3, 2018, 10:20:15 PM11/3/18
to hansjur...@gmail.com, qubes...@googlegroups.com
Very nice!

It sounds to this newb as if it's hacky as hell, but it's nice to finally know what the problem was! Have you also dropped a line to the coreboot mailing list?

Even though I ordered a dGPU G505s I got shipped one without, so sadly I can't add this to the ifixit I plan to finish this winter. (hey, what's this giant void in my laptop!?)
Hopefully when this gets upstreamed it'll "just work" like it does on the factory bios though.
If it proves to enhance performance enough I might consider a board-swap. (anyone know how to get minecraft to use crossfire on this thing? :P)

Thanks,
    -Matthew Bradley

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