Porting OpenPiton to VCU108 FPGA board

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Olivier

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Apr 1, 2020, 10:08:12 AM4/1/20
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Hello,

I am trying to port OpenPiton on the VCU108 FPGA board. I could see on your website the procedure to follow (http://parallel.princeton.edu/openpiton/docs/fpga_man.pdf), but it does not seem up to date.
Do you have an updated version of the procedure for porting OpenPiton to another FPGA board.

Thank you in advance.

Jonathan Balkind

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Apr 8, 2020, 9:44:15 PM4/8/20
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Hi there,

 

You're right that it's not up to date, apologies for that. Things are luckily easier than they used to be, though.

 

Firstly, making the board exist in the eyes of the tools:

- The board needs its own board.tcl file with the part (and optionally, board) information in piton/tools/src/proto/vcu108/board.tcl (this is also where you'll set the VCU108_BOARD macro)

- The board parameters should be added to piton/tools/src/proto/fpga_lib.py, piton/tools/src/proto/board.tcl, and piton/tools/src/proto/block.list

- Update protosyn to include the board option and make sure you enable/disable features as necessary: piton/tools/src/proto/protosyn,2.5

 

Then, for RTL and macros:

- Use VCU108_BOARD defines to set things like reset and clocking in piton/design/include/piton_system.vh

- The memory controller-related defines go in piton/design/chipset/include/mc_define.h

- Top level ports will need to change based on board specifics. Those will be in piton/design/rtl/system.v and piton/design/chipset/rtl/chipset.v

 

Lastly (that I can think of now), you'll need to create the appropriate XCI IP files for your board using the Vivado gui. The main ones that come to mind are the MMCM clock wizard, memory controller, the UART, and a FIFO and BRAM for the SD. If you run protosyn once for another board to generate a project, you'll be able to open that project in Vivado and see a rough idea of the IP parameters (right click on one of the IPs and say reconfigure) that you should expect for VCU108.

 

Happy to answer further questions as you go!

 

Thanks,

Jon

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Ivan Cheung

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Nov 10, 2020, 10:51:27 PM11/10/20
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HI, Olivier, 

We are working on similar task as you to port OpenPiton as another platform. We are planning to build it on S2C's multi-fpga emulator (VU440). 
I have a question that how many tiles you tried to run on VU9P, as VCU108?

Thank for you help!
b.r.
Ivan

Olivier 在 2020年4月1日 星期三下午10:08:12 [UTC+8] 的信中寫道:

Jonathan Balkind

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Nov 10, 2020, 11:36:28 PM11/10/20
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We've been able to fit ~12-15 Ariane cores on a VU9P (VCU118 or Amazon F1)

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Ivan Cheung

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Nov 11, 2020, 12:40:46 AM11/11/20
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For multi Ariane core, can it support Linux yet?

Jonathan Balkind <jbal...@ucsb.edu> 於 2020年11月11日 週三 下午12:36寫道:

Jonathan Balkind

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Nov 11, 2020, 12:45:55 AM11/11/20
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Yes, we can run SMP Linux in that same environment. I think the most cores we booted Linux on was in the same range

Daniel Jiménez Mazure

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Dec 8, 2020, 12:20:28 PM12/8/20
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Hi Jon,

I've been doing the same work for ALVEO280. I think I'm in the good track as I've been able to generate the project after following your sugesstion. However, I still I'm not sure how we have to edit  piton/tools/src/proto/fpga_lib.py . Almost everything can be inferred on the use of other boards, but the field STORAGE_BIT_SIZE (i.e vcu118":2*8*2**30) is not clear to me. 

Thank you very much!

Daniel

Jonathan Balkind

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Dec 8, 2020, 12:44:19 PM12/8/20
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Hi Daniel,

That should just be the number of bits of DRAM from what I recall. I think we didn't set the board up to use the full memory so it was only 2GB that was in use.

Also we'd be happy to receive a PR adding Alveo 280 support if you ever got a chance to make one :)

And if you want to use the PCIe on the board for DMA into the board's DRAM from the host, you might find it useful to check out Grigory's more recent (but not yet merged) patches: https://github.com/grigoriy-chirkov/openpiton/commits/aws2.0

Thanks,
Jon

Daniel Jiménez Mazure

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Dec 8, 2020, 2:05:14 PM12/8/20
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Hi Jon,

Thank you for all the suggestions (and the quick response!). Count on that PR :). 

Best,

Daniel

Ivan Cheung

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Dec 17, 2020, 12:55:59 AM12/17/20
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HI, Jon, 
 We almost complete the migration of OpenPiton to VU440 emulator platform.  Basically, it we already work fine at 2x2 or 4x1 configuration. However, we got a problem the when we make the Ariane with more than 4 tiles, say 3x3 or 3x2. The linux with hang either at bbl done message (if number of tile >9), or after OpenPiton logo (4<tile <=9). Do you have any idea to solve that problem ?  Is it possible caused by failure to read DTS? 

P.S. We already modify to chipset clock to 50mhz to avoid timing violation issue, and tried different clock rate of SD card clock.  

b.r.
ivan 


jbal...@ucsb.edu 在 2020年11月11日 星期三下午1:45:55 [UTC+8] 的信中寫道:

Jonathan Balkind

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Dec 17, 2020, 1:00:44 PM12/17/20
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Hi Ivan,

Glad to hear you have *something* working!

This sounds pretty strange to me. Are you working from the openpiton-dev branch? I know there was some recent commit for fixing a >=9 tile dimension more recently than the last release. I can't think of any hardware reason why there would be an issue though. We've booted Linux on about 15 on AWS F1 if I remember right.

Actually, you mentioned bbl. It might have some cap or strange behaviour? We abandoned it due to a bunch of kernel memory corruption issues it was giving us. Perhaps you could try with opensbi instead. See the discussion on this thread for how to build linux + opensbi: https://groups.google.com/u/2/g/openpiton/c/8J9IX1VLRHA/m/3syoS-_1AgAJ

Thanks,
Jon

Владимир Домнин

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Mar 31, 2021, 4:31:10 PM3/31/21
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Hello, I've successfully ported OpenPiton + Ariane on VCU108 and able to boot linux image from PMOD SD after VADJ voltage tuned to 1.2V. 

So, if it still actual I can provide needed modifications via GitHub.

четверг, 17 декабря 2020 г. в 21:00:44 UTC+3, jbal...@ucsb.edu:

Jonathan Balkind

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Apr 3, 2021, 3:15:23 PM4/3/21
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It would certainly be great to at least see a Github fork with these changes! If you submitted a PR, we may not merge it since we don't have access to one of those boards right now, but it would be excellent to have as reference and for use by others.

Thanks,
Jon

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Jonathan Balkind

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Sep 28, 2022, 1:44:47 PM9/28/22
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Did you also change VADJ as indicated by Vladimir?

Thanks,
Jon

On Tue, 27 Sept 2022 at 03:25, allon <zhoushu...@gmail.com> wrote:
Hi,I 'm trying to port OpenPiton+Ariane on VCU108,but text via uart always stuck at ”copying block 0 of 1 blocks (0 %)“, Would you mind telling me what kind of modifications you had did for porting that on VCU108?
And there are more details about my project.It would be very grateful to have your advice.
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