Support for a new core(CVA5)

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mohammad shahidzade

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Sep 23, 2024, 5:54:25 PM9/23/24
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Hi,

I am currently a graduate student at Simon Fraser University, working on the CVA5 (Taiga) core. Thus far, I have successfully ported Linux onto a single core using the LiteX flow with OpenSBI. I am now focusing on extending this support to a manycore configuration.

Given your experience with the CVA6 (Ariane) core, I was wondering if you could provide insights into the typical time frame for porting an additional core to the OpenPiton platform. Additionally, I would greatly appreciate any guidance or recommended steps that would help make this process easier.


Best regards,
Mohammad

Jonathan Balkind

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Sep 23, 2024, 7:12:11 PM9/23/24
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Hi Mohammad,

This depends on the specific core's microarchitecture and what your goals are in completing the integration. Could I suggest that you join the openpiton zulip chat (https://openpiton.zulipchat.com) where we could discuss this more? I can also make a specific channel for cva6/taiga where you can ask questions/get debugging help if you decide to proceed with the effort. For the openpiton side of the integration I have some standard steps that I could fish out, but there's also the part of modifying the core's L1 caches to meet our interface.

Thanks,
Jon


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mohammad shahidzade

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Sep 23, 2024, 7:44:11 PM9/23/24
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Hi Jon,

Thank you for your quick response! I've joined the group you suggested, and I really appreciate your help. I also think creating a dedicated channel for CVA5 would be a great idea.

I wanted to give you a brief overview of the current state of the project and our future goals. CVA5/Taiga is an efficient RV32_IMDA soft processor with FPU support, optimized for FPGAs. It also includes virtual memory(MMU and TLB units) support, enabling us to run operating systems. We only support machine mode and supervisor modes and don't support the hypervisor extension. Over the past two months, our team successfully ported Linux to CVA5, and now we’re focusing on developing a highly efficient many-core system. Our ultimate goal is to build something along the lines of Manticore, which integrates 256 cores on a single FPGA, coupled with the support for multi-FPGAs like Openpiton.

At the moment, I’m researching the best strategies for constructing this many-core system, and I’ve found your tool to be a highly promising solution.

Best regards,
Mohammad

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