My NixiChron is sick, what do I do?

[Quincy]

My much loved Jeff Thomas NixiChron began behaving oddly last night. And I haven't a clue how to get it fixed. Who does one hire in this sort of situation, how do you find someone?

The problem the clock is exhibiting is pretty weird. It began to beep every few minutes (it's supposed to only beep on the hour) and the display began to show impossible times, like "25:34:12", and the digits would change in ways not consistent with the normal passage of time. I tried powering off and powering on, and it still seems like it's trying to be sort of normal. Normally when you power it on it cycles the tubes back and forth, and beeps, and tries to get a lock on GPS satellites to get the time. And when I power it on it does cycle the tubes and does beep as it does when you turn it on, but all the tubes don't cycle normally, some are out, at least partly, others are on but locked on numbers, some are showing multiple digits at once. 

I bought it assembled.  I haven't yet opened up the clock. Sometimes I can do more harm than good, so I try to explore other options first before turning myself loose on the problem. Occasionally I manage to fix things, but I've also lost parts, ruined components with weak soldering skills, shorted out things. I want to be handy with electronics, but am more used to working in computer code where a serious error can be instantly fixed and undone, not real life where a slight screw up can effectively ruin something you care about forever.

The clock is important to me, so I'd like to get it fixed by someone who is highly likely to be successful and not cause further damage. I'm outside Frederick, MD (just north of Washington, DC), should that matter.

Any recommendations?

[Nick]

Hi - Welcome to the group - this is indeed the correct place to ask this question.

Jeff is unfortunately no longer with us, but there are folk here who know his work well and may be able to help. I have one of his NixiSat clocks - a thing of beauty - which has pride of place in our house - I had to restore that a few years ago, luckily Jeff was still around then - https://groups.google.com/d/msg/neonixie-l/evzX0noEGXg/JrVaZG3YFogJ 

Good luck - no doubt others will be along shortly...

Cheers

Nick 

[Terry S]

My suggestion would be to open the clock  and re-seat the processor chip, for starters. It is socketed.

Simple, even pressure with your thumb. Don't go crazy. Sometimes the contacts tarnish and a little re-seating will do the trick.

Terry

[Quincy]

Thanks Nick.  Yes, I was so sad to learn of Jeff's passing.  I only knew him slightly, partly through a few helpful emails related to nixie clocks and watches, mostly but through his beautiful work.  His clock has been proudly on my mantle for the last 12 years, through a couple of moves.  I'm so used to glancing at it throughout the day that having it dark now stings; we humans are funny creatures in the deep attachments we can form.

You lucky devil, I've always lusted after the NixiSat!

Q

On Thursday, May 5, 2016 at 12:39:44 PM UTC-4, Nick wrote:

Hi - Welcome to the group - this is indeed the correct place to ask this question.

Jeff is unfortunately no longer with us, but there are folk here who know his work well and may be able to help. I have one of his NixiSat clocks - a thing of beauty - which has pride of place in our house - I had to restore that a few years ago, luckily Jeff was still around then - https://groups.google.com/d/msg/neonixie-l/evzX0noEGXg/JrVaZG3YFogJ 

Good luck - no doubt other will be along shortly...

Cheers

Nick 

[Quincy]

Terry, thanks.  I'll try that tonight!

[MichaelB]

I agree with Terry S, I would start by re-seating the MCU. I have never seen this behavior and i have built over 30 of Jeff's wonderful clocks in various forms, but it sounds like an MCU issue. You'll need a chip extractor (they're cheap) to remove it if we need to go further, but just the the pressure of your thumb may do it. If worse comes to worse I have all the parts for Jeff's clocks in stock, including a few MCU's if it comes to that. Doubtful though. TIp: Seems obvious, but never hurts to be safe...when opening the case, the AM/PM NE-2 must be removed 1st to slide the PCB out of the case and in his later units it was siliconed in. Takes a bit of finesse to remove if it is so use care. Any questions email be directly if you want at badn...@badnixie.com.

[Quincy]

Michael 

It's funny, I read your post literally 45 seconds after opening up the clock and discovering the NE-2 seemed to be soldered in and wondering if the only recourse was to desolder it.  Someone near me on this list who has some expertise wrote and offered to take a look so I think I'll let him desolder it and take a look.  I can't be trusted (with this) with a soldering iron.  And thanks so much for letting me know you have the parts if I need them.  That's really comforting to know, honestly this clock is on my list of ten things I'd try to save if my house burned down (excluding people and pets, obviously).

And, wow, your MOD-SIX_SLW looks awesome (as do your many other creations)!  I would buy a MOD-SIX_SLW in a heartbeat if I figure out how to source the tubes (but, don't worry, I'm not asking).

Q

[Mitch]

I had a similar problem a couple months ago. The solution was to replace the RS-232 level shifter chip. I don't remember the part number, but it was a MAX chip. Good luck. Hopefully it is something simple and not the processor.

[Mike Mitchell]

Another component to check is the wall-brick power supply. I have a clock with a 4-amp 5v supply, it worked fine for over a year then started acting strangely. Under load the wall brick was only putting out 3.5v, no load it was up at 5v. I replaced the wall brick and all is well.

http://transistorclock.com/cal/index.html

[Quincy]

Thanks.  How do I check a wallbrick without a load?  I assume it only puts out the voltage it says under the load it's designed for, and without a load the voltage would be way off.

[Joe Croft]

Quincy, You may want to gently just lift the processor partially out of the socket then push it back in. this will reduce the chance of bent pins.

You can do this by sliding a slotted (flat blade) screwdriver under the chip (between the processor and the socket) then gently rotate the screw driver clockwise and countrr clockwise. you do not even need to turn it 90 degrees. Turning it between 10 and 30 degrees should work.

I also use this technique to get chips out of a socket completely. I have never pulled a chip from a chip puller without bending leads ;)

-joe

[MichaelB]

16F877 MCU used in the NixiChron shown on the right  

[Quincy]

Thanks.  And probably a stupid question, but maybe you know, was ever a firmware update (or more recent chip)?  The daylight savings time dates changed in the US after my version of the clock so that feature no longer works and you have to adjust it manually.  Figured I'd ask since now would be the time!

[Joe Croft]

Silly me! I must be getting old, I still think chips are in dip packages.

-joe

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[Mike Mitchell]

Judging by the photo MichaelB posted, the 12v wall brick plugs into a jack near the rear center of the board. With the clock plugged in, measure the voltage across the metal lead at the back of the jack (positive) and the exposed part of the plug. You may have to withdraw the plug slightly to give you room for your meter lead.

[Quincy]

Thanks.  I ended up ruling out the external power supply by trying another similarly rated one and the clock doing the same.

[Niek]

Quincy, were you able to fix your clock? It may be helpful to make a little video and post it on YouTube so that we get a better idea of how it's failing. Also, try it with and without the GPS plugged in, and try reseating the MCU as suggested. Also take some close up pictures of the circuit board (front and back) so we can check if anything looks suspicious.

Good luck!

[John Rehwinkel]

> Quincy, were you able to fix your clock? It may be helpful to make a little video and post it on YouTube so that we get a better idea of how it's failing. Also, try it with and without the GPS plugged in, and try reseating the MCU as suggested. Also take some close up pictures of the circuit board (front and back) so we can check if anything looks suspicious.

I've been working on Quincy's clock. I saw some serious squegging in the high voltage power supply, and its switching MOSFET was overheating badly. The filter capacitor was also warm. I tried powering the HV from a Tayloredge supply, and it looks better but a couple of digits are still misbehaving (blurry, more than one cathode lit at a time). I hooked an oscilloscope to the clock and data inputs to the HV5530 driver chips. The clock signal is nice and clean, but the data signal has a bizarre triangle wave on it. I don't know if it's AC coupled in order to adapt the PIC logic threshold to the HV5530 or what, I still need to trace out that circuitry. The 12V power looks fine (there's a small amount of ripple on it, but nothing objectionable), and the 5V power is clean.

- John

[Niek]

Hmm, sounds like that capacitor may have reached the end of its life. Interesting about the triangle wave: can you post some scope shots?

[Niek]

By the way, someone posted a Nixisat schematic to this group before, which may well be similar to the NixiChron. Maybe it can help you.

[gregebert]

Is there a level-shifter going into the HV5530 to drive the inputs to +12V ? I've heard some folks are driving at 5V or 3.3V levels, which doesn't meet datasheet specs.

[Terry Kennedy]

On Tuesday, May 10, 2016 at 1:48:52 PM UTC-4, jrehwin wrote:

I've been working on Quincy's clock.  I saw some serious squegging in the high voltage power supply, and its switching MOSFET was overheating badly.  The filter capacitor was also warm.  I tried powering the HV from a Tayloredge supply, and it looks better but a couple of digits are still misbehaving (blurry, more than one cathode lit at a time).  I hooked an oscilloscope to the clock and data inputs to the HV5530 driver chips.  The clock signal is nice and clean, but the data signal has a bizarre triangle wave on it.  I don't know if it's AC coupled in order to adapt the PIC logic threshold to the HV5530 or what, I still need to trace out that circuitry.  The 12V power looks fine (there's a small amount of ripple on it, but nothing objectionable), and the 5V power is clean.

I don't want to go posting the whole NixiChron schematic here without some sort of consensus that it's OK (although I note that Jeff sent it to me on request way-back-when with no NDA), but here's the section showing the clock and data lines from the CPU to the HV chips.

[gregebert]

On the schematic, it looks like there's a direct connection between the CPU and the HV5530's, so I'd say there isn't proper level-shifting.

It's hard to guess what the HV5530 will do with out-of-spec inputs; it might work under certain conditions (temperature, voltage), or it might be more susceptible to noise, or it might even be susceptible to aging effects. Also, the HV5530's are cascaded using the same clock signal; my read of the datasheet says you cannot guarantee proper hold-time at the data-in pin of the second HV5530.

I dont recommend adding pullup resistors in a attempt to boost the signal-level; the ESD-protection on the CPU will kick-in around (Vcc+0.7) volts. And it's not practical to mod the circuit board.

[Nick]

Vdd on the 5530 should be about 12V - the schematic snippet implies that Vdd is 5V - the data sheet explicitly states that normal operation is not guaranteed with Vdd below 10.8V.

It may have worked at 5V, but that's just luck... over time, who knows what else has drifted..

Nick

[David Forbes]

Terry,

The man is dead. What possible harm could come from revealing his
innermost Nixie secrets now?

On 5/10/16 7:02 PM, Terry Kennedy wrote:
>
> I don't want to go posting the whole NixiChron schematic here without
> some sort of consensus that it's OK (although I note that Jeff sent it
> to me on request way-back-when with no NDA), but here's the section
> showing the clock and data lines from the CPU to the HV chips.
>

> <https://lh3.googleusercontent.com/-Jv9Esn9apQk/VzKSlGjAVeI/AAAAAAAAABM/833miwKGKkcRgmO6XK5RFGrnwuAcnUG8ACLcB/s1600/5-10-2016%2B9-56-40%2BPM.jpg>


--
David Forbes, Tucson AZ

[Jonathan F.]

Yes that would be possible. I used a smiliar IC in my project. The HV51222. I tested these with 4.8V output pins. 95% of them worked well. 3% didnt worked at all. And 2% did weird things.

Seems like some of them see a "High" at a less Voltage, but as in the Datasheet, they should see 10.8V.

[Nick]

OK - I've looked at my NixiSat schematic, and although the 5530 symbol implies that Vdd is connected to +5V, it's actually connected to a rail called... VDD which in turn goes directly to the input jack via a 1N4741 11V Zener and a 100R resistor, i.e. if Vin from the wall wart is truly 12V (as it should be), then VDD should be 11V.

This is still driving the 5530s way out of spec, as the drive logic from the PIC is standard TTL with a 5V Vcc. Vih should be Vdd-2, i.e. 9V in this case, and it'll be nothing like that.

For the PIC, Vol = 0.2V and Voh is Vcc-0.7, i.e. 4V3 and only half what the datasheet says the 5530 needs in this use case.

One idea might be rotating the 5530s around and seeing if the problem moves with the driver...

Whatever happens, there are no level shifters and it "just worked", so that was OK then :)

Nick

[Jonathan F.]

I used these for the HV IC's from Microchip.  Work fine.

http://www.onsemi.com/pub_link/Collateral/MC14504B-D.PDF

[petehand]

It's not necessary. The HV5530 is a CMOS chip, so its low and high logic thresholds are 30% and 70% of whatever the VCC happens to be. It only needs to be run at 12V if you want to meet the datasheet specs for maximum clock rates (8MHz). I have never seen a nixie clock design that clocks out at more than 2MHz, and it works quite well at 3.3V at that frequency. My only concern about supply voltage is whether it's high enough to turn on the output HV FETs properly, so I wouldn't run it at less than 5V.

[Niek]

Indeed, it may be worth trying to run the clock from lower voltages, e.g. 9V or 7V instead of 12V, so the VDD-2V Vih is not so far off the mark. I think the cascading issue mentioned above shouldn't be a problem at the likely low clock frequency. But he mentioned a triangle wave on the data line: is it ok when not connected to the 5530? (i.e., is the PIC at least outputting a correct data signal?)

[GastonP]

I don't know how the law in the US goes, but does the IP get inherited? If the family was thinking in earning some money from this design (faulty as it could prove to be), then releasing the plans would mean hurting somebody..
Just my 2 cents...

[Mitch]

My clock had the same issues, as I mentioned. It would go through the startup function, then it would start beeping and displaying invalid data. Put a scope on the output of the RS232 -> TTL level converter when the clock exhibits the issue, pins 11 and 12 of the MAX232CPE chip. Also, check the HVENABLE line, pin 4 on the CPU. If the MAX chip is socketed, I'd just swap it. The chip in my clock was putting garbage data on the CPU and that affected the HV supply and probably other functions of the CPU, as well. At least that's my non-EE, theory. In any case, it fixed the problem and the clock has been running perfectly for a couple months.

[Niek]

You can have a look at the schematic of the NixiSat (which was posted here earlier - not the NixiChron, but I assume it's similar: https://docs.google.com/viewer?a=v&pid=forums&srcid=MDEwMDEwODgzMDkzNzgxMTU3NTQBMDI2MDI2MDkxODMwNDU5NDc0NjYBN3poTlVQTHJxcG9KATAuMQEBdjI&authuser=0)

Interestingly, at least in that schematic, it looks like the VCC and GND (pin 16 and 15) of the MAX232A are not connected. It could just be a shortcoming of the schematic of course (in fact, I would be a bit surprised it worked at all without them - though it's not completely impossible if e.g. it's powered through any internal voltage protection diodes), but you may want to double check this on the actual PCB. The other IC's in the circuit do show their VCC/GND connected, so it's a bit surprising to see it missing from just the MAX232A.

[Niek]

If that's indeed the issue, it's not surprising that the chip would break after a while, though it's still a little surprising that it would lead to this behavior. But I guess it's possible if the code isn't doing any sanity checks on the data it's receiving and perhaps even relies on it to determine when to stop writing into an array or something like that, overwriting other parts of the memory.

[Nick]

On Thursday, 12 May 2016 19:30:12 UTC+1, Niek wrote:

If that's indeed the issue, it's not surprising that the chip would break after a while, though it's still a little surprising that it would lead to this behavior. But I guess it's possible if the code isn't doing any sanity checks on the data it's receiving and perhaps even relies on it to determine when to stop writing into an array or something like that, overwriting other parts of the memory.

The MAX232 is powered - its a schematic error - in the older (original) NixiSat the OnCore unit connects via J4 - the upgraded unit uses an external Haicom HI-204III GPS puck that uses J3 and the MAX232 - works just fine.

The bottom line is that the schematic has problems, i.e. the lack of level shifters, however that should not detract from the fact that Jeff made wonderful clocks, and I for one am very grateful that I've had years of pleasure from my NixiSat...

Hopefully, it'll keep going for many more years yet !

Nick

[MichaelB]

Here's the complete NixiChron schematic. After Jeff stop actively selling that clock he was fine with providing the schematic to those who wanted it. So no issues with impropriety.http://goo.gl/f9UW4M

[Terry S]

It's not even a schematic error. Jeff used OrCad Capture, and Capture allows one to hide power & gnd pins. As long as they are named the same as the power & gnd nets, they get assigned to those nets and connectivity is established. They can also be made visible and assigned manually to any net, and there are other ways to establish connectivity.

And as Pete pointed out, the HV5530's work down below 5 volts, so no level shifters are necessary. This is not a design problem.

I worked with Jeff on some projects -- he was a talented and skilled engineer. He knew how to use the tools.
His designs were well thought out and implemented.

Terry

[David Forbes]

This is a sticking point for me - I think that any 'weird' part should
have its power and ground pins displayed on the schematic icon.
Otherwise, people will have doubts about your competence after you're
dead and not able to defend your decisions.

But yes, Jeff was a very good engineer, even if he was a bit secretive
about his products.

On 5/12/16 5:49 PM, 'Terry S' via neonixie-l wrote:
> It's not even a schematic error. Jeff used OrCad Capture, and Capture
> allows one to hide power & gnd pins. As long as they are named the same
> as the power & gnd nets, they get assigned to those nets and
> connectivity is established. They can also be made visible and assigned
> manually to any net, and there are other ways to establish connectivity.
>
> And as Pete pointed out, the HV5530's work down below 5 volts, so no
> level shifters are necessary. This is not a design problem.
>
> I worked with Jeff on some projects -- he was a talented and skilled
> engineer. He knew how to use the tools.
> His designs were well thought out and implemented.
>
> Terry

[Nick]

OK, maybe error wasn't the best word - other cad packages do the same thing - perhaps "confusing" is better..

I still don't get this signal level issue. The 5530s have a Vdd of 11V, that makes their Vih 9V, not 4.3V which is the PIC's Voh.

The fact that the 5530s may work with a Vdd of 5V is not the issue in this case - Vdd is 11V.

According to their data sheet they are being driven out of spec and that correct operation under these conditions is not guaranteed...

Nick

[Niek]

"It's not even a schematic error."

I disagree:
- you want your schematic to be consistent, in this case it's clearly not as most parts display their ground/power pins connected, except the MAX232A.
- you want it to be unambiguous: obviously, it's not.
- if you work with multiple voltage levels (but even if you don't), as does this design, missing the ground/power pins just means you have an incomplete schematic. You can't "debug" a product if you don't know what the voltages are supposed to be, even more when you know that in parts the schematic doesn't follow datasheet recommended values..

"And as Pete pointed out, the HV5530's work down below 5 volts, so no level shifters are necessary. This is not a design problem."

Ah, so when you design things out of spec, as long as someone says it's fine, you don't have to worry? Of course this is a design problem: here's the datasheet of the HV5530:
http://ww1.microchip.com/downloads/en/DeviceDoc/HV5530%20C072313.pdf

In there, you'll see the recommended operating conditions:
VDD
Logic voltage supply
MIN 10.8V
MAX 13.2V

Just because it works for some samples of the HV5530, it doesn't mean it'll work for all if you don't adhere to the datasheet. Note that this is actually fine in this clock, but not using a level shifter is not:

VIH
Input high voltage
MIN VDD -2.0
MAX VDD

12 - 2 = 10, which is not 5V (or a bit lower) that the PIC will output as high. You can do this of course, but then you shouldn't be surprised if it fails, randomly. Or it may fail if you replace the part with one from a newer batch, where a different factory process was used.

Now, I'm not saying Jeff didn't make great clocks. I'm just defending good engineering practices in general. He may well have made some decisions after careful testing, etc.

[Terry S]

You are right on the level shifters -- I didn't pick up on the VCC in an earlier post. 

However, regarding the schematic -- every designer has his/her own purposes in drawing a schematic. If I am drawing a schematic for my own use, I will do it differently than when I am drawing one for my company. Jeff was likely designing the schematic for his own use as well. He probably never intended for it to be used for others to troubleshoot his designs.

That's probably enough said on the topic. I am uncomfortable further dissecting Jeff's design practices and intents. I hope we can focus on getting Quincy's clock working.

Terry

[Instrument Resources of America]

In my 50 years or so of worinkg on electronic equipment, I have
quite often seen Vcc and Gnd, and others very often omitted from
schematic diagrams, to help eliminate clutter. Quite often a separate
page or diagram will then be used to show various, power and ground
distributions. This is almost always the case on high density circuit
boards. Ira.

[Terry Kennedy]

On Wednesday, May 11, 2016 at 2:07:14 AM UTC-4, nixiebunny wrote:

The man is dead. What possible harm could come from revealing his
innermost Nixie secrets now?

I don't know. And because I don't know, I didn't want to post the whole thing. I have worked with a variety of possibly-proprietary information over the years, in both professional and hobbyist roles. Unless I have a record of receiving the information with the understanding I could redistribute it, or unless I know it is an archived copy of something previously published, I won't redistribute it. In this case, I posted an excerpt which was sufficient to answer the question posed (the serial path between the CPU and the HV drivers).

Jeff told me that the clocks were a collaborative design, with Jeff doing the hardware and packaging designs and the assembly and someone else doing the firmware, which Jeff paid a per-piece royalty for. So there is likely someone who still has a financial interest in the design.

Speaking of which, I'd be interested in getting an updated CPU with the latest US DST tables. I purchased an upgrade from Jeff way-back-when, but it still doesn't change at the correct dates. I believe the person who did the firmware posts here occasionally. If there are some other people interested, it might be worthwhile to see what a batch of new CPUs would cost.

[Niek]

"In my 50 years or so of worinkg on electronic equipment, I have
quite often seen Vcc and Gnd, and others very often omitted from
schematic diagrams, to help eliminate clutter. Quite often a separate
page or diagram will then be used to show various, power and ground
distributions. This is almost always the case on high density circuit
boards. Ira. "

Of course, and they often also include the decoupling, etc. But are you saying that we're missing one page with just that one chip's vcc/gnd? :) (when the other ones are all included on the schematic?). Doesn't seem likely, does it?

[Instrument Resources of America]

Under the circumstances I would have to agree with you in this case.
Perhaps he just left them off since it's so obvious that it does require
Vcc and Gnd., or he simply forgot, and perhaps we will never know why
with any certainty. Do we have access to other circuit schematics that
he drew, and are Vcc and Gnd. omitted on them? That might shed some
light on it. Ira.

[David Forbes]

Terry,

The issue is that the schematic diagrams are useful for existing owners
of these clocks to get them repaired, which maximizes enjoyment of
Jeff's products.

Whether someone else earned royalties from the firmware is largely
irrelevant. We're discussing the hardware, not the firmware.

No one's life will be improved by hiding this information, and several
peoples' lives will be improved by revealing it.

Please make decisions based on what is best for the world.

Thanks for listening to my rant.

[Jeff Walton]

It has been VERY interesting to follow this thread.

It seems there are many opinions about how to do schematics, intellectual property, best design practices and more. The aspect that I have found the most encouraging is that the comments have not been snarky or condescending and there has been a real exchange of ideas and willingness to help the original poster get his clock fixed. Even when people seem to disagree with each other, the conversation has been thoughtful and has given everyone the opportunity to learn.

That is what I have found to be most valuable and a cause for optimism. I hope that Quincy, or whomever works on the Jeff Thomas clock, will share what it took to fix it!


Jeff Walton

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[Charles MacDonald]

> Of course, and they often also include the decoupling, etc. But are you saying that we're missing one page with just that one chip's vcc/gnd? :) (when the other ones are all included on the schematic?). Doesn't seem likely, does it?
>

perhaps the circuit was reworked and the CPU changed, resulting in a new
diagram for that part of the circuit?

I have certainly viewed LOT of diagrams where the power buses were
implied or the subject of a foot note.


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[John Rehwinkel]

> I hope we can focus on getting Quincy's clock working.

Here are some scope screens of the signals driving the HV5530s.

This is the clock (bottom trace) and data (top trace) in to the first HV5530:

[Niek]

Nice to have the scope shots. Previously, you mentioned "The clock signal is nice and clean, but the data signal has a bizarre triangle wave on it.": did you not reproduce this particular issue?

[John Rehwinkel]

Nice to have the scope shots.

A couple more below.

Previously, you mentioned "The clock signal is nice and clean, but the data signal has a bizarre triangle wave on it.": did you not reproduce this particular issue?

I was probing the wrong pin!

I dialed up the sweep speed to see the timing between the clock signal (from the CPU) and the data signal (from the first HV5530) and they don't look happy.

Here's the clock signal relative to a falling edge of data in:

The clock pulse is the narrow one, the data in signal is the one that drops about 30 nanoseconds later.  Since the HV5530 samples the data in level when it sees the falling edge of the clock signal, it's likely to get the wrong level.  The situation is basically the same for rising edges:

The data signal again changes state about 30ns after the falling edge of the clock signal.

I looked at the PC board, and the clock trace between the two HV5530s is not easy to get to.  However, the trace from the CPU is accessible, so I think I'm going to try using a 555 to produce a version of teh clock signal delayed by 150ns or so.  The signal to the first HV5530 has plenty of time, so the delayed version shouldn't cause any problems with it, and it will change the timing for the second HV5530 so the data will have settled to the correct value and stayed there for more than the minimum holding time before the clock pulse arrives.  I'm thinking if I power a 555 from the 11V supply for the HV5530, it'll also act as a level translator, which will improve the clock signal voltage margin.  Alternatively, I could use a 4504 level shifter: translating from TTL to CMOS, it has a high-to-low propagation delay of about 140ns.  For maximum signal integrity, I could run the data signal through one section, and the clock signal through two*, so both of them would have the best possible timing and voltage margins.

* You will note that this would route an 11V signal into a 5V input, but the 4504 documentation specifically allows input signals to exceed both Vcc and Vdd, so this doesn't violate any specifications.

I also looked at the GPS inputs from the MAX232 (the 1PPS signal and the RX data signal), they're both clean.  In any case, I plan to replace all the electrolytic capacitors, and the 1µF electrolytic capacitors for the MAX232 voltage charge pump will be replaced with long-life monolithic ceramic units.

- John

[gregebert]

Per the datasheet, the HV5530 data hold-time requirement is 10nsec but that is only guaranteed when the part is operated at-spec. Cant really say if the timing requirements are met with 5V signal-levels even with the measured hold-time of 30nsec.

Clock pulsewidth is spec'd at 62nsec, but again, hard to say what impact the TTL-level signals have.

I know from my many years of chip-design that low-amplitude signals get degraded thru logic gates; the only way to determine what happens is to run SPICE simulations, and I can assure you that you wont get that info from the manufacturer.

If the clk and data signals were running at 10-12V, then adding some capacitance to the data line to improve hold-time  would be an option, but it would only be necessary if the hold-time requirement of 10ns was violated. It's entirely possible no timing violations exist at 10-12V signal levels

I didn't compare the datasheet of the 4504 to confirm it's same/similar to the MC14504 [works good on my latest clock]. The $64,000 question is if the PCB is laid-out so it can be reworked to accommodate one of these.

[Niek]

It may be simpler to delay it with a couple of NOT gates (e.g. you use a 7400 and use 2 NANDs in series with their inputs tied together for an approx. 20ns delay). This clock seems quite poorly designed though if it uses such low tolerances, maybe it's better to switch to something better and reuse the nixies :) But it could be worth trying the delay fix. A 7400 should only cost a few cents.

[MichaelB]

Just a general comment from one who has had a lot of experience building Jeff's clock, both the NixiChron and the NixiSat. I have built and sold over 25 of his wonderful NixiChrons in various forms and about 15, give or take, of his NixiSat's with absolutely no failures. Well, I take that back, one of the 3 of my personal NixiChrons that had been running for 7 years failed about 3 years ago, but it was an internal short in the PCB , but I fixed that by "digging out"  the short and no more issues. So, I am no electronics whizz, far from it, but can attest to the products reliability.  Like a Nixie buddy of mine said.. Jeff's clocks were ahead of their time. RIP Jeff.

[gregebert]

A latent internal short in a PCB concerns me; I always assumed a PCB would not fail over time unless there was severe mechanical, thermal, or voltage over-stress ?

Was there something nearby that was high-temp, or high-voltage ?

[MichaelB]

Nope. I should actually have explained in greater detail for the group. The issue had shown up once before and I thought I had fixed it. It ended up being an intermittent short below the surface of the PCB between the anode run and one of the cathode runs of the Seconds 1's tube.  It was a very fine shard of copper embedded in the FR-4 material.  The second time I got it all and the unit has been running fine for 3 years. Additionally, this was the second clock I had purchased from Jeff and I purchased it assembled. No noticeable heat issues.

[Nick]

Whilst I think that most now agree that the signals should have been level-shifted, that does not explain how a clock that worked for ages suddenly goes nuts... good point that actually - was it a sudden fault or did it slowly get worse?

I would start by swapping the hv drivers over and seeing if the problem moves, scoping the 5v rail to look for noise and sag, removing the hv drivers and then replacing one at a time etc. i.e. elimination.

Theory is great and interesting but won't help much in solving the immediate mystery...

Nick

[Quincy]

Whilst I think that most now agree that the signals should have been level-shifted, that does not explain how a clock that worked for ages suddenly goes nuts... good point that actually - was it a sudden fault or did it slowly get worse?

It was working perfectly right up until it wasn't.  Nothing unusual preceded the failure, no power failures, lightning strikes, the device is on a UPS, no recent resets or anything.  The current wall plug is not the original one, it was rated the same as the original one, and it's been the one it's used for 4-6 years.

And again it's current failing state is a weird one.  It is clearly still "trying" to work.  It does a normal-ish start up beep sequence and digit check, but the digits are muddled, showing multiple digits, and the first two digits are most strongly showing "25" (which, being greater than 23, should never happen on this clock).  And I think the second digit keep changing if the clock is left on, I think -- not sure about this, I didn't spend much time with it after John replaced the high voltage circuit since the old IC was actually smoking and we hoped initially that was the only problem.

(And thanks to everyone for continuing to offer help.  I truly appreciate it!)

[Nick]

Hang on... is it fixed now or us it still with someone?

Nick

[Quincy]

It's still broken, still with jrehwin.  I just hung out with him when he first looked at it and attempted a quick fix.

[Nick]

Have you tried taking the tubes out and replacing them one at a time, then in pairs, rotating them between positions?

This is a solid fault, so I'd focus on eliminating the easy stuff before worrying about signal degradation...

If the max771 was cooking, that's not good at all.

[Quincy]

I removed and replaced the tubes, but put them back in the exact same order, so John could certainly try that.  When we saw the max771 (if that's the high voltage IC) smoking it was with the tubes removed, I think.  Then he bypassed it with that replacement circuit (sorry, don't recall who made it) and then we re-plugged the tubes in the original order.

I think he was going to replace all the caps and see if that improved anything, swap nixie drivers, and I forget what else.

Q

[John Rehwinkel]

> And again it's current failing state is a weird one. It is clearly still "trying" to work. It does a normal-ish start up beep sequence and digit check, but the digits are muddled, showing multiple digits, and the first two digits are most strongly showing "25" (which, being greater than 23, should never happen on this clock). And I think the second digit keep changing if the clock is left on, I think -- not sure about this, I didn't spend much time with it after John replaced the high voltage circuit since the old IC was actually smoking and we hoped initially that was the only problem.

Actually it was the MOSFET that was smoking.

- John

[Terry Kennedy]

On Thursday, May 26, 2016 at 12:34:03 AM UTC-4, jrehwin wrote:

Actually it was the MOSFET that was smoking.

I'm not sure if the NixiChron has the same issue, but the FLW has an issue that if the microprocessor is held in a reset state (or stops running for some reason) the HV supply burns up. That's one of the reasons I don't like CPU-driven HV supplies. 

[Nick]

It uses a max771-based supply. For the FET to get really hot a number of things could have happened, including the MAX771 latching up, the FET dying, and the feedback network topend resistor going o/c, HF oscillation etc...

[Mitch]

Can someone scope the hvenable line? I'd like to know the frequency it is set to, or is it just high or low?

Again, replace the Max232. That fixed the exact problem with my nixiechron. I also changed the surrounding electrolytics, but I'm not sure if that made a difference.

[Mitch]

I think I answered my own question. Max771 datasheet, pin 4:

"Active-high TTL/CMOS logic-level shutdown input. In shutdown mode, VOUT is a diode drop below V+ (due to the DC path from V+ to the output) and the supply current drops to 5µA maximum. Connect to ground for normal operation. 1.5V reference output that can source 100µA for external loads. Bypass to GND with 0.1µF". 

Apparently it is just an enable line for HV, not a PWM controlled supply. Is that correct?