AC VFD Filament Driver Question

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ZY

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2023年4月14日 17:25:572023/4/14
收件人 neonixie-l
Hello. I'm working on a driver for my VFD filaments. Say I need a Vfilament of 1.6V, and a current of 40mA, such as with a small VFD.

So far I have a square wave driver set up, basically for my two filament pins I can alternate the two pins between 1.6 and 0 with some H bridge at maybe 100KHz. If I connect the filament load to this, it's the equivalent of using a 3.2V Vpp square wave biased at 0v. See Sim Link 1. I put two 40 ohm resistors as a stand in for 2 VFD tubes filaments in parallel.

However, I'd like to add some sort of smoothing and DC bias. I was thinking of using a small transformer, such as this one:
Applying a 100KHz RC low pass filter to the output, and approximating the turn ratio at 1:1 (it's 1:1.1 in the datasheet but ignoring that for now), I have a simulation below as Sim Link 2.

The problem here is I seem to be wasting a huge amount of power just driving the transformer on the primary size. The plot on the very far left shows I'm delivering 2.2A to the transformer. I guess I could find a larger transformer with a higher inductance, or increase my switching frequency, but I'm not sure if I'm on the right design path here.

Also, it seems like some of my issues stem from my LC filter. If I remove that, the simulation shows more reasonable primary currents of 100mA. See Sim Link 2. I don't really remember my ECE courses from a long time ago, so I'm not sure what is going on here.

Anyone have any suggestions?


Sim Link 1:

Sim Link 2:

Sim Link 3, no LC Filter:

gregebert

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2023年4月15日 02:03:392023/4/15
收件人 neonixie-l
I use a mains-powered 2.5VAC center-tapped transformer for my NIMO clock, and apply a DC bias to the center-tap. Basically the same as your approach, but not running at 100kHz. The DC bias comes from a DAC (with an OP-amp buffer), so I can use software to control the offset, rather than a pot. No need for LC filters, etc.

The transformer is rated at 3amps, even though 6 NIMO tubes only require 1.2amps max. Also, each tube has it's own fuse and series resistor to reduce the inrush current. The software-controlled DAC is also necessary so I can have the FPGA monitor analog signals to check the fuses, filaments, and resistors, and that has to be timed correctly to the AC line and the offset has to be different for making these measurements than for regular operation. It was probably overkill, but I enjoyed the design challenge.

ZY

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2023年4月15日 03:26:462023/4/15
收件人 neonixie-l
I wanted to try to avoid having a AC line in my design if possible. I did have to break out my old ECE notes, and I designed a different filter. Turns out my original RC filter requires a much larger resistor to limit the primary side current, but that raises input resistance too high for my 40 ohm loads.

Using a different filter I had some more success:

However the problem is the output voltage is somewhat determined by the load. So if a filament burns out it can cause a cascade failure on the other filaments as the voltage rises. I guess monitoring the AC line would be possible but this complicates my design a bit, and I'd need a monitor that could do negative currents/voltages if my bias is not high enough. If such an IC exists I'd be interested, but I don't really have access to a FPGA if that's what it takes.

It also seems it's easy to hit resonance with particular filter LC values, boosting the voltage higher which feels a bit dangerous for the filaments.

Maybe just not having the filter would be the safest approach here. However I'm not at all experienced in filter design especially when there is a low impedance load involved, so maybe there's a better approach that I'm not using.

ZY

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2023年4月15日 04:24:262023/4/15
收件人 neonixie-l
I'm playing around a bit more with some active filter designs so it won't be load dependent, but 100khz seems a bit high for this application. Going a lower frequency would require I select a different/larger transformer since my current would be too high.

Adrian Godwin

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2023年4月15日 10:09:542023/4/15
收件人 neoni...@googlegroups.com
I agree 100kHz seems high, but I don't see any downside if you can drive that OK. I also see no need for a filter : the only effect I can imagine is either too low (certainly not at 100k) or possibly a beat frequency with the multiplexing which i'd avoid carefully (or zero beat i.e. in sync, but with some thought about average brightness). 

Interested to hear the result as the usual approach is a floating transformer inverter but I'd considered the h-bridge and intend to try it. I'm not convinced about the dc bias from your simulation though : i'd expect the dc to be simply half the drive waveforms (since they're positive only). I'd also expect to be able to change the DC level by adjusting the h-bridge drive proportions but it would have to be symmetrical, which requires a dead period.


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petehand

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2023年4月16日 02:50:442023/4/16
收件人 neonixie-l
I use H bridges for my VFD designs. The VFD heaters are designed to run as slow as 50Hz, as the thermal inertia is more than sufficient for a steady display. There will be no beating. I generally run them at about 200- 500 Hz. The bias needed is negligible, just enough to make the anodes slightly negative relative to the heater - 1 volt is usually plenty. It is, as you say, equivalent to half the P-P AC voltage.

For individual tubes, AC drive is not really needed. All the segments will be the same brightness. It only becomes important with a long multi digit tube, which can show a real brightness gradient from end to end on DC.

ZY

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2023年4月16日 06:52:222023/4/16
收件人 neonixie-l
On Sunday, 16 April 2023 at 02:50:44 UTC-4 petehand wrote:
I use H bridges for my VFD designs. The VFD heaters are designed to run as slow as 50Hz, as the thermal inertia is more than sufficient for a steady display. There will be no beating. I generally run them at about 200- 500 Hz. The bias needed is negligible, just enough to make the anodes slightly negative relative to the heater - 1 volt is usually plenty. It is, as you say, equivalent to half the P-P AC voltage.

 What is your strategy for biasing, are you pulling the anodes negative or are you adding a DC bias to the filaments? I'd prefer not having to have a separate negative power supply so a positive bias on the filaments is ideal, but I'm not sure how to DC bias the h-bridge, I'm imagining a zener at the h-bridge ground would do it? I guess the problem is my H-bridge is an integrated IC, so it's Vout ground and digital ground are tied, adding a zener to the IC ground might mess with the digital logic.

I tried adding a zener for my transformer to bias it and it seems to work here with a simulated 30V grid being turned on:
https://www.falstad.com/circuit/circuitjs.html?ctz=CQAgjCDsB0AcYCYCsBTAtLEAGaBOWuYALFrgGwDMFRSSkSZIuuISrWr6YYAUAG7hE4Mh24IQRTB3FgscudjiKpipP0HiKZTGJDJG08PIU4pSitGJgkuBGSQUkBSLgqqeAcw3DRQsLexsT28tHSESDkieAHdvSXAA+KweACdWBB0M9J0AjhIeMDIWBBJwLIiylRx5WWY6+oaWMGhSAixato7MNBwwWEgiWooXBApiGkUESCo+2DpcSCxqMchFLFgsMmsELEg2rFHcNhxmGIkFf3EiMiIE8WTYisK8ihkRIMfXnwkvnalgohfRxXIGwW5RR43O7ZaEPGGXViQRgIuF0ZFZJBZRD-WJoyogESZHHQ+IlPLE3T6PSlKlwsl6BjU0S5M54hGE2FnDnsxkornrfH2dHE+mk0rYoJpNkYpGw86pAkCiXc3LytJCwW81X5R4XDFYrLJaggABeKAAdigUmgILboJBiMD4LZ4PIEOhVtIWsYfcYweBwDwTT9xFMQaGBeIzZbrbxhi9Q5BwyBgQGomkKvEnkIOBQ5DwAEoprQSTBURg2gyBUp5wKRaBqAAOUB2+KT0hrdeC7aZLekSa7sQ1Ep7EuSAGdzuTi4wkoEAGYAQwANuOUGdM5hrrckgrt6WJFDdLn85Dbrp93zdb4rnr-gB7QIQURIay0VjKQL3FM8R9sZ96FgkhuLIkwBuIbBuAAYgAlsui4ALYWgALr+H4QKsYCOGA9Afr0ehptAZDIGhtYASQ+BGIoEAgSAABCMGLmuAAmAA644AGpoPOcGIShaFTGm4DYUUazyEiCCuLgNBjMg4BERIBGCW4DFMWgADGACuKQpPxQA

A DAC with an opamp buffer on the center tap would be interesting, but wouldn't that opamp be taking a lot of current with some larger VFDs?


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