[Bug] MMC HS-DDR mode is broken on A64-OLinuXino-2Ge8G-IND

[Philip Rinn]

Hi,

the Olimex A64-OLinuXino board comes in various variants, three with eMMC. While
MMC HS-DDR mode works fine on one of them (A64-OLinuXino-1Ge4GW) is doesn't work
on the A64-OLinuXino-2Ge8G-IND variant (and I don't have the third variant so I
can't check if it works there).

Disabling MMC HS-DDR mode in drivers/mmc/host/sunxi-mmc.c makes the eMMC work for
me (linux 5.7.6, patch below). This is also what Olimex does for their kernel:

https://github.com/OLIMEX/linux-olimex/commit/e715fb31.patch

Mainline kernel doesn't differentiate between the different variants with eMMC so
disabling HS-DDR mode for all of them as done for the H5 eMMC controller could be
the way to go:


--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -1401,7 +1401,8 @@
*/
if ((host->cfg->clk_delays || host->use_new_timings) &&
!of_device_is_compatible(pdev->dev.of_node,
- "allwinner,sun50i-h5-emmc"))
+ "allwinner,sun50i-h5-emmc") &&
+ !of_machine_is_compatible("olimex,a64-olinuxino-emmc"))
mmc->caps |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;

ret = mmc_of_parse(mmc);


Best,
Philip