[PATCH 0/7] arm64: dts: allwinner: Various DT fixes

[Andre Przywara]

Hi,

a collection of DT fixes I gathered over time:

- Adding usbphy references to [EO]HCI0 nodes (A64, H6)
- Adding Pine64-LTS status LED
- Dropping non-removable from SoPine/Pine64-LTS SD card
- Enabling HS200 @ 150 MHz on Pine H64 (H6)
- Enabling HS200 @ 150 MHz on Pine64-LTS

For details please see the individual patches!

Thanks,
Andre

Andre Przywara (7):
arm64: dts: allwinner: H6/A64: properly connect USB PHY to port 0
arm64: dts: allwinner: Pine64-LTS: Add status LED
arm64: dts: allwinner: Drop non-removable from SoPine/LTS SD card
arm64: dts: allwinner: H6: Allow up to 150 MHz MMC bus frequency
arm64: dts: allwinner: A64: Limit MMC2 bus frequency to 150 MHz
arm64: dts: allwinner: Pine64-LTS/SoPine: Enable HS200 eMMC mode
arm64: dts: allwinner: Pine H64: Enable HS200 eMMC mode

.../boot/dts/allwinner/sun50i-a64-pine64-lts.dts | 11 +++++++++++
arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts | 5 +----
.../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 1 +
arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi | 1 -
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 6 +++++-
arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 1 +
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 7 +++++++
7 files changed, 26 insertions(+), 6 deletions(-)

--
2.17.5

[Andre Przywara]

The Pine64-LTS board features a blue status LED on pin PL7.

Describe it in the DT.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---
.../boot/dts/allwinner/sun50i-a64-pine64-lts.dts | 11 +++++++++++
1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts
index 302e24be0a31..55bf4a0fc31c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts
@@ -1,10 +1,21 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2018 ARM Ltd.

+#include <dt-bindings/leds/common.h>
#include "sun50i-a64-sopine-baseboard.dts"

/ {
model = "Pine64 LTS";
compatible = "pine64,pine64-lts", "allwinner,sun50i-r18",
"allwinner,sun50i-a64";
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ };
+ };
};
--
2.17.5

[Andre Przywara]

In recent Allwinner SoCs the first USB host controller (HCI0) shares
the first PHY with the MUSB controller. Probably to make this sharing
work, we were avoiding to declare this in the DT. This has two
shortcomings:
- U-Boot (which uses the same .dts) cannot use this port in host mode
without a PHY linked, so we were loosing one USB port there.
- It requires the MUSB driver to be enabled and loaded, although we
don't actually use it.

To avoid those issues, let's add this PHY link to the A64 and H6 .dtsi
files. After all PHY port 0 *is* connected to HCI0, so we should describe
it as this. Remove the part from the boards which were already doing
that.

This makes it work in U-Boot, also improves compatiblity when no MUSB
driver is loaded (for instance in distribution installers).

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts | 4 ----
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 ++++
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 4 ++++
3 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
index 896f34fd9fc3..d07cf05549c3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
@@ -126,8 +126,6 @@
};

&ehci0 {
- phys = <&usbphy 0>;
- phy-names = "usb";
status = "okay";
};

@@ -177,8 +175,6 @@
};

&ohci0 {
- phys = <&usbphy 0>;
- phy-names = "usb";
status = "okay";
};

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 51cc30e84e26..19e9b8ca8432 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -593,6 +593,8 @@
<&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_BUS_OHCI0>,
<&ccu RST_BUS_EHCI0>;
+ phys = <&usbphy 0>;
+ phy-names = "usb";
status = "disabled";
};

@@ -603,6 +605,8 @@
clocks = <&ccu CLK_BUS_OHCI0>,
<&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_BUS_OHCI0>;
+ phys = <&usbphy 0>;
+ phy-names = "usb";
status = "disabled";
};

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 8a62a9fbe347..f593cfeaecc9 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -680,6 +680,8 @@
<&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_BUS_OHCI0>,
<&ccu RST_BUS_EHCI0>;
+ phys = <&usb2phy 0>;
+ phy-names = "usb";
status = "disabled";
};

@@ -690,6 +692,8 @@
clocks = <&ccu CLK_BUS_OHCI0>,
<&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_BUS_OHCI0>;
+ phys = <&usb2phy 0>;
+ phy-names = "usb";
status = "disabled";
};

--
2.17.5

[Andre Przywara]

The SD card on the SoPine SoM module is somewhat concealed, so was
originally defined as "non-removable".
However there is a working card-detect pin, and in certain SoM base
boards it might be actually accessible at runtime.
Also the Pine64-LTS shares the SoPine base .dtsi, so inherited the
non-removable flag, even though the SD card slot is perfectly accessible
and usable there. (It turns out that just *my* board has a broken card
detect switch, so I originally thought CD wouldn't work on the LTS.)

Drop the "non-removable" flag to describe the SD card slot properly.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi | 1 -
1 file changed, 1 deletion(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
index c48692b06e1f..3402cec87035 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
@@ -32,7 +32,6 @@
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_dcdc1>;
- non-removable;
disable-wp;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
--
2.17.5

[Andre Przywara]

In contrast to the H6 (and later) manuals, the A64 datasheet does not
specify any limitations in the maximum possible frequency for eMMC
controllers.
However experimentation has found that a 150 MHz limit similar to other
SoCs and also the MMC0 and MMC1 controllers on the A64 seems to exist
for the MMC2 controller.

Limit the frequency for the MMC2 controller to 150 MHz in the SoC .dtsi.
The Pinebook seems to be the an odd exception, since it apparently seems
to work with 200 MHz as well, so overwrite this in its board .dts file.

Tested on a Pine64-LTS: 200 MHz HS-200 fails, 150 MHz HS-200 works.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts | 1 +
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
index d07cf05549c3..7ae16541d14f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
@@ -167,6 +167,7 @@
pinctrl-0 = <&mmc2_pins>, <&mmc2_ds_pin>;
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_eldo1>;
+ max-frequency = <200000000>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 19e9b8ca8432..57786fc120c3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -514,7 +514,7 @@
resets = <&ccu RST_BUS_MMC2>;
reset-names = "ahb";
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
- max-frequency = <200000000>;
+ max-frequency = <150000000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
--
2.17.5

[Andre Przywara]

The H6 manual explicitly lists a frequency limit of 150 MHz for the bus
frequency of the MMC controllers. So far we had no explicit limits in the
DT, which limited eMMC to a rather conservative 52 MHz.

Put those maximum frequencies in the SoC .dtsi, to allow higher speed
modes (which still would need to be explicitly enabled, per board).

Tested with an eMMC using HS-200 on a Pine H64. Running at the spec'ed
200 MHz indeed fails with I/O errors, but 150 MHz seems to work stably.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 3 +++
1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index f593cfeaecc9..77765d4a05ec 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -436,6 +436,7 @@
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;

pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;

+ max-frequency = <150000000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;

@@ -452,6 +453,7 @@
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;

+ max-frequency = <150000000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;

@@ -468,6 +470,7 @@
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;

[Andre Przywara]

The eMMC modules offered for the Pine64 boards are capable of the HS200
eMMC speed mode, when observing the frequency limit of 150 MHz.

Enable that in the DT.

This increases the interface speed from ~80 MB/s to ~120 MB/s.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index d4069749d721..e22b94c83647 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -111,6 +111,7 @@

bus-width = <8>;
non-removable;
cap-mmc-hw-reset;

+ mmc-hs200-1_8v;
status = "okay";
};

--
2.17.5

[Andre Przywara]

The eMMC modules offered for the Pine64 boards are capable of the HS200
eMMC speed mode, when observing the frequency limit of 150 MHz.

Enable that in the DT.

This increases the interface speed from ~80 MB/s to ~120 MB/s.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 1 +

1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
index 961732c52aa0..15ceba027a73 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
@@ -142,6 +142,7 @@
vqmmc-supply = <&reg_bldo2>;
non-removable;
cap-mmc-hw-reset;
+ mmc-hs200-1_8v;
bus-width = <8>;

[Chen-Yu Tsai]

Hi,

On Wed, Jan 6, 2021 at 11:05 PM Andre Przywara <andre.p...@arm.com> wrote:
>
> The Pine64-LTS board features a blue status LED on pin PL7.

I'd like some clarification about this.

My Pine64-LTS was a used unit personally given to me by TL Lim, which came
with LEDs that I assume were soldered on by hand as their mounting angles
are slightly off. My Pine64+ (the original from the Kickstarter campaign)
and SoPine baseboard (a new unit, also given to me by TL Lim) came without
LEDs soldered on.

I'm OK with adding the LED to the device tree. I'm just not sure about the
color.


ChenYu

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[Chen-Yu Tsai]

Hi,

On Wed, Jan 6, 2021 at 11:05 PM Andre Przywara <andre.p...@arm.com> wrote:
>

> In recent Allwinner SoCs the first USB host controller (HCI0) shares
> the first PHY with the MUSB controller. Probably to make this sharing
> work, we were avoiding to declare this in the DT. This has two
> shortcomings:
> - U-Boot (which uses the same .dts) cannot use this port in host mode
> without a PHY linked, so we were loosing one USB port there.
> - It requires the MUSB driver to be enabled and loaded, although we
> don't actually use it.
>
> To avoid those issues, let's add this PHY link to the A64 and H6 .dtsi
> files. After all PHY port 0 *is* connected to HCI0, so we should describe
> it as this. Remove the part from the boards which were already doing
> that.
>
> This makes it work in U-Boot, also improves compatiblity when no MUSB
> driver is loaded (for instance in distribution installers).
>
> Signed-off-by: Andre Przywara <andre.p...@arm.com>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts | 4 ----
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 ++++
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 4 ++++

It would be better if the H6 parts were separated out.

Please also add a fixes tag, which helps with backporting.

> --
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> To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi...@googlegroups.com.

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[Chen-Yu Tsai]

On Wed, Jan 6, 2021 at 11:05 PM Andre Przywara <andre.p...@arm.com> wrote:
>

> The SD card on the SoPine SoM module is somewhat concealed, so was
> originally defined as "non-removable".
> However there is a working card-detect pin, and in certain SoM base
> boards it might be actually accessible at runtime.
> Also the Pine64-LTS shares the SoPine base .dtsi, so inherited the
> non-removable flag, even though the SD card slot is perfectly accessible
> and usable there. (It turns out that just *my* board has a broken card
> detect switch, so I originally thought CD wouldn't work on the LTS.)
>
> Drop the "non-removable" flag to describe the SD card slot properly.
>
> Signed-off-by: Andre Przywara <andre.p...@arm.com>

Please add a fixes tag. This helps with finding the original commit
that introduced the issue and backporting.

ChenYu

[Chen-Yu Tsai]

On Wed, Jan 6, 2021 at 11:06 PM Andre Przywara <andre.p...@arm.com> wrote:
>
> In contrast to the H6 (and later) manuals, the A64 datasheet does not
> specify any limitations in the maximum possible frequency for eMMC
> controllers.
> However experimentation has found that a 150 MHz limit similar to other
> SoCs and also the MMC0 and MMC1 controllers on the A64 seems to exist
> for the MMC2 controller.
>
> Limit the frequency for the MMC2 controller to 150 MHz in the SoC .dtsi.
> The Pinebook seems to be the an odd exception, since it apparently seems
> to work with 200 MHz as well, so overwrite this in its board .dts file.
>
> Tested on a Pine64-LTS: 200 MHz HS-200 fails, 150 MHz HS-200 works.
>
> Signed-off-by: Andre Przywara <andre.p...@arm.com>

Please add a fixes tag. This helps with finding the original commit
that introduced the issue and backporting.

This would benefit SoPine / Pine64-LTS users that are using eMMC.

ChenYu

> --
> You received this message because you are subscribed to the Google Groups "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi...@googlegroups.com.

> To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/20210106150525.15403-6-andre.przywara%40arm.com.

[Chen-Yu Tsai]

On Wed, Jan 6, 2021 at 11:06 PM Andre Przywara <andre.p...@arm.com> wrote:
>

> The eMMC modules offered for the Pine64 boards are capable of the HS200
> eMMC speed mode, when observing the frequency limit of 150 MHz.
>
> Enable that in the DT.
>
> This increases the interface speed from ~80 MB/s to ~120 MB/s.
>
> Signed-off-by: Andre Przywara <andre.p...@arm.com>

Acked-by: Chen-Yu Tsai <we...@csie.org>

[Chen-Yu Tsai]

On Wed, Jan 6, 2021 at 11:06 PM Andre Przywara <andre.p...@arm.com> wrote:
>

> The eMMC modules offered for the Pine64 boards are capable of the HS200
> eMMC speed mode, when observing the frequency limit of 150 MHz.
>
> Enable that in the DT.
>
> This increases the interface speed from ~80 MB/s to ~120 MB/s.
>
> Signed-off-by: Andre Przywara <andre.p...@arm.com>

Acked-by: Chen-Yu Tsai <we...@csie.org>

[Maxime Ripard]

In addition to Chen-Yu comments, the node name should be led

Maxime

[Chen-Yu Tsai]

On Wed, Jan 6, 2021 at 11:06 PM Andre Przywara <andre.p...@arm.com> wrote:
>

> The H6 manual explicitly lists a frequency limit of 150 MHz for the bus
> frequency of the MMC controllers. So far we had no explicit limits in the
> DT, which limited eMMC to a rather conservative 52 MHz.

I'd say this is implementation specific. FreeBSD might have other defaults?

> Put those maximum frequencies in the SoC .dtsi, to allow higher speed
> modes (which still would need to be explicitly enabled, per board).
>
> Tested with an eMMC using HS-200 on a Pine H64. Running at the spec'ed
> 200 MHz indeed fails with I/O errors, but 150 MHz seems to work stably.
>
> Signed-off-by: Andre Przywara <andre.p...@arm.com>

Fixes tag?


Thanks
ChenYu

[André Przywara]

On 06/01/2021 15:53, Chen-Yu Tsai wrote:

Hi,

> On Wed, Jan 6, 2021 at 11:05 PM Andre Przywara <andre.p...@arm.com> wrote:
>>
>> The Pine64-LTS board features a blue status LED on pin PL7.
>
> I'd like some clarification about this.
>
> My Pine64-LTS was a used unit personally given to me by TL Lim, which came
> with LEDs that I assume were soldered on by hand as their mounting angles
> are slightly off. My Pine64+ (the original from the Kickstarter campaign)
> and SoPine baseboard (a new unit, also given to me by TL Lim) came without
> LEDs soldered on.

The situation is similar here ;-), and that's why I checked the pictures
in the store. The LEDs look slightly different (not angled), but the
location of the pads is the same and I see two LEDs on the picture. The
schematic seems to confirm both the pins, the polarity and the colour.
Hence I am highly confident that it's a blue LED on PL7, active low.

But we can wait for other people to confirm.

Thanks!
Andre

[André Przywara]

On 06/01/2021 15:56, Chen-Yu Tsai wrote:
> Hi,
>
> On Wed, Jan 6, 2021 at 11:05 PM Andre Przywara <andre.p...@arm.com> wrote:
>>
>> In recent Allwinner SoCs the first USB host controller (HCI0) shares
>> the first PHY with the MUSB controller. Probably to make this sharing
>> work, we were avoiding to declare this in the DT. This has two
>> shortcomings:
>> - U-Boot (which uses the same .dts) cannot use this port in host mode
>> without a PHY linked, so we were loosing one USB port there.
>> - It requires the MUSB driver to be enabled and loaded, although we
>> don't actually use it.
>>
>> To avoid those issues, let's add this PHY link to the A64 and H6 .dtsi
>> files. After all PHY port 0 *is* connected to HCI0, so we should describe
>> it as this. Remove the part from the boards which were already doing
>> that.
>>
>> This makes it work in U-Boot, also improves compatiblity when no MUSB
>> driver is loaded (for instance in distribution installers).
>>
>> Signed-off-by: Andre Przywara <andre.p...@arm.com>
>> ---
>> arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts | 4 ----
>> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 ++++
>> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 4 ++++
>
> It would be better if the H6 parts were separated out.

Sure.

>
> Please also add a fixes tag, which helps with backporting.

The whole concept of DT backports raises some eyebrows here, but it's
surely easy enough to do.

Thanks,
Andre.

[Chen-Yu Tsai]

Well, whether people choose to backport is their decision. But providing
information used to decide whether to do so, and if yes, what else is
needed, is IMHO something the author can help with.

Likely backport scenarios are distribution kernels AFAICT.

ChenYu

> Thanks,
> Andre.

[Andre Przywara]

Hi,

small update, mostly adding Fixes: tags.
Patch 1/7 has been split up to cover A64 and H6 separately.

I tried to reach out to people with Pine64-LTS boards to clarify on
the blue LED, as it seems like production boards are spread thinly
across developers. We got confirmation from several people with
several board revisions that this LED works and is indeed blue.

I also double checked on the CD pin situation on the two SoPine SOMs
I have, and could confirm their functionality.

Rebased on top of sunxi/dt-for-5.12.

================

a collection of DT fixes I gathered over time:

- Adding usbphy references to [EO]HCI0 nodes (A64, H6)
- Adding Pine64-LTS status LED
- Dropping non-removable from SoPine/Pine64-LTS SD card
- Enabling HS200 @ 150 MHz on Pine H64 (H6)
- Enabling HS200 @ 150 MHz on Pine64-LTS

For details please see the individual patches!

Thanks,
Andre

Changelog v1 .. v2:
- Add Fixes: tags
- Add Chen-Yu's ACKs
- split USB PHY 0 link patch

Andre Przywara (8):
arm64: dts: allwinner: A64: properly connect USB PHY to port 0
arm64: dts: allwinner: H6: properly connect USB PHY to port 0

[Andre Przywara]

In recent Allwinner SoCs the first USB host controller (HCI0) shares
the first PHY with the MUSB controller. Probably to make this sharing
work, we were avoiding to declare this in the DT. This has two
shortcomings:
- U-Boot (which uses the same .dts) cannot use this port in host mode
without a PHY linked, so we were loosing one USB port there.
- It requires the MUSB driver to be enabled and loaded, although we
don't actually use it.

To avoid those issues, let's add this PHY link to the A64 .dtsi file.

After all PHY port 0 *is* connected to HCI0, so we should describe

it as this. Remove the part from the Pinebook DTS which already had
this property.

This makes it work in U-Boot, also improves compatiblity when no MUSB
driver is loaded (for instance in distribution installers).

Fixes: dc03a047df1d ("arm64: allwinner: a64: add EHCI0/OHCI0 nodes to A64 DTSI")

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts | 4 ----
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 ++++

2 files changed, 4 insertions(+), 4 deletions(-)

--
2.17.5

[Andre Przywara]

In recent Allwinner SoCs the first USB host controller (HCI0) shares
the first PHY with the MUSB controller. Probably to make this sharing
work, we were avoiding to declare this in the DT. This has two
shortcomings:
- U-Boot (which uses the same .dts) cannot use this port in host mode
without a PHY linked, so we were loosing one USB port there.
- It requires the MUSB driver to be enabled and loaded, although we
don't actually use it.

To avoid those issues, let's add this PHY link to the H6 .dtsi file.

After all PHY port 0 *is* connected to HCI0, so we should describe
it as this.

This makes it work in U-Boot, also improves compatiblity when no MUSB
driver is loaded (for instance in distribution installers).

Fixes: eabb3d424b6d ("arm64: dts: allwinner: h6: add USB2-related device nodes")

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 8a62a9fbe347..f593cfeaecc9 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi

@@ -680,6 +680,8 @@

<&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_BUS_OHCI0>,
<&ccu RST_BUS_EHCI0>;

+ phys = <&usb2phy 0>;

+ phy-names = "usb";
status = "disabled";
};

@@ -690,6 +692,8 @@

clocks = <&ccu CLK_BUS_OHCI0>,
<&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_BUS_OHCI0>;

+ phys = <&usb2phy 0>;

[Andre Przywara]

The Pine64-LTS board features a blue status LED on pin PL7.

Describe it in the DT.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

.../boot/dts/allwinner/sun50i-a64-pine64-lts.dts | 11 +++++++++++
1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts

index 302e24be0a31..93d271fdbb6c 100644

--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts
@@ -1,10 +1,21 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2018 ARM Ltd.

+#include <dt-bindings/leds/common.h>
#include "sun50i-a64-sopine-baseboard.dts"

/ {
model = "Pine64 LTS";
compatible = "pine64,pine64-lts", "allwinner,sun50i-r18",
"allwinner,sun50i-a64";
+

+ led {

[Andre Przywara]

The SD card on the SoPine SoM module is somewhat concealed, so was
originally defined as "non-removable".

However there is a working card-detect pin (tested on two different
SoM versions), and in certain SoM base boards it might be actually

accessible at runtime.
Also the Pine64-LTS shares the SoPine base .dtsi, so inherited the
non-removable flag, even though the SD card slot is perfectly accessible
and usable there. (It turns out that just *my* board has a broken card
detect switch, so I originally thought CD wouldn't work on the LTS.)

Drop the "non-removable" flag to describe the SD card slot properly.

Fixes: c3904a269891 ("arm64: allwinner: a64: add DTSI file for SoPine SoM")

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi | 1 -
1 file changed, 1 deletion(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
index c48692b06e1f..3402cec87035 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
@@ -32,7 +32,6 @@

pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;

[Andre Przywara]

The H6 manual explicitly lists a frequency limit of 150 MHz for the bus
frequency of the MMC controllers. So far we had no explicit limits in the

DT, which limited eMMC to the spec defined frequencies, or whatever the
driver defines (both Linux and FreeBSD use 52 MHz here).

Put those maximum frequencies in the SoC .dtsi, to allow higher speed
modes (which still would need to be explicitly enabled, per board).

Tested with an eMMC using HS-200 on a Pine H64. Running at the spec'ed
200 MHz indeed fails with I/O errors, but 150 MHz seems to work stably.

Fixes: 8f54bd1595b3 ("arm64: allwinner: h6: add device tree nodes for MMC controllers")

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 3 +++
1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index f593cfeaecc9..77765d4a05ec 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi

@@ -436,6 +436,7 @@
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;

pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;

+ max-frequency = <150000000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;

@@ -452,6 +453,7 @@
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;

pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;

+ max-frequency = <150000000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;

@@ -468,6 +470,7 @@
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;

pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;

[Andre Przywara]

In contrast to the H6 (and later) manuals, the A64 datasheet does not
specify any limitations in the maximum possible frequency for eMMC
controllers.
However experimentation has found that a 150 MHz limit similar to other
SoCs and also the MMC0 and MMC1 controllers on the A64 seems to exist
for the MMC2 controller.

Limit the frequency for the MMC2 controller to 150 MHz in the SoC .dtsi.
The Pinebook seems to be the an odd exception, since it apparently seems
to work with 200 MHz as well, so overwrite this in its board .dts file.

Tested on a Pine64-LTS: 200 MHz HS-200 fails, 150 MHz HS-200 works.

Fixes: 22be992faea7 ("arm64: allwinner: a64: Increase the MMC max frequency")

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts | 1 +
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
index d07cf05549c3..7ae16541d14f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts

@@ -167,6 +167,7 @@
pinctrl-0 = <&mmc2_pins>, <&mmc2_ds_pin>;
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_eldo1>;
+ max-frequency = <200000000>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 19e9b8ca8432..57786fc120c3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi

@@ -514,7 +514,7 @@
resets = <&ccu RST_BUS_MMC2>;
reset-names = "ahb";
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
- max-frequency = <200000000>;

[Andre Przywara]

The eMMC modules offered for the Pine64 boards are capable of the HS200
eMMC speed mode, when observing the frequency limit of 150 MHz.

Enable that in the DT.

This increases the interface speed from ~80 MB/s to ~120 MB/s.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
Acked-by: Chen-Yu Tsai <we...@csie.org>

---
arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 1 +

1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index d4069749d721..e22b94c83647 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -111,6 +111,7 @@

bus-width = <8>;
non-removable;
cap-mmc-hw-reset;

+ mmc-hs200-1_8v;

[Andre Przywara]

The eMMC modules offered for the Pine64 boards are capable of the HS200
eMMC speed mode, when observing the frequency limit of 150 MHz.

Enable that in the DT.

This increases the interface speed from ~80 MB/s to ~120 MB/s.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
Acked-by: Chen-Yu Tsai <we...@csie.org>
---

arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 1 +

1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
index 961732c52aa0..15ceba027a73 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
@@ -142,6 +142,7 @@
vqmmc-supply = <&reg_bldo2>;
non-removable;
cap-mmc-hw-reset;
+ mmc-hs200-1_8v;
bus-width = <8>;

[Heinrich Schuchardt]

On 13.01.21 16:26, Andre Przywara wrote:
> The Pine64-LTS board features a blue status LED on pin PL7.
>
> Describe it in the DT.
>
> Signed-off-by: Andre Przywara <andre.p...@arm.com>

Tested-by: Heinrich Schuchardt <xypro...@gmx.de>

[Chen-Yu Tsai]

Everything looks good to me.

Acked-by: Chen-Yu Tsai <we...@csie.org>

[Maxime Ripard]

Hi,

Thanks for fixing the node names, but I guess my comment was a bit too
vague: it's status that needed to be changed, not the upper level one.

I've updated it while applying

Maxime

[Maxime Ripard]

On Wed, Jan 13, 2021 at 03:26:22PM +0000, Andre Przywara wrote:
> Hi,
>
> small update, mostly adding Fixes: tags.
> Patch 1/7 has been split up to cover A64 and H6 separately.
>
> I tried to reach out to people with Pine64-LTS boards to clarify on
> the blue LED, as it seems like production boards are spread thinly
> across developers. We got confirmation from several people with
> several board revisions that this LED works and is indeed blue.
>
> I also double checked on the CD pin situation on the two SoPine SOMs
> I have, and could confirm their functionality.
>
> Rebased on top of sunxi/dt-for-5.12.
>
> ================
> a collection of DT fixes I gathered over time:
>
> - Adding usbphy references to [EO]HCI0 nodes (A64, H6)
> - Adding Pine64-LTS status LED
> - Dropping non-removable from SoPine/Pine64-LTS SD card
> - Enabling HS200 @ 150 MHz on Pine H64 (H6)
> - Enabling HS200 @ 150 MHz on Pine64-LTS
>
> For details please see the individual patches!

Applied the series (with the fix mentionned in patch 3)

Thanks!
Maxime